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889 results about "Memory bank" patented technology

A memory bank is a logical unit of storage in electronics, which is hardware-dependent. In a computer, the memory bank may be determined by the memory controller along with physical organization of the hardware memory slots. In a typical synchronous dynamic random-access memory (SDRAM) or double data rate synchronous dynamic random-access memory (DDR SDRAM), a bank consists of multiple rows and columns of storage units, and is usually spread out across several chips. In a single read or write operation, only one bank is accessed, therefore the number of bits in a column or a row, per bank and per chip, equals the memory bus width in bits (single channel). The size of a bank is further determined by the number of bits in a column and a row, per chip, multiplied by the number of chips in a bank.

Computer memory bank fault prediction method and system based on deep learning

The invention discloses a computer memory bank fault prediction method and system based on deep learning, and relates to the technical field of computer hardware fault diagnosis, and the system comprises a multi-source time sequence data collection module which is used for obtaining memory bank operation state data in real time; the dynamic feature enhancement module is based on a composite architecture of a generative adversarial network and transfer learning, comprises a fault mode generator, and generates synthetic data consistent with real fault distribution by using an LSTM network; aligning feature spaces of different hardware platforms through a maximum mean difference loss function; the multi-modal fusion deep learning model comprises a space-time convolutional network, a graph attention network and an adaptive weight adjustment mechanism; and the fault early warning analysis module is used for analyzing a fault probability predicted value, an interpretable thermodynamic diagram and a maintenance suggestion. According to the invention, passive maintenance is changed into active prevention and control, and preposition and precision of fault management are realized through dual mechanisms of long-term trend prediction and short-term risk early warning.
Owner:BENGBU JINSE INFORMATION TECHNOLOGY CO LTD

Intelligent cooling system and method of centerless grinding machine for difficult-to-machine materials

The invention relates to the technical field of industrial control, in particular to an intelligent centerless grinding machine cooling system and method for difficult-to-machine materials, and the system comprises a multi-source sensing unit, an edge calculation module, a decision center module, a precise execution module and a digital immune memory bank; compared with the defects that in the prior art, monitoring depends on a single temperature sensor, thermal field sensing is incomplete, thermal damage early warning lags behind and the like, according to the scheme, grinding power frequency spectrum, acoustic emission signals, triaxial vibration and coolant mass spectrum data are collected in real time through a multi-source sensing unit, and a micron-sized temperature field is reconstructed in combination with an edge end space-time diagram convolutional network; full-dimensional monitoring of the grinding thermal-mechanical coupling effect is achieved, and thermal anomaly recognition sensitivity and early warning timeliness are remarkably improved.
Owner:WUXI JIANHE NUMERICAL CONTROL MACHINE TOOL

Quality management and control system for fabricated decoration construction

The invention discloses a quality management and control system for fabricated decoration construction, and the system comprises a sensing layer which constructs a multi-modal data collection network, carries out the three-dimensional real-time data synchronous collection through combining logistics API docking and an OCR recognition system, and constructs a construction process digital twin bottom plate; in the edge calculation layer, an edge node carries out lightweight processing on the original data; the cognitive layer is used for calling a Prolog rule through a process knowledge graph engine to reasone the feature snapshots, carrying out defect instant diagnosis and dynamic constraint propagation, outputting a root cause path with probability weight through three-stage verification, and quantifying intervention influence; the decision-making layer is used for constructing a dynamic prediction model based on a bidirectional LSTM and an attention mechanism, automatically activating a compensation mode when key interference is detected in combination with an anti-fact memory bank and a case-based reasoning compensator, and generating an alternative scheme of optimal cost / optimal construction period / comprehensive balance through a multi-target optimizer; and in the application layer, a Unity engine is utilized to develop the digital twinborn billboard.
Owner:TAIZHOU UNIV

Task planning method and system for robot

The invention relates to the technical field of robots, and discloses a task planning method and system for a robot, and the method comprises the steps: obtaining a user instruction; based on the large language model and the semantic coding model, retrieving in a memory bank to obtain environment perception information related to the user instruction; inputting a first cue word determined based on the user instruction and the environment perception information into the large language model, and generating an overall action sequence corresponding to the user instruction; and for each sub-action in the whole action sequence, determining a second cue word, inputting the second cue word into the large language model, and generating a detailed action plan corresponding to the current sub-action until each sub-action in the whole action sequence is traversed. According to the method, the natural language or unstructured instruction can be received, the intention of the user can be understood, and the executable overall action sequence and the detailed action plan of each sub-action in the sequence are generated, so that the task issued by the user is completed, it is ensured that the robot can execute the task, and the accuracy and efficiency of task execution are improved.
Owner:CHENGDU HUMANOID ROBOT INNOVATION CENT CO LTD

Time-varying graph neural network traffic flow prediction method based on dynamic memory bank

The invention provides a time-varying graph neural network traffic flow prediction method based on a dynamic memory bank, and belongs to the technical field of traffic prediction. The method adopts a layered deep neural network architecture, and comprises a data embedding layer, a space-time coding layer, a memory enhancement layer and a prediction output layer. The data embedding layer preprocesses a traffic flow sequence, associates a collaborative coding time sequence mode with a road network, and synchronously constructs a dynamic graph structure; the space-time coding layer is subjected to space-time stream decoupling extraction, a space branch models multi-scale space dependence through a time delay graph convolution module and a space Mama module, and a time branch extracts multi-granularity time features through a hierarchical time sequence sensing module and a time Mama module; the memory enhancement layer performs pattern matching and reconstruction on the space-time fusion features by means of a dynamic memory bank; and the prediction output layer generates a prediction result by taking the GCRN as a decoder. According to the method, the space-time dependence of the traffic situation is accurately captured, the prediction curve is highly fit with the true value, and the high-precision prediction of the traffic flow is realized.
Owner:CHINA UNIV OF PETROLEUM (EAST CHINA)

Wind power plant cluster power prediction method

The invention discloses a wind power plant cluster power prediction method. The method comprises the following steps: step 1, embedding priori knowledge into a learning module; step 2, constructing a memory enhanced adaptive graph structure; step 3, an endogenous feature learning module; step 4, an exogenous feature learning module; 5, performing memory enhancement gating fusion on the MAGF; and step 6, outputting and predicting. According to the method, special learning modules are respectively constructed by decoupling endogenous power signals and exogenous meteorological factors, and a dynamic graph structure adaptive to a sample is retrieved by utilizing a meta-memory library, so that context sensing modeling of a complex space-time dependency relationship is realized. Meanwhile, a memory enhanced gating fusion mechanism (MAGF) is introduced, adaptive semantic alignment and fusion of double-flow features are realized, the precision and robustness of the model in multiple prediction time domains are remarkably improved, and more reliable technical support is provided for power grid dispatching and wind field operation.
Owner:CHANGAN UNIV

Memory enhancement and task planning method and system for large-model multi-agent

The invention discloses a memory enhancement and task planning method and system for large-model multi-agent. The method comprises the steps of performing structured analysis on historical task data, extracting planning experience and an abstract mode, and constructing and indexing an external memory library; retrieving related experience and modes from a memory library based on the new task description, and generating a memory enhanced task planning book; the planning scheme is distributed to a multi-agent network to be executed, an actual execution track is monitored and recorded, and the deviation between the actual execution track and the planning expectation is calculated; and evaluating the planning scheme based on the execution result and the deviation, extracting a planning correction rule, and updating the experience and the rule of the task to a memory bank. By introducing an external memory and closed-loop learning mechanism which can be dynamically evolved, the problems that existing system planning lacks experience guidance, knowledge cannot be precipitated and reused, and planning and execution are disjointed are solved, and the planning quality, the system reusability and the self-adaptive optimization capability are remarkably improved.
Owner:XIAMEN YUANTING INFORMATION TECH CO LTD

Reference video object segmentation method and system based on motion modeling and multi-modal interaction

The invention discloses a reference video object segmentation method and system based on motion modeling and multi-modal interaction, and the method comprises the steps: taking a video sequence and natural language description as input, and generating a preliminary segmentation mask through a text coding and mask decoder; a Kalman filtering motion modeling module is introduced to predict the motion trail of the target object, and time sequence consistency optimization is carried out on the preliminary segmentation mask; fusing the historical track of the object and the action semantics in the semantic features on the basis of a key action semantic coding module to realize action semantic alignment and mask dynamic correction; the segmentation quality of the current frame is subjected to multi-dimensional scoring based on a representative frame screening mechanism, the representative frame is screened out to update a memory bank, and the long-term tracking stability is improved. According to the method, the problems of target drift, insufficient semantic alignment and memory pollution in a complex dynamic scene in the prior art are effectively solved, and the segmentation precision, robustness and semantic consistency are remarkably improved while the light weight of the model is kept.
Owner:ZHONGKE (SHENZHEN) WIRELESS SEMICON CO LTD

Storage system supporting Cache and RAM dual-form access and access method thereof

The invention discloses a storage system supporting Cache and RAM double-form access and an access method thereof, and the system comprises a data storage array which is divided into a plurality of structured storage sub-blocks; the storage mode register is used for storing a configuration value, and the configuration value is used for dynamically configuring each storage sub-block to work in a Cache mode or an RAM mode, so that the data storage array works in a full Cache mode or a full RAM mode or a Cache and RAM coexistence mode; and the storage access control logic is used for arbitrating the storage access request, mapping the storage access request to the corresponding storage sub-block for read-write access according to the access address and the configuration value, activating the storage sub-block mapped by the storage access request, and inactivating the storage sub-block not mapped by the storage access request. According to the method, dynamic configuration is achieved, access of Cache and RAM forms is supported at the same time, part of or all memory banks can be configured to be Cache or RAM, the advantages of the two memory forms are utilized at the same time, parallel access of a plurality of memory sub-blocks is supported, use is flexible and efficient, and power consumption is reduced.
Owner:WUXI CORE FIELD MICROELECTRONICS CO LTD

Long video understanding method capable of relieving time sequence illusion in video language large model

The invention provides a long video understanding method capable of relieving time sequence illusion in a video language large model. The long video understanding method is based on a static bias adaptive frame selection mechanism and a cross-modal feature fusion strategy. According to the static bias mechanism, inter-frame similarity is evaluated through a discriminator, redundant frames are identified, key frames are selected or a complete sequence is reserved, so that calculation overhead is reduced, and spatio-temporal information integrity is kept; a video frame and a text are mapped to a shared semantic space, the single-frame semantic understanding ability is enhanced, then an embedded sequence serves as a soft prompt to be input into a large language model, and a final answer is generated in an autoregression mode. According to the method, the efficiency and accuracy of long video understanding and video question and answer tasks can be remarkably improved; the problem of low training and reasoning efficiency caused by time sequence dependence redundancy and excessive computing resource consumption is effectively relieved; and through a dynamic multi-modal task processing framework and a space-time memory bank compression mechanism, the modeling capability and generalization performance of the model on a long video sequence are further improved.
Owner:LANZHOU UNIV

Intelligent map making system and method based on large language model

The invention relates to an intelligent map making system and method based on a large language model, and the method comprises the steps: enabling a client to input data analysis information and a map making demand to a task planning Agent of a server, and carrying out the reasoning and disassembly of the input information into preliminary planning information through a double-LLM mechanism, the method comprises the following steps that Agent is used as a tool library, a tool library document, a knowledge library and a memory library are further inquired, a tool is selected through RAG and sent to a client side, if an existing tool cannot meet requirements, the Agent will generate a special code to complete a task, the client side calls the tool to carry out specific drawing according to received information, and a user can re-plan and adjust the drawing process through dialogue. The memory bank records session information and charting interaction operation information of this time and history. The problem of system fragmentation is solved through a unified architecture, stability and flexibility are balanced by combining large language model driving, tool agent and code generation, domain knowledge is introduced to enhance decision and improve specialty, and a user preference memory mechanism is constructed to realize personalized services.
Owner:SOUTHWEST JIAOTONG UNIV

Memory system with processor in memory (PIM)

A memory system includes a memory interface including a first sub-channel interface associated with a first plurality of memory banks and a first plurality of processor in memory (PIM) blocks and further including a second sub-channel interface associated with a second plurality of memory banks and a second plurality of PIM blocks. During a particular mode of operation associated with the memory system, the first sub-channel interface is configured to communicate, with a host device, one or more memory access commands associated with the first plurality of memory banks. During the particular mode of operation, the second plurality of PIM blocks are configured to perform, concurrently with communication of the one or more memory access commands, one or more PIM operations associated with the second plurality of memory banks. The second sub-channel interface is configured to be disabled during the particular mode of operation.
Owner:QUALCOMM INC

Hybrid addressing method and layered multi-core cascade device

The hybrid addressing method and the hierarchical multi-core cascading device provided by the invention comprise the following steps: if a core in a basic module initiates a memory access request, analyzing the memory access request to obtain a row offset high order of an access address, if the row offset high order is located in a sequence region, rearranging the access address to obtain a rearranged address, and if the row offset high order is located in the sequence region, rearranging the rearranged address to obtain the hierarchical multi-core cascading device. The rearranged address is restrained in the memory bank of the basic module, the sequence area is a preset row in the memory bank of the core, and if a row offset high bit is located in an interleaving area, the access address is divided to obtain a divided address; wherein the divided addresses are stored in memory banks of different basic modules, and the interleaving area is an area except a sequence area. A dual-mode design of a local sequence region and a global interleaving region is adopted, and an exclusive sequence region is divided in global interleaving mapping by recoding an address high bit, so that balance between a global shared memory view and local low-latency access is ensured.
Owner:YUANQIXIN (SHANDONG) SEMICONDUCTOR TECHNOLOGY CO LTD

Intelligent grading and excess subscription management system and method for GPU video memory

The invention provides an intelligent grading and excess subscription management system and method for a GPU video memory, and relates to the technical field of GPU video memory management, and the method comprises the steps: firstly building a grading storage system comprising a first performance region and a second performance region; then receiving a video memory allocation request containing task priority and service quality requirements, and monitoring a data access mode and access frequency; the initial placement position of the data block is dynamically determined through the intelligent engine according to the task priority, the data access mode and the frequency; predicting target access probability distribution of each data block by adopting an LSTM network; then migrating data between the first performance area and the second performance area through a swap-in and swap-out mechanism based on the distribution and periodicity characteristics, and ensuring the service quality of the first performance area; finally, the global oversale proportion is dynamically adjusted through an overpurchase safety management module, an independent virtual address space is distributed for each task, and safe overpurchase can be achieved through the process.
Owner:HANHOU (BEIJING) TECH CO LTD

Cerebral stroke focus detection method and system

The invention discloses a cerebral apoplexy focus detection method and system, and belongs to the technical field of medical image detection. Extracting a fusion feature map of the brain image; for each region type, obtaining a representative feature which has the highest similarity with the feature at each pixel point position in the fused feature map in the class prototype set and carries a corresponding region type label, and further determining the region type to which each pixel point position in the fused feature map belongs so as to obtain a corresponding pseudo-label map; the class prototype set comprises representative features of different region types and is obtained in the training process of the system, and feature distribution of different region types in the memory bank is calculated through a Gaussian mixture model; for each region type, sampling is carried out based on feature distribution of the region type, and a plurality of representative features are obtained; the prototype-like set in the cerebral apoplexy detection method has real global context perception ability, can clearly distinguish the focus and various complex background structures, and can accurately realize cerebral apoplexy detection.
Owner:HUAZHONG UNIV OF SCI & TECH

Reconfigurable multi-channel polynomial multiplier architecture and implementation method thereof

The invention relates to a reconfigurable multi-channel polynomial multiplier architecture and an implementation method thereof, and belongs to the technical field of post-quantum cryptography hardware acceleration. The architecture comprises a scheduler, a twiddle factor memory bank, a bank address routing module, a bank array and a reconfigurable butterfly unit array. According to the architecture, a cyclic decoupling multi-channel NTT / INTT / PWM algorithm is used, flexible configuration of the degree of parallelism and the flow line depth can be supported, and the adaptability of a memory access control strategy is improved; a conflict-free memory mapping scheme based on interleaved storage is adopted, so that storage and read-write of polynomial coefficients are irrelevant to polynomial length and a calculation stage, NTT / INTT / PWM access modes are unified, and hardware resource overhead is greatly reduced; and a conflict-free detection algorithm oriented to multi-channel assembly line design is adopted, so that the utilization rate of hardware resources is remarkably improved.
Owner:NAT UNIV OF DEFENSE TECH

Method and apparatus for reporting asset information, storage medium, and electronic device

PendingUS20260010423A1BootstrappingNon-redundant fault processingMemory bankSerial presence detect
Embodiments of the present disclosure provide a method and apparatus for reporting asset information, a non-transitory computer readable storage medium, and an electronic device. The method for reporting asset information includes: reading, in a case where a target device supports memory expansion, Serial Presence Detect (SPD) information of a designated memory bank mounted to the target device from a configuration space register of a Memory Expander Controller (MXC) of the target device by means of a Basic Input Output System (BIOS), wherein the target device is a device that supports a Computer Express Link (CXL) protocol, which is an open interconnection standard; and reporting, in a case where target SPD information has been read, the target SPD information to a Central Processing Unit (CPU) of the target device as system asset information by means of the BIOS.
Owner:INSPUR SUZHOU INTELLIGENT TECH CO LTD

QoS (Quality of Service) prediction method, system and equipment based on multilayer graph attention mechanism

The invention provides a QoS prediction method, system and device based on a multilayer graph attention mechanism, and the method comprises the steps: inputting a user embedding matrix generated based on a user context graph and a service embedding matrix generated based on a service context graph into a QoS prediction model, performing feature aggregation on the user embedding matrix through a first multilayer graph attention network to obtain a first feature vector of a to-be-tested user node, and performing feature aggregation on the service embedding matrix through a second multilayer graph attention network to obtain a second feature vector of a to-be-tested service node; fusing the first feature vector and the second feature vector through a feature interaction network to obtain a first fused feature vector, and predicting the first fused feature vector through a feature prediction network to obtain a first QoS prediction value between the to-be-tested user node and the to-be-tested service node; and performing error correction on the first QoS predicted value according to the first fusion feature vector and the high-error sample memory bank. The QoS prediction accuracy can be improved.
Owner:SHANTOU UNIV

AI-based medical molecular sieve oxygen production equipment online data analysis method

The invention discloses an AI-based online data analysis method for medical molecular sieve oxygen production equipment. The method comprises the following steps: step 1, collecting multi-source operation monitoring data of the medical molecular sieve oxygen production equipment; 2, constructing a task prompt vector to obtain a normalized feature vector; 3, inputting the normalized feature vector into an improved TabPFN model to obtain a hidden space representation, and generating an enhanced representation in combination with a retrieval result of the prototype memory bank; 4, performing drift detection on the enhanced representation; 5, inputting the robust representation into a multi-task decoder; and 6, executing event label judgment, and outputting online analysis result data. According to the invention, real-time analysis of multi-source data and advanced identification of abnormal trends are realized, and the method is suitable for equipment state monitoring and risk early warning in hospital wards, rehabilitation centers and long-term oxygen supply scenes.
Owner:HUNAN JIANHUXIANG MEDICAL EQUIPMENT CO LTD

Aerial information query service method and system based on Internet channel

The invention discloses an internet channel-based aviation information query service method and system, and relates to the technical field of internet aviation information processing. Comprising the following steps: constructing a depth feature extraction model based on a flight attribute graph and a historical query mode feature extraction unit, and analyzing and predicting query popularity and identifying sudden query hotspots through multi-dimensional feature fusion; constructing a three-level cache storage system, and dynamically evaluating the cache priority based on the real-time level and the predicted query popularity; determining a data storage position and an updating strategy according to the priority, and starting distributed preloading and CDN node directional preheating for sudden hotspot data; when a query request is responded, parallel processing of instant return and asynchronous update is implemented, and differential degradation response is implemented according to real-time sensitivity; and dynamically generating a multi-path parallel scheme for complex query, and adaptively adjusting an execution strategy. And the stability and the response speed of the query service are obviously improved.
Owner:BEIJING LITTLE DRAGONFLY HUANYU TECHNOLOGY CO LTD

Address mapping method and device, electronic equipment and chip

The invention provides an address mapping method and device, electronic equipment and a chip, and relates to the technical field of memory management, the method comprises the following steps: obtaining a plurality of original memory addresses, at least two original memory addresses in the plurality of original memory addresses including the same memory bank address; based on an original address bit of each original memory address, determining a target address bit of each original memory address, the number of bits of the target address bits being a first preset number, and the first preset number being smaller than the number of bits of the original address bits; determining a mapping result of each original memory address based on the target address bit and a preset mapping relation; target memory addresses corresponding to the original memory addresses are determined based on the mapping result and the memory bank addresses in the original memory addresses, and the memory bank addresses included in the target memory addresses corresponding to different original memory addresses are different.
Owner:BEIJING TSINGMICRO INTELLIGENT TECH CO LTD

Clock transfer circuitry for multi-chip RAM

The invention relates to a clock transfer circuitry for a multi-chip RAM. Apparatus and methods include a first memory chip including a first memory bank, a command input configured to receive a command and a chip identifier, and a decoder configured to determine whether the command is to use a clock on a second memory chip when the command matches a predetermined condition. The apparatus and method also include a second memory chip including a second memory bank and a clock receiver configured to receive the clock from the first memory chip for memory operations on the second memory chip. The first memory chip acts as a base chip for a memory chip stack including the first memory chip and the second memory chip. When the command matches the predetermined condition, the first memory chip is configured to send the chip identifier to the second memory chip to the clock receiver to activate the clock receiver prior to transmitting the command to the second memory chip.
Owner:MICRON TECHNOLOGY INC

Driver circuitry for high-density memory banks

This disclosure is directed to column driver circuitry of a memory device. A memory bank of the memory device may include multiple memory cells arranged along multiple column select lines and row select lines. The column driver circuitry may include column drivers coupled to the column select lines. A column driver may generate a column select signal with multiple voltage steps for accessing a target memory cell coupled to a respective column select line. The column decoder may include circuitry to adjust a voltage level and / or duration of each voltage step of the column select signal to provide a desired voltage level to a target memory cell based on a disposition of the target memory cell along a column select line. For example, the column decoder may output a higher voltage level followed by a lower voltage level to access the target memory cell. The higher voltage level and the lower voltage level may be above a threshold voltage level for accessing the target memory cell.
Owner:MICRON TECHNOLOGY INC

Memory device and method

A memory device includes a plurality of memory banks, and a processing-in-memory (PIM) block accessible to the plurality of memory banks, wherein the PIM block comprises a control circuit configured to receive a plurality of operation instructions from a host and, in response to a predicated instruction indicating a predication operation among the plurality of operation instructions, instruct an arithmetic logic unit (ALU) to perform the predication operation, a predicate register file (PRF) configured to store therein a predicate value determined by the predication operation, and the ALU configured to perform an operation according to a command signal translated by the control circuit based on the predicate value from an operation instruction that depends on the predicate value among the plurality of operation instructions.
Owner:SAMSUNG ELECTRONICS CO LTD +1

Deep reinforcement learning highway variable speed limit control method based on multi-target dynamic weight distribution

The invention discloses a deep reinforcement learning highway variable speed limit control method based on multi-target dynamic weight distribution, and the method comprises the steps: 1, collecting the traffic flow information of a road section, and obtaining the traffic state data; 2, defining an action parameter and a reward function of the deep reinforcement learning method; 3, constructing a network model of deep reinforcement learning, and establishing a playback memory bank storage sample; and 4, reward function weight updating is carried out based on an entropy weight method, an optimized control strategy is obtained based on a sampling training deep reinforcement learning network model, and speed limit control is carried out on each control unit. According to the method, dynamic weight distribution of the traffic efficiency and the safety reward function is achieved, the method can adapt to a complex traffic environment, meanwhile, the operation efficiency of the expressway is effectively improved, and the safety risk is reduced.
Owner:HEFEI UNIV OF TECH

Rehabilitation monitoring system based on multi-modal sensing and AI evaluation

The invention belongs to the technical field of medical rehabilitation, and discloses a rehabilitation treatment monitoring system based on multi-modal sensing and AI evaluation. A multi-dimensional skeleton key point confidence evaluation mechanism is established by integrating three types of sensing data of visual skeleton tracking, an inertial measurement unit and pressure distribution, and potential tracking interruption risk frames and error recognition candidate frames are recognized in real time. And a multi-modal fusion correction model is adopted to carry out accurate compensation on error recognition, missing data are reconstructed in combination with a skeleton motion mode memory bank and a bidirectional time sequence prediction algorithm, and a continuous and complete all-day skeleton motion sequence is generated. On the basis of the calculation, the time-phased activity level index and the rehabilitation action completion degree score of the patient are calculated, and an objective and quantitative rehabilitation evaluation basis is provided. According to the invention, the stability and continuity of skeleton tracking in a complex rehabilitation environment are improved, so that a medical team can obtain a real and complete all-day activity portrait of a patient, accurately position a rehabilitation bottleneck, formulate a personalized treatment scheme and promote functional recovery of the patient.
Owner:LEDETANG (SHANGHAI) DIGITAL MEDICAL TECHNOLOGY CO LTD

Efficient Coordination of Error Handling and Usage-Based-Disturbance Mitigation

Apparatuses and techniques for efficient handling of data errors and usage-based disturbances are described. To enable efficient utilization of time-limited resources, a memory device includes control circuitry that performs multiple different types of operations responsive to “confiscating” a refresh-pump time interval. The memory device is responsible for performing various functionalities internally while reducing the impact such functionalities may have on servicing memory requests from an external entity. Accordingly, a memory device may confiscate refresh-pump opportunities and instead perform other operations. To efficiently utilize a refresh-pump opportunity, the control circuitry can perform an error-handling operation on a codeword stored in a first bank and perform a usage-based disturbance mitigation operation on a row in a second bank during the confiscated time interval. Further, the usage-based disturbance mitigation operation can be performed across multiple banks except for the first bank. In this manner, various internal functionalities can be achieved efficiently.
Owner:MICRON TECHNOLOGY INC

Question and answer interaction method and device based on artificial intelligence, equipment and medium

PendingCN121920436ASemantic analysisBiological modelsGenerative processGeneration process
The invention discloses a question and answer interaction method, device and equipment based on artificial intelligence and a medium, and relates to the technical field of artificial intelligence in the professional service fields of finance, insurance, medical treatment, banking and the like, and the method comprises the steps: segmenting a historical dialogue into segments with coherent themes, and constructing the segments into memory units; generating a semantic embedding vector and a time decay weight for each unit to form a memory bank; retrieving related memory units from a memory bank based on user query, comprehensive semantic relevance, theme consistency and time decay weight; the query and related units are combined into a context input generative language model, and a topic consistency constraint is applied during the generation process to generate a topic consistent reply. By optimizing the memory granularity and enhancing the memory representation and timeliness, multi-dimensional accurate retrieval and constraint generation are realized, and the system improves the accuracy, coherence and service consistency of question and answer interaction.
Owner:PING AN TECH (SHENZHEN) CO LTD

Shared Memory Controller with Direct Memory Access Architecture for On-Chip Memory

The present disclosure describes System on Chip (SoC) architecture that facilitates disaggregation of memory-to-memory operations. The SoC architecture includes a host interface that communicates with a host system, processor cores, and an Advanced extensible Interface (AXI) interconnect coupling the host interface with processor cores. The SoC architecture includes an on-chip memory (OCM) subsystem coupled to the AXI interconnect, where the OCM subsystem contains memory banks, a Direct Memory Access (DMA) interconnect coupled directly with respective memories of processor cores, and a shared memory controller coupled with the AXI interconnect, memory banks, and DMA interconnect. The shared memory controller includes an OCM-internal path connecting the shared memory controller directly to memory banks within the OCM subsystem and a DMA engine that executes memory-to-memory operations by transferring data directly between memory banks through the OCM-internal path or respective memories of processor cores via a DMA interconnect.
Owner:MARVELL ASIA PTE LTD

Multi-head self-attention target tracking method based on Mama

The invention provides a multi-head self-attention target tracking method based on Mama, relates to the technical field of image processing, solves the problem that a traditional Mama model may cause spatial information loss in the prior art, and adopts the scheme that the method comprises the steps of data preprocessing, feature extraction, feature output, memory bank processing, template updating and target query. And constructing a joint loss function. According to the Mama-based multi-head attention target tracking method provided by the invention, the robustness and precision of tracking can be remarkably improved while the calculation efficiency is ensured, and the method has the advantages of high efficiency, strong generalization and good robustness in the target tracking field; the problem of spatial information loss when a traditional Mama model is used for extracting spatial features of a target is effectively solved.
Owner:CHANGCHUN UNIV OF SCI & TECH