278results about "Synchronisation signal speed/phase control" patented technology

Some embodiments relate to a communication network comprising at least one receiver system optically coupled to a plurality of transmitter systems for transmission of synchronization signals generated by the at least one receiver system to the plurality of transmitter systems over a unidirectional synchronization channel. The at least one receiver system configured to embed into the synchronization signals thereby generated additional data indicative of an internal time count thereof for synchronization of transmission of data / signals from each one of the plurality of transmitter systems to said at least one receiver system over a sparse data / signals unidirectional communication channel.

Transceiver array synchronization by receiving a clock signal and at least one synchronization pulse signal at each transceiver IC of a plurality of transceiver integrated circuit (IC) subarrays, wherein each transceiver IC subarray contains a respective set of serially connected transceiver ICs; and synchronizing the transceiver IC with other transceiver ICs of the respective set of serially connected transceiver ICs by resetting a delta-sigma modulator (DSM) circuit to a predetermined state in accordance with the received at least one synchronization pulse signal.

The invention relates to a device, in particular a microcontroller, for synchronizing or adjusting a clock signal for software, comprising a processor for executing the software based on the clock signal, wherein the clock signal defines the beginning or the end of a software period, a measurement timer module that increments a timer value based on a device clock, an output unit designed to output a signal to a signal output of the device at the beginning of a synchronization period defined by the software period or a multiple thereof, an input unit designed to receive an input signal at a signal input of the device, and a register unit designed to store a current timer value of the measurement timer module at the end of the synchronization period.wherein the measurement timer module is designed to reset the timer value to a start value, in particular to zero, upon receiving an input signal. The invention is characterized by a comparator unit designed to compare the timer value stored in the register unit with the synchronization period and, depending on the comparison result, to adjust at least one subsequent period of the clock signal for the software running on the processor, in particular to lengthen or shorten it.

The invention provides a data receiving method, a data sending method and a data exchange device, and the method comprises the steps: changing the frequency of a second clock signal in response to the change of a reference clock from a first preset frequency to a second preset frequency, and enabling the frequency of the second clock signal and the frequency of the reference clock to meet a preset relation; according to a second preset frequency, performing delay processing or advanced processing on the second clock signal to obtain a third clock signal; receiving a serial data stream according to the third clock signal, wherein the serial data stream has a data transmission delay of a first preset duration; wherein the frequency of the third clock signal is equal to that of the first clock signal, and the phase difference between the third clock signal and the first clock signal is equal to the first preset duration. According to the invention, the transmission accuracy of the serial data stream can be ensured after the frequency of the reference clock is changed.

This disclosure generally relate to a method and system for network policy simulation in a distributed computing system. The present technology relates techniques that enable simulation of a new network policy with regard to its effects on the network data flow. By enabling a simulation data flow that is parallel and independent from the regular data flow, the present technology can provide optimized network security management with improved efficiency.

An apparatus for generating a data stream according to an embodiment is provided. The apparatus is configured to generate the data stream, such that the data stream has header data and payload data. The apparatus is configured to generate the header data such that the header data comprises a synchronization header. Moreover, the apparatus is configured to generate the synchronization header using binary coding. Furthermore, the apparatus is configured to generate the synchronization header such that the synchronization header comprises a synchronization sequence being a predefined bit sequence having a plurality of bits.

Provided is a high frequency signal receiving unit that receives a first high frequency signal and that generates a first intermediate frequency signal. A packet generating unit generates a packet on the basis of the first high frequency signal. A packet output unit outputs the generated packet to a communication path. A packet receiving unit receives the packet via the communication path. A packet interpreting unit performs synchronization processing for the packet and generates a second intermediate frequency signal. A high frequency signal transmitting unit converts the second intermediate frequency signal into a second high frequency signal and transmits the second high frequency signal. A wireless receiver receives the second high frequency signal and performs positioning or time synchronization on the basis of the second high frequency signal.

A communication system includes a master communication device and a slave communication device. The master communication device includes a first signal generator, a second signal generator, a signal combiner, and a transmitting HBC (Human Body Communication) electrode. The signal combiner combines a first signal with a second signal, so as to generate a third signal. The transmitting HBC electrode transmits the third signal through a human body. The slave communication device includes a receiving HBC electrode, a signal splitter, a processor, and an injection-locked DCO (Digital Control Oscillator). The receiving HBC electrode receives a mix signal from the human body. The signal splitter divides the mix signal into a data signal and a synchronization signal. The injection-locked DCO performs a time synchronization process according to the synchronization signal.

This invention discloses a network synchronization device that may include a matched filter. The matched filter may be configured to generate an event for synchronizing the operation of elements in the network, at least in part in response to a timing frame generated at a network switch. The event for synchronizing the operation of the element may include a first event generated at least in part in response to first information associated with a first element and a second event generated at least in part in response to second information associated with a second element. Related systems and methods are also disclosed.

A wireless communication method using a large intelligent surface (LIS) is provided. The method includes transmitting preamble signals each with a different transmission time and transmission direction, receiving preamble signals through an LIS through which an incident radio wave is received and reflected and determining a reference angle of incidence for the preamble signals, receiving the preamble signals that are delivered through a multipath from the terminal, transmitting identification information of a preamble signal having the largest reception power among the received preamble signals to the LIS server, and when the preamble signals includes a preamble signal corresponding to the identification information received from the base station, controlling the LIS such that an angle of reflection at which a data service signal transmitted from the base station is reflected by the LIS corresponds to the reference angle of incidence determined for the preamble signal of the identification information.

The present application relates to a synchronization control method, a terminal device, a network device, a chip, a computer-readable storage medium, a computer program product, a computer program, and a communication system. A method includes: receiving, by a terminal device, a first downlink signal from a network device; performing, by the terminal device, modulation on a reflected signal of the first downlink signal to obtain a first uplink signal; and sending, by the terminal device, the first uplink signal to the network device, where the first uplink signal carries synchronization information through the modulation of the terminal device, and the synchronization information is used for obtaining a timing error and / or frequency error of the terminal device. Timing accuracy may be improved by utilizing embodiments of the present application.

Techniques are provided for detection and acquisition of signals. A methodology implementing the techniques according to an embodiment includes correlating an input signal with a code sequence at a first plurality of frequency offsets and generating a first bit vector representing locations of correlation detection peaks for each of the first plurality of frequency offsets; correlating the input signal with the code sequence at a second plurality of frequency offsets and generating a second bit vector representing locations of correlation detection peaks for each of the second plurality of frequency offsets; and generating a combined bit vector and accumulating the combined bit vectors over time. The method also includes identifying two consecutive correlation detection peaks in the accumulated combined bit vectors that are separated by a number of bit locations that correspond to a selected range of Doppler offsets; and generating a signal acquisition detection in response to the identification.

The invention provides a loop parameter adaptive measurement and control signal tracking method and device, and belongs to the technical field of measurement and control, and the method comprises the steps: obtaining the tracking state parameters of a carrier ring, a code ring and a bit ring in a current tracking period; determining a bandwidth adjustment direction of the carrier ring and a bandwidth adjustment rate of the carrier ring based on the tracking state parameter of the carrier ring and the tracking state parameter of the bit ring; determining the carrier ring bandwidth of the next tracking period based on the bandwidth adjustment direction and the bandwidth adjustment rate; and determining the code loop bandwidth of the next tracking period based on the tracking state parameter of the code loop, and determining the bit loop bandwidth of the next tracking period based on the tracking state parameter of the bit loop, so as to realize the combined tracking of the carrier loop, the code loop and the bit loop on the input measurement and control signal. According to the invention, high-precision robust tracking of the measurement and control signal in a high-dynamic and low-signal-to-noise-ratio environment can be realized.

The invention relates to a method for frame synchronization for a digital receive signal, which is received at an output of a transmission channel as a consequence of a binary digital transmit signal supplied to an input of the transmission channel, wherein the binary digital transmit signal contains information to be transmitted in a data packet which has a predetermined number D of data symbols in a data section and a predetermined number S of synchronization symbols in an optional synchronization section, and wherein the binary digital transmit signal has a predetermined symbol rate, wherein the digital receive signal is represented by a sequence of digital samples and wherein a sampling frequency is used which is greater than or equal to the symbol rate.According to the invention, a sliding window is defined which has a temporal length corresponding to the temporal length of a data packet or a data segment of a data packet. At each position µ of the sliding window, a sample value is assigned to each symbol segment of the data segment and optionally to each symbol segment of the synchronization segment of the sliding window. For each position µ of the sliding window, a position value Λ is determined using a predefined metric. met[µ] is determined, using at least the sampled values ​​assigned to the symbol segments of the data segment. The metric is based on the use of a model for the transmission channel, which assumes a memory-free transmission channel and in which the digital received signal is described by a conditional probability density function for each of the possible binary values ​​of the transmitted signal. From the initial time of the sliding window in a position for which the position values ​​Λ met assume a maximum or for which the position value Λ met If a predetermined threshold is exceeded, a start time of a data packet in the digital received signal is determined. The invention further relates to a device and a computer program for implementing the method.

Novel tools and techniques are provided for implementing synchronization signal ("Sync Mark") detection using multi-frequency sinusoidal ("MFS") signal-based filtering. In various embodiments, a computing system may detect a location of a Sync Mark within a data signal, by using MFS signal-based filtering and a sliding window comprising successive search windows each having a bit length corresponding to a bit length of the Sync Mark to identify a portion of the data signal having a magnitude indicative of the Sync Mark. The computing system may refine the location of the Sync Mark within the data signal, by performing a phase measurement on the identified portion of the data signal having the magnitude indicative of the Sync Mark to identify a sub-portion of the identified portion of the data signal, the identified sub-portion having a phase indicative of the Sync Mark, the phase measurement being performed based on the MFS signal-based filtering.

To provide an air conditioning system with improved data transmission efficiency.SOLUTION: An air conditioning system (1) includes a plurality of devices (for example, an indoor device 4, an outdoor device 6). A first device (for example, the outdoor device 6) of the plurality of devices includes a decoding unit (12) that decodes a data signal, which is received from a second device (for example, the indoor device 4) of the plurality of devices via a communication line (L10), and in which data having a preamble is encoded, and outputs the decoded signal, a clock extraction unit (18) that outputs a clock signal (VCO_Out) in phase synchronization with a reference signal, where a portion of the decoded signal corresponding to the preamble is set as the reference signal (Sig_IN), and a recognition unit (16) that recognizes received data from the decoded signal input after the end of the preamble, based on the clock signal that is continuously output by the clock extraction unit (18).SELECTED DRAWING: Figure 3

The present invention is directed to a method for generating a bit sequence that can be transmitted efficiently and has a limited disparity and a limited run length. The proposed method makes it possible to transmit data particularly efficiently. Optimised disparity constitutes a quality feature for the ability to transmit data. A disadvantageous disparity may lead to data not being able to be transmitted correctly on a data channel since said data cannot be interpreted correctly by the receiver. Data streams are generated that are able to be read particularly efficiently and are also highly efficient with regard to overhang data. A transfer of data segments to subsymbols can be performed efficiently because it is performed in parallel. The invention is furthermore directed to a correspondingly configured system arrangement and a computer program product and a memory-readable medium containing control instructions that execute the method.

According to one embodiment, an apparatus (100) for generating a data stream is provided. The apparatus (100) is configured to generate a data stream such that the data stream includes header data and payload data. The apparatus (100) is configured to generate header data such that the header data includes a synchronization header. Moreover, the apparatus (100) is configured to generate the synchronization header using binary coding. Furthermore, the apparatus (100) is configured to generate the synchronization header such that the synchronization header includes a synchronization sequence, which is a predefined bit sequence including a plurality of bits.

Method (300) for providing fault-tolerant network time synchronization in a motor vehicle communication network (100), wherein the motor vehicle communication network (100) comprises: a video controller (115) coupled with a first camera (110) and a second camera (175), a lidar controller (125) coupled with a first lidar transceiver (130) and a second lidar transceiver (120), a radar controller (145) coupled with a first radar transceiver (140) and a second radar (150), a processor (160), a user interface (165), a vehicle controller (155) and a trailer interface (170) the procedure includes the following: Generation of a time synchronization signal; Transmission of the time synchronization signal from a first switch (415) to a second switch (425) via a first connection and from the first switch (415) to a third switch (435) via a second connection; Detecting a connection error on the second connection; and Transmitting the time synchronization signal from the second switch to the third switch (435) via a third connection in response to the connection fault, wherein the time synchronization signal is generated by a radar controller coupled to the first switch, and wherein a first radar sensor is coupled to the second switch and a second radar sensor is coupled to the third switch, wherein the lidar controller (125), the video controller (115) and the radar controller (145) are each configured to receive and process data from their respective sensors, and the video controller (115) is set up to receive images from the first camera (110) and the second camera (175) and to process the images to generate image data for use in creating an object map around the vehicle (105).

Provided are a method and apparatus for sending a reference signal, a method and apparatus for receiving a reference signal, vehicle user equipment (UE), and a terminal. The method for sending a reference signal comprises: determining transmission configuration information of a synchronization signal block VSSB in an NR V2X system, the transmission configuration information comprising: a sending period of the VSSB and a time domain position of a VSSB sending time window in the sending period; and sending, according to the transmission configuration information, N VSSB within the VSSB sending time window which appears periodically, N being an integer greater than or equal to 1, and each VSSB comprising: a primary sidelink synchronization signal (PSSS), a secondary sidelink synchronization signal (SSSS), a physical sidelink broadcast channel (PSBCH), and a demodulation reference signal (DMRS). The use of the method for sending a reference signal provided in the present disclosure can ensure quick time domain synchronization between a vehicle-mounted device and a receiving terminal in an NR V2X system.

The application provides an uplink overhead configuration method, an optical fiber network system and related equipment, which are used for separately configuring uplink overheads for sub-devices supporting specific uplink rates, and improving the efficiency of uplink bursts. A first message received by a first sub-device contains first indication information, and the first indication information is used to indicate that the first message is applicable to configuring uplink burst overhead parameters of a sub-device supporting a first uplink rate. The first sub-device determines that the first sub-device triggers the configuration of uplink burst overhead parameters of the first sub-device based on the first message only when the first sub-device supports the first uplink rate, and does not trigger other sub-devices supporting uplink rates (uplink rates other than the first uplink rate) to configure uplink burst overhead parameters based on the first message. This is conducive to realizing the separate configuration of uplink overheads for sub-devices supporting specific uplink rates, and further improving the efficiency of uplink bursts.

The invention relates to electronic equipment, a signal processing method, a storage medium and a computer program product. The electronic device includes: a plurality of antenna radiators; a clock module configured to output a clock signal; and the digital delay module is connected with the clock module and each antenna radiator, and is configured to respond to the clock signal and perform phase delay processing on the electric signal transmitted by each antenna radiator, so that each antenna radiator receives and transmits wireless signals of different phases. According to the embodiment of the invention, the phase precision of receiving and transmitting signals of the antenna radiator can be improved, and the wireless signal receiving and transmitting performance of the antenna radiator is improved.

A method of reducing the effects of variation in latency in data transfer between clock domains of a physical layer transceiver, the physical layer transceiver comprising physical coding sublayer circuitry having a first clock in a first clock domain and physical medium attachment circuitry having a second clock in a second clock domain, comprising: during initial training of the link, determining a transmit latency value in a transmission direction from the first clock domain to the second clock domain; during initial training of the link, separately from determining the transmit latency value, determining a receive latency value in a reception direction from the second clock domain to the first clock domain; and using the transmit latency value and the receive latency value to calculate latency in data transfer between the first clock domain and the second clock domain after the initial training until a subsequent training.

A communication system comprises a master control communication device and a slave communication device. The master control type communication device comprises a first signal generator, a second signal generator, a signal combiner and an emission type human body communication electrode. The signal combiner may combine the first signal with the second signal to generate a third signal. The emission type human body communication electrode can transmit a third signal through the human body. The slave communication device comprises a receiving type human body communication electrode, a signal distributor, a processor and an injection locking digital control oscillator. The receiving type human body communication electrode can receive a mixed signal from a human body. The signal distributor can divide the mixed signal into a data signal and a synchronization signal. The injection-locked digitally controlled oscillator may execute a time synchronization procedure according to the synchronization signal.

Aspects of the subject disclosure may include, for example, obtaining, from a sampling device of a receiver, samples of a signal that is received from a transmitter, and facilitating acquisition between the receiver and the transmitter by deriving, based on the samples, a phase error output for centering a sampling clock of the sampling device with respect to a transmitter clock, wherein the deriving involves estimating group delay using a detection algorithm that is based on a blind Godard LMS algorithm.

The application provides a 10GBase-T physical layer synchronization and equalization method and device, which realizes fast capture of a PN training sequence in PN synchronization by using iteration interaction of a multi-state equalizer and a PN synchronization algorithm; meanwhile, the multi-state equalization method in the equalizer has a high multiplexing degree and an inheritance characteristic of equalization training results on hardware, which can greatly reduce hardware overhead of a synchronization and equalization module in 10GBase-T and significantly improve convergence speed of equalization training; further, with training convergence of filter coefficients in the equalizer, the quality of equalization output signals is continuously improved, and input of the equalization output results to the PN synchronization module will further improve stability of PN synchronization tracking and reduce step-out probability.

The invention discloses a cloud computing analysis method based on a time mark pulse sequence, and belongs to the technical field of signal processing. The method is used for solving the technical problems that in an existing scheme, delay nonlinearity caused by multipath propagation is not considered, and effective decoupling cannot be achieved due to a coupling effect existing in atomic clock error estimation and system deviation. A direct component and a scattering component can be distinguished through time scale layered mapping, and the amplitude-phase-frequency coupling effect of multi-path propagation is covered by fusing the three-dimensional characteristics of delay inequality, amplitude attenuation and frequency drift; the nonlinear mapping capability of the hyperbolic tangent kernel function is superior to that of a linear model, and the hyperbolic tangent kernel function can adapt to time delay nonlinear change in a complex electromagnetic environment; clock error, time delay parameters and system deviation are modeled in a unified mode, error accumulation caused by traditional separation estimation is avoided, variable dependency is quantized through an information theory tool, mutual information decoupling is achieved, robustness is enhanced, and a decoupling result directly corresponds to an atomic clock core index and system interference.

The described techniques enhance the conventional SPC communication protocol in various ways to provide further flexibility for various applications while improving performance. This includes the use of an alternative trigger signal that may encode a time base reference of a primary device as well as state data (e.g. an address, configuration data, etc.), which is transmitted to one or more secondary devices. This also includes the use of an end-of-frame (EoF) signal that may be introduced into an SPC data frame to enable the use of a variable data frame length. Still further, techniques are described for the use of another alternate trigger signal that includes a wake up signal that is recognized by a receiving device, which causes the receiving device to transition from a low power mode of operation to a communicating mode of operation.