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3495results about "Synchronisation signal speed/phase control" patented technology

Bandwidth asymmetric communication system

The present invention relates to a communication system comprising a plurality of terminals each having an uplink transmission unit (1) for transmitting radio frequency OFDM signals at a radio frequency and an access point having an uplink receiving unit (4) for concurrently receiving said radio frequency OFDM signals from at least two terminals, said OFDM signals being Orthogonal Frequency Division Multiplex (OFDM) modulated, wherein the bandwidth of said uplink transmission units and of the transmitted radio frequency OFDM signals is smaller than the bandwidth of said uplink receiving unit and that the bandwidth of at least two uplink transmission units and of their transmitted radio frequency OFDM signals is different. The present invention relates further to a communication system wherein the access point has a downlink transmission unit (7) for transmitting radio frequency OFDM signals at a radio frequency and that the at least two terminals each have a downlink receiving unit (11) for receiving said radio frequency OFDM signals, wherein the bandwidth of said downlink transmission unit is larger than the bandwidth of said downlink receiving units and that the downlink transmission unit is adapted to generate and transmit radio frequency OFDM signals having a bandwidth that is smaller than or equal to the bandwidth of the downlink transmission unit and that is equal to the bandwidth of the downlink receiving unit by which the radio frequency OFDM signals shall be received. Still further, the present invention relates to a communication method, to a terminal and to an access point for use in such a communication system.
Owner:KONINKLIJKE PHILIPS ELECTRONICS NV

Method and system for frequency synchronization

The present invention provides a method of synchronising the frequency of a slave clock to that of a master, preferably using a packet network. An aspects of the invention provide a method of synchronizing the frequency of a slave clock in a slave device to a master clock in a master device, the method including the steps of: a) receiving in the slave device a first message from said master device having a first time-stamp which is a time-stamp of said master clock indicating the time of sending of said first message; b) extracting said time-stamp from said message and initializing a counter in the slave device which counts an output of said slave clock; c) receiving in the slave device a further message from said master device and reading the value of said counter at the time of receipt of said further message; d) extracting a further time-stamp which is the precise time of sending of the further message according to said master clock; e) determining an error signal which is representative of the difference between said value of the counter and the difference between said first and further time-stamps; and f) adjusting the frequency of said slave clock based on said error signal. An apparatus for synchronizing the frequency of a clock in a slave device which is communicatively coupled to a master device is also provided.
Owner:KHALIFA UNIV OF SCI & TECH +2
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