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95 results about "Clock offset" patented technology

Clock Offset - offset of the clock is a delay of a given clock source, it might be known, or unknown. Offset can be measured in time units or phase degree.

Behavior-driven twinborn prediction method

The invention discloses a behavior-driven twinborn prediction method, and relates to the technical field of intelligent information processing and prediction modeling, and the method comprises the following steps: building a unified event time baseline, collecting nanosecond clock offset information of each data source, building a cross time sequence suspicion chart, recognizing time synchronization abnormal nodes, and forming a credible time anchor point set; and based on the trusted time anchor point set, executing anti-fact playback, reconstructing a historical evolution process of behavior data, generating a time offset vector set, and constructing a corresponding time sequence offset spectrum. According to the method, through construction of a unified time baseline, trusted anchor points, anti-fact replay, causal topology and time reversal control, time sequence dislocation identification, calibration and false trajectory elimination of multi-source behavior data are realized, a dynamic self-healing closed-loop prediction mechanism is established, and the twin system prediction accuracy and stability are improved.
Owner:ANHUI WATER CONSERVANCY TECHN COLLEGE

High-resolution peak value positioning method based on multi-pulse superposition and offset clock cooperation

The invention discloses a high-resolution peak value positioning method based on multi-pulse superposition and offset clock cooperation, and belongs to the technical field of laser radar ranging. Aiming at the problems that a traditional laser radar depends on a high-sampling-rate ADC, so that hardware cost is high, power consumption is large, and sampling errors are likely to be caused by echo jitter, the method does not need to replace an existing ADC, and the technical breakthrough is achieved through the following core steps that firstly, the basic sampling rate X Hz and the target equivalent sampling rate improvement multiple N of the ADC are determined; laser pulses are emitted to a target object for N times, during Kth emission, ADC sampling is started by delaying (K-1) / (X * N) seconds, and N groups of echo data with time sequence offset are obtained; performing cross combination on the N groups of data, and constructing an N-time equivalent high-sampling-rate data sequence; repeating the sampling and combining process for S times, and performing alignment superposition and averaging on S groups of data to suppress echo jitter and noise; and estimating initial parameters (amplitude, mean value and standard deviation) of a Gaussian model based on the superposed data, optimizing the parameters through an LM nonlinear optimization algorithm, and finally taking the optimized mean value as a high-precision peak position of an echo signal to realize accurate measurement of the laser flight time. Under the condition of low-sampling-rate hardware, through the collaborative design of clock skew and multi-pulse superposition, the physical limitation of the sampling rate is broken through, low cost, low power consumption and high ranging precision are taken into account, and the method is adaptive to multi-scene application of automatic driving, industrial ranging and the like.
Owner:GUILIN UNIV OF ELECTRONIC TECH

Chip time sequence analysis method and device

The invention provides a chip time sequence analysis method and device, and the method comprises the steps: determining the second data path time delay between the corresponding ports of interconnected modules according to the first data path time delay of the corresponding port of each module and the interconnection relation information between the modules under the condition that a plurality of modules are in a target stable state, the interconnection module comprises two modules which are directly connected in the modules; and determining convergence information of the top time sequence of the interconnection modules according to the clock period, the trigger establishment time, the clock uncertainty, the clock skew between the interconnection modules and the second data path time delay. According to the method and the device, the time sequence between the interconnected modules can be quickly analyzed before the top-layer time sequence analysis is executed, and the time sequence analysis efficiency of the top layer of the chip is improved without waiting for all the modules to complete a physical implementation process.
Owner:SHANGHAI BIREN TECH CO LTD

Time sequence synchronization method and system for data fusion of multi-modal wearable sensor, terminal and storage medium

The invention discloses a time sequence synchronization method and system for data fusion of a multi-modal wearable sensor, a terminal and a storage medium. The method comprises the following steps: acquiring an absolute timestamp as a global clock source; taking the global clock source as a master clock of a precision time protocol, configuring the plurality of wearable sensors as slave clocks, and executing multiple rounds of message interaction between the master clock and the slave clocks through the precision time protocol to obtain a timestamp corresponding to each round of interaction; and calculating the current path time delay and the current clock offset according to the corresponding timestamps, carrying out iterative judgment on the current path time delay and the current clock offset according to a preset path time delay threshold value and a preset clock offset threshold value, and determining whether to correct the local clock according to the current clock offset according to an iterative judgment result. The slave clock and the global clock source achieve time sequence synchronization; and after time synchronization is achieved, phase alignment is carried out on the periodic data sampling tasks of the multiple wearable sensors. According to the invention, the time sequence synchronization precision is obviously improved.
Owner:SHENZHEN UNIV

Multi-terminal clock synchronization method, system, equipment and medium

The invention provides a multi-terminal clock synchronization method, system and device and a medium, and relates to the technical field of wireless communication, and the method comprises the following steps: a master device sends a synchronization request packet to an ith slave device at a first sending moment; the ith slave device receives the synchronization request packet at the first receiving moment and sends a synchronization response packet to the master device at the second sending moment; the master device receives a synchronization response packet at a second receiving moment, and determines a first receiving moment and a second sending moment according to the synchronization response packet; determining a transmission delay parameter and a clock offset parameter according to the first sending moment, the second sending moment, the first receiving moment and the second receiving moment, and sending the transmission delay parameter and the clock offset parameter to the ith slave device; and the ith slave device adjusts a local timer according to the transmission delay parameter and the clock offset parameter, so that clock synchronization between the ith slave device and the master device is realized. According to the invention, high-precision clock synchronization between multiple slave devices and the master device is realized.
Owner:MALANSHAN AUDIO & VIDEO LABORATORY

Time synchronization method and equipment

The invention provides a time synchronization method executed by slave equipment, and the method comprises the steps: receiving a time synchronization packet from master equipment, and obtaining the packet transmitting time of the master equipment and the packet receiving time of the slave equipment; calculating a clock offset value between the slave device and the master device based on the packet transmitting time of the master device, the packet receiving time of the slave device and the path delay calibration value, and correcting a local clock of the slave device; wherein the path time delay calibration value is related to the distance between the master device and the slave device. The method can correct the clock skew between the master device and the slave device in real time, and improves the time synchronization precision.
Owner:ESPRESSIF SYST SHANGHAI

Electricity stealing identification method and system based on multi-source data, electronic equipment and medium

The invention relates to the technical field of power system monitoring, in particular to an electricity stealing identification method and system based on multi-source data, electronic equipment and a medium. The method comprises the following steps: acquiring a running data stream and a local timestamp to obtain a plurality of groups of time sequence data sets; extracting an electrical quantity sudden change event or a non-commanding switch action event in each group of time sequence data set; constructing a multi-constraint model based on the topological connection relationship of the power line, the Kirchhoff's law and the energy conservation law; iteratively calculating the clock offset of each monitoring device relative to the system logic time; and inversely solving node current unbalance and loop power unbalance so as to output a judgment result of an electricity stealing event. Through the mode, the technical problem of cyclic dependence between event causal inference and timestamp calibration under the condition of multi-source asynchronous monitoring data in the prior art is solved, and the reliability, the accuracy and the automation level of electricity stealing behavior analysis are improved.
Owner:STATE GRID ZHEJIANG ELECTRIC POWER CO LTD CANGNAN COUNTY POWER SUPPLY CO

Time sequence optimization method of clock tree and computer readable storage medium

The invention discloses a time sequence optimization method of a clock tree and a computer readable storage medium, and relates to the technical field of clock tree synthesis and time sequence optimization. The method comprises the steps that a to-be-processed time sequence path is obtained, time sequence optimization is conducted on the to-be-processed time sequence path from the to-be-processed time sequence path, and time sequence optimization comprises the steps that a register with the minimum time sequence margin is determined as a to-be-processed register; determining a target fan-in end timing margin according to the plurality of fan-in end timing margins of the to-be-processed register; and / or determining a target fan-out end timing margin according to the plurality of fan-out end timing margins of the register to be processed; calculating a clock offset according to the target fan-in end timing margin and / or the target fan-out end timing margin; adjusting the time sequence margin of each fan-in end of the register to be processed and / or the time sequence margin of each fan-out end of the register to be processed according to the clock offset; and updating the to-be-processed time sequence path until a set ending condition is met.
Owner:SHENZHEN HONGXIN MICRO NANO TECH CO LTD +1

Substation-oriented anchor point timestamp calibration method and related device

The application provides a substation-oriented anchor point timestamp calibration method and related device, which is applied to a collection terminal in a substation monitoring system, the substation monitoring system further comprises a master clock and a sensor in communication connection with the collection terminal, and the method comprises the following steps: determining a drift parameter of a local crystal oscillator of the collection terminal according to a clock offset sequence between the collection terminal and the master clock in a plurality of continuous synchronization periods; correcting a sampling counter in the collection terminal by using the drift parameter; if a transient partial discharge signal is detected according to a data frame sequence collected by the sensor on a target metal pipeline in the substation, a dynamic anchor point is established at a triggering moment of the transient partial discharge signal; and based on the dynamic anchor point, the generated sampling count sequence after correction and a time reference of the collection terminal, a data frame related to the transient partial discharge signal in the data frame sequence is timestamped. The accuracy of timestamping is improved.
Owner:SICHUAN RUITING ZHIHUI TECH CO LTD

Power distribution network distributed measurement synchronization method and device based on beidou satellite timing

ActiveCN120729459B
The application discloses a power distribution network distributed measurement synchronization method and device based on Beidou satellite timing, and belongs to the technical field of power distribution network measurement, which comprises the following steps: acquiring Beidou satellite signals to calibrate local clock sources and generate a standard time reference; when continuously monitoring the quality parameter of the Beidou satellite signals is lower than a quality threshold, collecting clock working environment parameters of the local clock sources and combining the standard time reference to generate a short-term clock offset prediction value; generating a topological correction amount according to the topological connection relationship of the power distribution network; and fusing the short-term clock offset prediction value and the topological correction amount to generate a dynamic compensation time reference, time marking the collected electrical quantity measurement data of the power distribution network, and generating time-stamped synchronous measurement data. The technical scheme of fusing the local clock drift prediction value and the adjacent node topological correction amount to generate the dynamic compensation time reference when the Beidou signal is lost can significantly improve the precision and robustness of the measurement data synchronization of the power distribution network in a complex environment.
Owner:SHANDONG UNIV OF TECH

Re-estimating clock offset of a frequency selective wireless channel

Aspects discussed herein include a method and associated network device and computer program product. The method includes receiving a network packet and estimating a power profile corresponding to a plurality of subcarriers of a channel using a preamble of the network packet. The method also includes estimating a carrier frequency offset using the power profile and estimating a clock offset using the carrier frequency offset.
Owner:CISCO TECHNOLOGY INC

Method of compensating for clock skew between devices during UWB-MMS ranging

A low complexity clock drift estimation scheme for UWB-MMS ranging is presented that assumes that a sampling frequency offset (SFO) and a carrier frequency offset (CFO) are driven from the same clock source. The SFO is first estimated with a plurality of CIR segments, and the SFO is used to compensate for the CFO of the CIR segments. A fine CFO estimate is then obtained from the compensated CIR. Combining the coarse SFO and fine CFO estimates to resample and phase rotate the original CIR can significantly improve the performance of the CIR combination, thereby improving the performance of ranging.
Owner:NXP BV

Synchronization accuracy optimization method for end-to-end transmission mode clock synchronization system

This invention relates to a method for optimizing synchronization accuracy in end-to-end transmission mode clock synchronization systems. First, the master and slave nodes within the clock synchronization system exchange PTP messages in end-to-end transmission mode according to the IEEE 1588 Precision Clock Protocol. The slave node obtains the timestamps and transmission delays recorded in each PTP message. Then, the slave node uses a filtering algorithm to process the forward and reverse transmission delays. Combining this with the clock offset calculation formula in the IEEE 1588 Precision Clock Protocol, the clock offset between the slave node and the master clock is calculated using the timestamps in the PTP messages and the processed transmission delays. Finally, the calculated clock offset is used to adjust the local clock. This invention solves the problem of asymmetric delays during message transmission affecting the clock synchronization accuracy between the master and slave nodes in end-to-end transmission mode clock synchronization systems, improving the time synchronization accuracy between devices in network communication systems and having broad application prospects.
Owner:SHENYANG INST OF AUTOMATION - CHINESE ACAD OF SCI

Artificial intelligence-based base station clock information synchronization method and system, and related device

The present disclosure provides an artificial intelligence-based base station clock information synchronization method and system and related equipment, relating to the field of communication technology. The method comprises: collecting clock state data and / or network performance data of each operator base station in a first time period; fusing the clock state data and / or network performance data of each operator base station in the first time period to construct a cross-operator base station clock synchronization feature matrix; inputting the cross-operator base station clock synchronization feature matrix into a pre-trained clock offset prediction model to output base station clock offset trend information of each operator base station in a second time period, the second time period being a time period occurring after the first time period; and performing a clock information synchronization operation on each operator base station according to the base station clock offset trend information of each operator base station in the second time period. The present disclosure can effectively improve the service quality of the co-construction and sharing network and reduce the decline in service experience caused by the unsynchronized base station clocks.
Owner:CHINA TELECOM CORP LTD +1

A time sequence synchronization method, system, terminal and storage medium for multi-modal wearable sensor data fusion

ActiveCN121727677BComputer hardwarePathPing
The application discloses a kind of multi-modal wearable sensor data fusion-oriented timing synchronization method, system, terminal and storage medium, the method includes: obtaining absolute timestamp as global clock source;Global clock source is as the master clock of precision time protocol, a plurality of wearable sensors are configured as slave clock, through precision time protocol, multiple rounds of message interaction are performed between master clock and slave clock, and the timestamp corresponding to each round of interaction is obtained;According to the corresponding timestamp, the current path delay and the current clock offset are calculated, and according to the preset path delay threshold and clock offset threshold, the current path delay and the current clock offset are iteratively judged, whether the local clock is corrected according to the current clock offset is determined according to the iterative judgment result, until slave clock and global clock source achieve timing synchronization;After achieving time synchronization, the periodic data sampling tasks of a plurality of wearable sensors are phase-aligned.The application significantly improves timing synchronization accuracy.
Owner:SHENZHEN UNIV

Clock synchronization method based on adaptive dynamic adjustment Kalman filter

The invention relates to the technical field of clock synchronization, in particular to a clock synchronization method based on a self-adaptive dynamic adjustment Kalman filter, which comprises the following steps of: defining a state vector containing clock skew and drift by adopting a second-order clock model, constructing a state transition and observation model, and calculating the state of the state transition and observation model; adaptively estimating a noise covariance based on a historical residual sliding window; measuring and predicting residual errors are recorded in each round of filtering, and the prediction residual errors are quantized; the residual error is stored in a sliding window, sample variance is calculated to obtain noise covariance initial estimation, and meanwhile, a simplified model of the proportional relation between clock skew and drift noise covariance is assumed; according to a covariance matching principle, using maximum likelihood estimation to calculate observation and process noise covariance from a sliding window residual error, that is, measuring a residual error square mean value as an observation noise covariance, presenting the process noise covariance in a matrix form, and accurately estimating noise characteristics; and performing exponential weighted moving average updating on the noise covariance by using a smoothing factor, performing Kalman filtering prediction and updating iteration to obtain clock skew and drifting optimal estimation, correcting a local clock according to the clock skew and drifting optimal estimation, and performing loop iteration to realize high-precision clock synchronization. According to the method, the noise covariance can be estimated and adjusted in real time, higher synchronization precision, higher convergence speed and higher robustness can be realized in a complex environment, and the problem that high-precision and stable clock synchronization is difficult to guarantee in a non-stable and high-dynamic wireless environment by the existing method is solved.
Owner:BEIJING DUWEI TECH CO LTD +1

GNSS receiver clock modeling method based on power-law noise

The embodiment of the invention discloses a GNSS receiver clock modeling method based on power-law noise, and relates to the technical field of satellite navigation positioning, and the method comprises the steps: obtaining phase difference data between a local clock and a reference clock, and obtaining a diffusion coefficient of clock noise through extraction based on the phase difference data; establishing a clock state space equation containing a clock offset parameter and a frequency offset parameter, and calculating a process noise covariance matrix of the clock state space equation based on the diffusion coefficient; and embedding the two-dimensional clock random state model and the process noise covariance matrix into a process noise embedding filtering estimation algorithm, and calculating to obtain a clock offset parameter, a frequency offset parameter and a three-dimensional coordinate parameter of the receiver. According to the method, estimation noise of receiver frequency deviation can be remarkably suppressed, and the short-term stability of the elevation direction in GNSS dynamic positioning is effectively improved. The method and the device are suitable for the GNSS terminal adopting a low-cost clock so as to realize high-precision time synchronization and positioning.
Owner:WUHAN UNIV

Clock offset error calibration circuit and integrated circuit

The application discloses a clock offset error calibration circuit and an integrated circuit, and is applied to the technical field of integrated circuits, wherein a common-mode signal channel is connected with a first differential input end and a second differential input end simultaneously; a differential signal input end is connected with an ADC module; a service signal end and a correction signal end are connected with the ADC module; the common-mode signal channel is used for inputting a test signal to the first differential input end and the second differential input end; and the ADC module is used for obtaining a voltage signal; the service signal end generates a service signal; the correction signal end generates a correction signal; the correction signal is associated with the service signal; and a clock offset error is obtained. The test signal is injected into the differential signal through the common-mode signal channel, so that the test signal and the service signal existing in the differential signal channel are completely separated, the clock offset error information is conveniently extracted, and finally, the clock offset error is compensated in a clock circuit, so that the accurate calibration of the clock offset error is realized.
Owner:SHENGMO MICROELECTRONICS (SUZHOU) CO LTD

Combined clock synchronization method based on weighting condition adjustment improvement

The invention relates to a combined clock synchronization method based on weighting condition adjustment improvement, which realizes high-precision time synchronization in a large-scale sensor node network scene. The method comprises the following steps: carrying out bidirectional ranging on bidirectional communication nodes in a sensor node network by adopting a synchronous bidirectional ranging mechanism to obtain a pseudo-range information model between the nodes; constructing an observation equation according to the pseudo-range information model, and performing estimation solution on the observation equation by adopting a least square method to obtain initial observation estimation; calculating to obtain clock offset error estimation between the nodes according to the pseudo-range information model and the initial observation estimation, and constructing to obtain a weighting condition adjustment model according to the clock offset error estimation; correcting a pseudo-range observation value in the pseudo-range information model according to a weighted condition adjustment model to obtain a de-noised observation value; and constructing a new observation equation according to the de-noised observation value, and performing estimation solution on the new observation equation by adopting a least square method to obtain optimized observation estimation.
Owner:GUANGDONG UNIV OF TECH

Reconfigurable quantum communication route synchronization system for urban trunk network

The application discloses a reconfigurable quantum communication route synchronization system for urban trunk network, relates to the technical field of quantum communication, and comprises a quantum channel state perception module, a clock offset prediction and registration module, a reconfigurable route planning engine, an entangled state registration and regulation module, a synchronization instruction scheduling module and an optimization module; the system perceives the decoherence time, entanglement fidelity and synchronization offset risk of a quantum link in real time, generates a quantum link feasibility score map in combination with a graph neural network, and outputs an optimal entanglement forwarding path accordingly; meanwhile, the transmission window width and rhythm are dynamically adjusted based on the task priority and network load, high-precision synchronization and resource coordination across nodes are realized, the communication performance evaluation model and feedback learning mechanism are introduced, and the route and synchronization strategy can be continuously optimized; and the application significantly improves the stability of the quantum communication system in a complex urban network environment.
Owner:CHINA NAT INST OF STANDARDIZATION

Timing Distribution in a Variable Wireless Environment

A computer-implemented method maintains time synchronization over a wireless connection through variable operational conditions. The wireless device determines an operating mode based on the operational conditions of the wireless device. When the wireless device receives a time synchronization message from a remote device, the wireless device determines a clock offset between its local clock and a remote clock of the remote device. The clock offset is based on the operating mode and information in the time synchronization message. The wireless device adjusts its local clock to mitigate the clock offset from the remote clock. The wireless device also determines timing window(s) based on the local clock and receives a wireless data message beginning within a first timing window.
Owner:RAMPART COMMUNICATIONS INC

Method, apparatus, electronic device and computer program product for backhaul

PendingCN122373181AData packClock offset
The application relates to a back connection method, device, electronic equipment and computer program product, and is used for a first electronic equipment. The method comprises the following steps: in the process of initiating a back connection paging to a second electronic equipment, acquiring a clock offset corresponding to the second electronic equipment; determining a current clock estimation value of the second electronic equipment according to the clock offset; and sending a paging data packet to the second electronic equipment according to the clock estimation value, wherein the paging data packet is used for back connection between the first electronic equipment and the second electronic equipment. The method can reduce the back connection time delay.
Owner:GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP LTD

Modulation parameter blind identification method, system and device for non-cooperative OTFS system, and medium

A modulation parameter blind identification method, system and device for a non-cooperative OTFS system, and a medium, the method comprising: performing OTFS modulation on a sending end signal, and transmitting the signal through multipath fading and a noise channel; the OTFS system blind identification receiving end receives an undemodulated OTFS signal and processes the undemodulated OTFS signal in two steps: performing OTFS frame structure parameter blind identification based on a cyclostationary autocorrelation function to obtain a delay dimension lattice number, a cyclic prefix (CP) length and a Doppler dimension lattice number; time-frequency synchronization parameter estimation: estimating symbol clock skew by using a delay dimension and Doppler dimension combined autocorrelation method to obtain symbol initial clock skew; estimating carrier frequency offset by using a CP-tail phase difference method to obtain a carrier frequency offset factor; according to the method, the modulation parameters of the OTFS system can be obtained under the condition that pilot frequency or prior frame information cannot be predicted in non-cooperative communication, meanwhile, the method has the capability of inhibiting multipath and mobile Doppler, and key technical support is provided for passive monitoring, classification and reconnaissance of non-cooperative OTFS signals.
Owner:XIDIAN UNIV

LoRa device identification system and method based on clock fingerprint features

The application discloses a LoRa device identification system and method based on clock fingerprint characteristics, and belongs to the technical field of device identification. A time synchronization module utilizes frequency hopping spread spectrum in the LoRa device to change the time stamp when the channel interruption record sends the preamble and header of a data packet, writes the time stamp into a radio frequency FIFO to be sent together with the message, and records the time stamp when the receiving party receives the completed message, calculates the compensation time through the transmission parameters and the data packet size, and obtains a time stamp pair reflecting the clock crystal relationship of the device; a feature extraction module fits the clock relationship between the devices through the least square method, obtains the clock offset reflecting the clock crystal characteristics of the device as the device fingerprint; a fingerprint identification module maintains a fingerprint library of the legal devices, performs fingerprint matching of the devices through the nearest neighbor algorithm and a set threshold, and realizes identification of the devices. The application has the advantages of being not easy to be attacked, high safety, and low cost.
Owner:BEIJING INST OF TECH

Data consistency processing method and device, electronic equipment and storage medium

The embodiment of the invention provides a data consistency processing method and device, electronic equipment and a storage medium, and relates to the technical field of time synchronization, and the method comprises the steps: obtaining clock skew with a regional server and a main clock; compensating the master clock according to the clock offset, and taking the compensated master clock as a local clock; obtaining target data corresponding to the DTU module, and encrypting the target data according to the local clock to obtain corresponding service data; and sending the service data to the data center, thereby effectively reducing the time service error through clock compensation, meeting the requirement of a continuous acquisition scene for long-term clock stability, reducing the influence of public network time delay through separation of the service data and the time service signal and encryption through the clock, improving the time synchronization precision, and improving the time synchronization accuracy. And thus, the data consistency is ensured.
Owner:GREE ELECTRIC APPLIANCE INC OF ZHUHAI +1

A method for multi-dimensional fault perception and millisecond-level switching of containerized time-sensitive network centralized configurator and electronic equipment

The embodiment of the application provides a kind of container time-sensitive network centralized configurationer multi-dimensional fault perception and millisecond level switching method and electronic equipment, it is related to industrial network technical field, the method comprises: deployment multi-dimensional health perception engine, periodically detect whether fault occurs, wherein the fault includes: GCL service conflict, gPTP clock offset, scheduling calculation timeout;When detecting fault for N consecutive times, trigger main CNC container self-destruction and activate spare CNC container, N is the integer greater than 1;Spare CNC container synchronizes hierarchical hot backup state, including: synchronization flow table operation log, synchronization topology incremental snapshot and synchronization scheduling intermediate state memory mirror;Atomic switching instruction is sent to switch through hardware acceleration channel, and GCL millisecond level effect is realized.The technical scheme of the application, by using the processing logic of service state perception+ hierarchical hot backup+ hardware acceleration switching, guarantees the service state consistency, solves the problem of high delay.
Owner:CHENGDU CHENGDIAN GUANGXIN TECH

Multi-device collaborative music scene linkage control method

The invention relates to the technical field of multi-device audio synchronization, and particularly discloses a multi-device collaborative music scene linkage control method, which comprises the following steps: firstly, acquiring clock oscillation characteristic parameters and temperature sensing parameters of each audio playing terminal through an audio rendering host; constructing a multi-dimensional observation vector containing a physical state and a network transmission dimension by combining network time sequence parameters; performing parameter coupling analysis and state transition calculation on the observation vector to generate a clock state prediction value containing a clock skew prediction value and a clock drift rate prediction value; generating a feed-forward compensation instruction according to the predicted value, and synchronously sending the feed-forward compensation instruction and the audio data packet through time domain alignment packaging; and finally, calculating an actual synchronization error based on an instruction execution result, and switching to a prediction synchronization mode when the error exceeds a limit. Through multi-dimensional state sensing and dynamic mode switching, the technical problem that high-precision synchronization of a multi-device audio system is difficult to maintain in a complex environment is solved.
Owner:JINAN VOCATIONAL COLLEGE

Timing violation repair methods, devices, electronic equipment and storage media

This application provides a timing violation repair method, apparatus, electronic device, and storage medium, belonging to the field of electronic circuits. The method includes: obtaining path values ​​between adjacent registers in a chip; determining path information related to a timing violation register based on a preset level N and the path values ​​between the adjacent registers; and determining a clock offset for repairing the timing violation register based on the worst-case timing value of the timing violation register, the worst-case timing values ​​of multi-level registers connected to the timing violation register, and the path information related to the timing violation register. By analyzing the path values ​​and worst-case timing values ​​between multi-level registers before and after the timing violation register, a global clock offset is achieved through the timing logic, improving the effectiveness of timing violation repair.
Owner:NANJING ILUVATAR COREX TECH CO LTD (DBA ILUVATAR COREX INC NANJING)

Systems and methods for inter-tool synchronization

A method includes transmitting the hybrid timing signal, via a master clock, to the local clock of the tool, wherein the hybrid timing signal comprises one or more wide-band signal sections and one or more narrowband signal sections. The method also includes calculating an initial clock offset between the local clock of the tool and the master clock, based on a difference in the time of arrival and the hybrid timing signal at the local clock and a time of transmission of the hybrid timing signal and synchronizing the tool based on the initial clock offset.
Owner:SCHLUMBERGER TECH CORP

A Kalman filtering-based time synchronization method, device, medium and product applied to a distributed system

ActiveCN120803209BGenerating/distributing signalsProcess noiseClock drift
Embodiments of the present application disclose a Kalman filter-based time synchronization method and device applied to a distributed system, a medium and a product. In the method, a double-state model containing clock offset and clock drift is established to improve the precision and speed of time synchronization; a dynamic inhibition factor is introduced to adaptively adjust the observation noise covariance to cope with abnormal noise; a block adaptive strategy is adopted to distinguish and independently adjust the process noise covariance of the clock offset and the clock drift to match their different noise characteristics; and finally, high-precision and high-robustness time synchronization is achieved through Kalman filtering.
Owner:JIMEI UNIV