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6 results about "Network clock" patented technology

Clock synchronization methods, devices, boards, and computer-readable storage media

ActiveCN117155504Bavoid cloggingrelatively small errorTime-division multiplexNetwork clockControl system
This application discloses a clock synchronization method, apparatus, board, and computer-readable storage medium, relating to the field of network time synchronization technology. The service card encapsulates a device sending timestamp in a first NTP request message sent by the main control card based on the first current service system time to obtain a second NTP request message, which is then sent to the NTP server. Based on the second current service system time, the service card encapsulates a device receiving timestamp in a second NTP response message sent by the NTP server to obtain a first NTP response message. The first NTP response message is then sent to the main control card, allowing the main control card to calculate the network clock deviation between itself and the NTP server based on the first NTP response message, and adjust the main control system time accordingly. This method avoids the problem of large errors between the device sending timestamp and the device receiving timestamp, thus ensuring that the network clock deviation calculated by the main control card will not have significant errors.
Owner:MAIPU COMM TECH CO LTD

Surface logging system, network clock synchronization method and electronic device

PendingCN122316523AData packNetwork clock
This application provides a surface logging system, a network clock synchronization method, and electronic equipment, belonging to the field of petroleum logging technology. The method includes: periodically broadcasting time synchronization protocol data packets based on a clock server; synchronizing the current operating time of the depth tension display panel and the current operating time in the logging data uploaded by the first type of logging instrument to the logging network as the system reference time, based on the depth tension display panel and the first type of logging instrument; periodically broadcasting time synchronization protocol data packets to the logging network using a time synchronization protocol; receiving the time synchronization protocol data packets based on a second type of logging instrument and synchronizing the current operating time in the logging data uploaded by the second type of logging instrument to the logging network as the system reference time; or synchronizing the current operating time of the second type of logging instrument with the operating time of the depth tension display panel based on the depth tension display panel. This application's solution can realize logging operations in all logging scenarios.
Owner:CHINA NAT PETROLEUM CORP +1

Method, apparatus, and computer equipment for dynamic clock frequency adjustment of large model accelerators

This disclosure provides a method, apparatus, and computer device for dynamic clock frequency adjustment of a large model accelerator, relating to the field of integrated circuit design, particularly to the field of power consumption management of artificial intelligence chips. The implementation scheme is as follows: obtaining the operation type and working stage of the large model accelerator executing the current computing task; determining the actual running batch size and theoretical full-load batch size required to execute the current computing task; in response to the working stage being the decoding stage, adjusting the frequency of the computing clock based on the ratio of the actual running batch size to the theoretical full-load batch size; in response to the working stage being the pre-filling stage, adjusting the frequency of the on-chip network clock and the transfer rate of the memory system based on the ratio of the theoretical full-load batch size to the actual running batch size; during the execution of the current computing task, when a transient switch occurs due to a step jump in the computing load, adjusting the frequency of the computing clock to a preset low-frequency clock threshold for transition buffering.
Owner:MOXIN ARTIFICIAL INTELLIGENCE TECH (SHENZHEN) CO LTD

3D Integrated Circuit Device

PendingUS20260182345A13d integrated circuitNetwork clock
A device includes a first device tier including a first set of active devices and a second device tier including a second set of active devices. The device also includes a clocked circuit including first active devices of the first set of active devices, and a clock distribution network including a plurality of clock signal routing interconnects arranged in an interconnect structure arranged at a side of the first device tier facing the second device tier. The device also includes a set of active clock devices formed by second active devices of the second set of active devices. The clocked circuit is connected to the clock distribution network to receive a clock signal.
Owner:INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)

A hybrid networking clock synchronization system based on master-slave architecture

PendingCN122340600AData packNetwork clock
This invention discloses a hybrid network clock synchronization system based on a master-slave architecture, comprising a master unit and at least one slave unit. The master unit includes a first microprocessor, a Wi-Fi communication module, and a first BLE communication module. The slave unit includes a second microprocessor, a second BLE communication module, and a clock display module. The first microprocessor of the master unit accesses the network via the Wi-Fi communication module to obtain network clock data and environmental weather data. It extracts core fields from the data, encapsulates them into a synchronization data packet containing a feature identification code and payload data, and controls the first BLE communication module to send this synchronization data packet to the slave unit. The second microprocessor of the slave unit receives the synchronization data packet via the second BLE communication module, parses the payload data according to a preset decoding mapping table and the feature identification code, obtains the synchronization time value and weather parameters, thereby updating local data and controlling the clock display module to refresh the display. This effectively solves the technical problems of edge node computing power overload and excessive network energy consumption.
Owner:SHENZHEN HENGHUIDA ELECTRONICS

Time synchronization method for network nodes, and industrial internet

PCT designated stageWO2026129559A1Time-division multiplexTimestampNetwork clock
Disclosed in the present invention is a time synchronization method for network nodes. The method specifically comprises: determining a master node and slave nodes in a network; periodically detecting a frequency offset rate Rf of each slave clock relative to a master clock and a transmission delay Ndelay between the master node and each slave node, and correcting a current timestamp of the slave clock on the basis of a current timestamp of the master clock, thereby realizing synchronization between the slave clock and the master clock. By providing a master clock having high clock precision in a network, the time of a slave clock is periodically calibrated on the basis of the master clock, so that while the clocks of nodes in the network are kept basically synchronized, the cost required to keep the clocks in the network basically synchronized is also relatively low.
Owner:YANGTZE RIVER DELTA HIT ROBOT TECH RES INST