24 results about "Network clock" patented technology

A clock synchronization method is disclosed. The method comprises receiving master timing synchronization data from a master clock device, wherein the master timing synchronization data is based at least in part on quantum data obtained from a first quantum device of the master clock device. The method comprises determining local timing synchronization data that is based at least in part on local quantum data obtained from a second local quantum device, wherein the second local quantum device is entangled with the first quantum device such that the local quantum data and the quantum data obtained from the first quantum device are identical at a same time. The method comprises using the determined local timing synchronization data and the received master timing synchronization data to determine a timing correction factor. The method comprises correcting a local system time using the timing correction factor.

Communication systems and methods are disclosed herein. In an embodiment, a communication system includes a grandmaster clock and a modem unit. The grandmaster clock is configured to output a primary clock reference based on a received signal. The modem unit is configured for communication with a remote terminal. The modem unit includes a network clock configured to be tuned based on the primary clock reference. The network clock is further configured to output a first signal to be used for a time reference for communications with the remote terminal. The modern unit also includes a master clock configured to be tuned based on the primary clock reference. The master clock is further configured to output a second signal to be used for a frequency reference for communications with the remote terminal.

This invention relates to a time synchronization method for 5G and TSN converged networks based on a timestamp compensation algorithm, belonging to the field of cross-network time synchronization. It includes: introducing a 5G network as a TSN virtual bridge into the TSN network to form a cross-network, which includes a TSN1 network, a 5G network, and a TSN2 network. The cross-network uses the TSN switches in the TSN1 network as the master clock and the TSN devices in the TSN2 network as slave clocks. Synchronization is achieved by transmitting time synchronization information step-by-step across the NW-TT module, the 5G network clock domain, and the DS-TT module. The cross-network time synchronization includes TSN2 network time synchronization, 5G network time synchronization, and TSN2 network time synchronization. This invention improves the accuracy of time synchronization by calculating the frequency offset and dwell time between NW-TT and DS-TT within the 5G system and performing time compensation in the DS-TT.

The invention relates to a time synchronization system and method of a TSN train communication network. The system comprises a backbone network clock domain, a marshalling network clock domain and an intermediate clock domain formed by connecting backbone network nodes and marshalling network nodes, the two backbone network clock domains receive the same external clock source through each autonomous clock node to realize time synchronization, and provide a unified time reference for each marshalling network clock domain; under the condition that the time synchronization of the clock domain of the backbone network is abnormal or invalid, the backbone network node sends a synchronization abnormal signal to the marshalling network node of the intermediate clock domain where the backbone network node is located; the marshalling network clock domain is used for realizing time synchronization of equipment supporting the TSN in the marshalling network; under the condition that the synchronization abnormal signal is received, the marshalling network node of the middle clock domain does not enable the time synchronization function, so that the backbone network clock domain is isolated from the marshalling network clock domain where the marshalling network node is located. The problem that large-area synchronization abnormity of the whole vehicle may be caused once the time synchronization of the backbone network fails is solved.

The invention discloses a time-sensitive network clock synchronization recovery method and device, equipment, a storage medium and a product, and the method comprises the steps: switching a predetermined candidate master clock into a master clock in response to the abnormality of the master clock; a synchronization message is sent through the master clock, the synchronization message comprises a newly added slave clock hopping field, whether first synchronization is carried out or not is judged through each slave clock according to the first synchronization identifier, if yes, whether the value of the slave clock hopping field is a first preset value or not is judged, and if yes, a candidate master clock notification is broadcasted through the slave clock; judging whether the value of the local slave clock hopping field is a first preset value or not through each slave clock, and if so, determining a candidate master clock according to the performance parameter of the slave clock included in the candidate master clock notification and the local parameter; if not, determining that the slave clock corresponding to the notification is a candidate master clock; by pre-determining the candidate master clock, the master clock can be quickly switched when the master clock is abnormal, so that the continuity and reliability of clock synchronization of the time-sensitive network are guaranteed.

This application discloses a clock synchronization method, apparatus, board, and computer-readable storage medium, relating to the field of network time synchronization technology. The service card encapsulates a device sending timestamp in a first NTP request message sent by the main control card based on the first current service system time to obtain a second NTP request message, which is then sent to the NTP server. Based on the second current service system time, the service card encapsulates a device receiving timestamp in a second NTP response message sent by the NTP server to obtain a first NTP response message. The first NTP response message is then sent to the main control card, allowing the main control card to calculate the network clock deviation between itself and the NTP server based on the first NTP response message, and adjust the main control system time accordingly. This method avoids the problem of large errors between the device sending timestamp and the device receiving timestamp, thus ensuring that the network clock deviation calculated by the main control card will not have significant errors.

This application provides a surface logging system, a network clock synchronization method, and electronic equipment, belonging to the field of petroleum logging technology. The method includes: periodically broadcasting time synchronization protocol data packets based on a clock server; synchronizing the current operating time of the depth tension display panel and the current operating time in the logging data uploaded by the first type of logging instrument to the logging network as the system reference time, based on the depth tension display panel and the first type of logging instrument; periodically broadcasting time synchronization protocol data packets to the logging network using a time synchronization protocol; receiving the time synchronization protocol data packets based on a second type of logging instrument and synchronizing the current operating time in the logging data uploaded by the second type of logging instrument to the logging network as the system reference time; or synchronizing the current operating time of the second type of logging instrument with the operating time of the depth tension display panel based on the depth tension display panel. This application's solution can realize logging operations in all logging scenarios.

The invention discloses a clock adjustment method and device, electronic equipment, a storage medium and a product. The method comprises the following steps: generating a clock adjustment strategy table according to clock performance parameters of each clock source; the clock sources comprise network clocks and system clocks of the network ports, the clock adjustment strategy table at least comprises allowed synchronization source sets corresponding to the clock sources, and the allowed synchronization source sets represent clock source sets which are configured for the clock sources and are allowed to serve as clock synchronization references; determining a reference clock and a to-be-adjusted clock corresponding to the clock adjustment instruction; and based on the clock adjustment strategy table, when the reference clock belongs to the allowed synchronization source set of the to-be-adjusted clock, synchronizing the to-be-adjusted clock to the reference clock. According to the scheme, the clock performance parameters of all the clock sources in the terminal equipment and the allowed synchronization source set are integrated through the clock adjustment strategy table, so that clock adjustment operation is managed in a unified mode, it is ensured that the to-be-adjusted clock is adjusted to the clock with higher performance, and therefore high-precision and high-reliability clock synchronization is achieved.

This disclosure provides a method, apparatus, and computer device for dynamic clock frequency adjustment of a large model accelerator, relating to the field of integrated circuit design, particularly to the field of power consumption management of artificial intelligence chips. The implementation scheme is as follows: obtaining the operation type and working stage of the large model accelerator executing the current computing task; determining the actual running batch size and theoretical full-load batch size required to execute the current computing task; in response to the working stage being the decoding stage, adjusting the frequency of the computing clock based on the ratio of the actual running batch size to the theoretical full-load batch size; in response to the working stage being the pre-filling stage, adjusting the frequency of the on-chip network clock and the transfer rate of the memory system based on the ratio of the theoretical full-load batch size to the actual running batch size; during the execution of the current computing task, when a transient switch occurs due to a step jump in the computing load, adjusting the frequency of the computing clock to a preset low-frequency clock threshold for transition buffering.

The invention discloses a master clock switching method, a CNC, a TSN converter, a storage medium and a program product. The method comprises the following steps: acquiring master clock information respectively corresponding to a 5G network and a TSN network according to a preset period; determining a master clock abnormal condition of one of the TSN network and the 5G network in the converged network based on the master clock information; when the main clock is abnormal, a main clock switching notification is generated, and the main clock switching notification comprises the abnormal network of the main clock, the normal network of the main clock, the normal ID of the main clock and other information; and sending the master clock switching notification to the TSN converter in the 5G network. According to the technical scheme, when the master clock breaks down, the master clock can be accurately and efficiently switched to other master clocks to keep clock synchronization, so that the reliability of clock synchronization of the TSN network and the 5G network in the fusion network is guaranteed, and the deterministic transmission of the 5G-TSN fusion network is guaranteed.

A device includes a first device tier including a first set of active devices and a second device tier including a second set of active devices. The device also includes a clocked circuit including first active devices of the first set of active devices, and a clock distribution network including a plurality of clock signal routing interconnects arranged in an interconnect structure arranged at a side of the first device tier facing the second device tier. The device also includes a set of active clock devices formed by second active devices of the second set of active devices. The clocked circuit is connected to the clock distribution network to receive a clock signal.

This invention relates to a clock discipline system and synchronization discipline method for underwater acoustic communication devices, belonging to the fields of underwater acoustic communication and underwater positioning and navigation technology. It solves the problem that existing network clock systems in underwater acoustic communication networks based on underwater acoustic communication devices can only discipline the clock of one timing node at a time, making it impossible to synchronously discipline the clocks of multiple timing nodes; furthermore, it fails to balance the accuracy, power consumption, and size of the timing nodes. This invention includes a discipline unit and N timing nodes. The discipline unit sequentially sends discipline commands to the N timing nodes via chip select. After receiving the discipline command, each timing node begins receiving a calibrated second pulse signal from the discipline unit, achieving synchronous discipline of the N timing nodes. Each disciplined timing node generates a second timestamp and a microsecond timestamp. The discipline unit also displays the discipline completion status of each timing node. It is primarily applied in underwater acoustic communication device synchronous clock networks.

In a network having at least one slave node including a slave clock, a method of adjusting the slave clock relative to a master clock of a master node includes, at the slave node, correcting a time of day of the slave clock using (a) a slave pulse signal having a known slave pulse rate, (b) a time-of-day counter of the slave node, and (c) a master pulse signal, based on values of the slave clock at nearest corresponding edges of the slave pulse signal and the master pulse signal, and correcting a frequency of the slave clock using the slave pulse signal, a clock signal of the slave node, and the master pulse signal, based on values of the slave clock at nearest corresponding edges of the master pulse signal. No other clock signal from outside the slave node is used for the corrections.

The invention discloses a 5G-TSN fusion network clock synchronization timer adjustment method, device and equipment, a storage medium and a product, and the method comprises the steps: receiving a clock synchronization timer period adjustment notification sent by a 5G system, the adjustment factor is calculated according to an average value of a plurality of continuous residence times when the residence time of the clock synchronization message sent by the TSN system in the 5G system exceeds a residence time threshold value; adjusting the clock synchronization timer period of the TSN system according to the adjustment factor; according to the invention, the period value of the TSN system clock synchronization timer is adjusted, so that the period of the timer can be matched with the actual transmission condition of the 5G-TSN fusion network, misjudgment caused by overtime setting of the period of the timer is reduced, and the reliability of TSN system clock synchronization in the 5G-TSN fusion network is improved.

A split-logic-clock-buffer (split-LCB) includes an input clock stage configured to receive an input clock signal, an output drive stage configured to output an output clock signal, and a clock distribution network interposed between the input clock stage and the output drive stage. The clock distribution network is configured to route the input clock signal to the drive output stage. The output drive stage includes an temperature sense circuit region that splits the output drive stage into an upstream drive portion and a downstream drive portion.

The invention discloses a sub-microsecond clock synchronization method and system for a vehicle-mounted Ethernet ADAS, and the method comprises the steps: carrying out the clock synchronization of a slave clock node and a master clock node through a gPTP protocol, and obtaining a preliminarily synchronized local clock signal; obtaining the actual temperature of the slave clock node, and determining a phase compensation value based on the actual temperature; performing phase fine tuning on the initially synchronized local clock signal according to the phase compensation value to generate a high-precision local clock; and receiving a trigger command carrying a target timestamp, generating hardware interrupt trigger action execution at a moment specified by the trigger command based on the high-precision local clock, and stamping a hardware timestamp based on the same high-precision local clock on an execution result. Through the temperature compensation phase error and a hardware triggering mechanism, the precise synchronization of the sensor hardware acquisition action and the network clock is ensured, and the data fusion accuracy and the system reliability are improved.

The embodiment of the invention provides a clock synchronization method and system, a network clock device and network equipment. The method comprises the following steps: determining a target clock source for clock synchronization according to source selection strategy parameters of at least two input clock sources, wherein the source selection strategy parameters comprise at least one of a synchronization state message level, an input clock source priority and an input interface identifier. And synchronizing a local clock based on the target clock source, and outputting a clock signal according to the synchronized local clock, thereby improving the selection efficiency and accuracy of the input clock source in the clock synchronization process, and further improving the stability and flexibility of clock synchronization.

The invention provides an STA data collection algorithm based on unified clock management, which comprises the following steps: synchronizing a network clock: synchronizing the network clock, and generating a clock synchronization parameter set; configuring an acquisition scheme: analyzing a parameter set issued by the fusion terminal, and generating a configuration parameter set containing a task scheduling table in combination with a CCO file; a collection task is started based on the configuration parameters, the CCO sends a copying and reading instruction to the STA through a protocol, minute freezing data is read, and an original data set is generated through verification; protocol conversion processing: identifying an original data protocol type, and generating a standard data set through semantic mapping; and S5, communication rate optimization: monitoring the link noise power and the signal-to-noise ratio, adjusting the rate according to the data volume and the acquisition frequency, and generating an optimized communication parameter set. According to the invention, an accurate time reference is provided for real-time monitoring, load prediction and other applications of the power distribution network, and the support value of data to services is effectively improved.

This invention discloses a hybrid network clock synchronization system based on a master-slave architecture, comprising a master unit and at least one slave unit. The master unit includes a first microprocessor, a Wi-Fi communication module, and a first BLE communication module. The slave unit includes a second microprocessor, a second BLE communication module, and a clock display module. The first microprocessor of the master unit accesses the network via the Wi-Fi communication module to obtain network clock data and environmental weather data. It extracts core fields from the data, encapsulates them into a synchronization data packet containing a feature identification code and payload data, and controls the first BLE communication module to send this synchronization data packet to the slave unit. The second microprocessor of the slave unit receives the synchronization data packet via the second BLE communication module, parses the payload data according to a preset decoding mapping table and the feature identification code, obtains the synchronization time value and weather parameters, thereby updating local data and controlling the clock display module to refresh the display. This effectively solves the technical problems of edge node computing power overload and excessive network energy consumption.

Disclosed in the present invention is a time synchronization method for network nodes. The method specifically comprises: determining a master node and slave nodes in a network; periodically detecting a frequency offset rate Rf of each slave clock relative to a master clock and a transmission delay Ndelay between the master node and each slave node, and correcting a current timestamp of the slave clock on the basis of a current timestamp of the master clock, thereby realizing synchronization between the slave clock and the master clock. By providing a master clock having high clock precision in a network, the time of a slave clock is periodically calibrated on the basis of the master clock, so that while the clocks of nodes in the network are kept basically synchronized, the cost required to keep the clocks in the network basically synchronized is also relatively low.

In a network having at least one slave node including a slave clock, a method of adjusting the slave clock relative to a master clock of a master node includes, at the slave node, correcting a time of day of the slave clock using (a) a slave pulse signal having a known slave pulse rate, (b) a time-of-day counter of the slave node, and (c) a master pulse signal, based on values of the slave clock at nearest corresponding edges of the slave pulse signal and the master pulse signal, and correcting a frequency of the slave clock using the slave pulse signal, a clock signal of the slave node, and the master pulse signal, based on values of the slave clock at nearest corresponding edges of the master pulse signal. No other clock signal from outside the slave node is used for the corrections.

The invention discloses a method, a device, equipment and a system for providing a clock reference source for a base station. The method comprises the following steps: respectively introducing a main clock source and a standby clock source at different nodes of the OTN; transmitting the main clock source and the standby clock source to a third node of the network through a main line and a standby line which are mutually independent in the network, so that the third node receives four paths of clock signals; at the third node, selecting the clock signal to generate a first bearer network clock and a second bearer network clock; respectively outputting the first bearer network clock and the second bearer network clock to a first bearer network and a second bearer network, and establishing a clock cross-linking mechanism between the first bearer network and the second bearer network; and providing clock tracking for base stations under the first bearer network and the second bearer network based on the first bearer network clock, the second bearer network clock or a clock signal obtained through a clock cross-linking mechanism. According to the invention, an efficient and reliable clock reference source can be provided for the base station.

The invention discloses a high-precision synchronization method for predictive random clock source compensation of an industrial wireless network, and belongs to the technical field of industrial wireless communication. The invention aims to solve the core problems of high cost of a high-precision clock source, large drifting of a low-cost clock, weak anti-interference capability and short endurance in the existing WIA-PA network clock synchronization scheme. According to the technical scheme, an architecture of'random clock source + parameter acquisition + predictive compensation + dynamic execution + collaborative management and control 'is constructed, an HC-49S ceramic crystal oscillator is adopted as the random clock source, clock drift is predicted in combination with an LSTM-Kalman filtering fusion model, compensation is achieved through dual mechanisms of'FPGA hardware fine tuning + MCU software calibration', and the WIA-PA superframe time sequence is deeply adapted. According to the invention, the synchronization precision of 100ns-1mu s in the industrial temperature range of-40 DEG C to 85 DEG C is realized, the single-node hardware cost is reduced by 89.4%, the node endurance is prolonged to 1.8 years, the anti-interference intensity reaches-60dBm, and the method can be widely applied to WIA-PA scenes such as intelligent manufacturing robot collaboration, process industrial sensor networking, intelligent power grid monitoring and the like.

The application relates to the field of clock synchronization technology of communication network terminal equipment, and discloses a high-precision clock synchronization method of FC communication network, wherein after an upper layer application sets a system network time at a clock server, the clock server sends network time information periodically, switches and other network terminals are clock clients, the switch is a clock information transfer device, after receiving the time of the clock server, compensating path delay and residence time, the time is forwarded to other clock clients; after receiving the time forwarded by the switch, the other network terminals as clock clients compensate path delay, so that the network clock synchronization is completed. The application adopts a hardware circuit to send high-precision clock synchronization information, can correct the time information of each clock client according to the switch of the clock client and the residence time on the other clock client, adopts a compensation point-to-point path delay mode to improve the synchronization precision, and can realize several microsecond-level synchronization precision.