5 results about "Digital clock" patented technology

A method, system, and apparatus for digital clock and data recovery (CDR) with analog signal that samples blindly (i.e., independent of the baud rate). The CDR further has a digital monolithic circuit that includes an interpolator circuit, and a fully digital clock (FDC) that recovers the digital data from the analog signal.

A level shift assembly, a method for over-current protection, and a display apparatus. The level shift assembly includes a level shift module, which includes a control unit, a current detection unit, a level shift unit, and an over-current protection unit. The controller determines, at a first falling edge of a digital clock signal, a first analog clock signal among a plurality of analog clock signals which corresponds to the first falling edge based on a correspondence of a current display mode; the current detection unit detects a current of the first analog clock signal; and a moment, at which a falling edge of the digital clock signal is present, is within a last line of a corresponding analog clock signal, and an over-current signal is sent to the over-current protection unit when the current of the first analog clock signal is not within a current threshold range.

A rate estimator circuit is provided for adjusting the sampling rate filter of a sampling rate converter circuit. The rate estimator circuit includes a first integrator clocked by a first clock signal having a first sampling frequency and a second integrator clocked by a second clock signal having a second sampling frequency; a resolution upscaling circuit including a third integrator clocked by a system clock signal; a digital clock multiplier circuit including the second integrator and a multiplier loop circuit having a fourth integrator; a multiplier output stage connected to the output of the fourth integrator; and a rate estimator circuit including the first integrator and an estimator loop circuit having a fifth integrator.

The application provides a satellite broadcast audio clock synchronization method, device, medium and product, relates to the technical field of digital clock synchronization, and the method comprises the steps of extracting a PCR time stamp from a satellite TS stream and decoding PCM audio data; calculating the difference between the PCR time stamp and a local numerical control oscillator counter as a time error value; inputting the time error value into a PI controller for proportional integral operation, and performing smoothing processing on the output of the PI controller through an IIR low-pass filter to obtain a frequency adjustment amount; writing the frequency adjustment amount into the local numerical control oscillator to adjust the frequency, so that the restored PCR clock signal is obtained through convergence; phase-locked frequency division of the restored PCR clock signal to generate an audio output clock signal, and synchronization output of the PCM audio data is realized based on the audio output clock signal. The problem that loud noise and broken noise are prone to occurring during master-backup switching due to large clock restoration jitter when the existing satellite broadcast receiving device operates independently without external synchronization source is solved.

The utility model provides a kind of intelligent calibration digital clock belongs to electronic clock technical field, it solves the technical problems such as existing electronic clock time error, calibration inconvenience and man-machine interaction experience poor etc. Including rotating counterweight seat, electronic clock is equipped between the two supporting arms of rotating counterweight seat, buzzer is equipped in electronic clock, alarm button and thirteen input buttons are equipped on electronic clock, rear end cover is screw-connected on the back side of electronic clock, control panel is equipped between electronic clock and rear end cover, four electronic display tubes are equipped on control panel;Wireless communication module, button response module, data processing module, buzzer control module, display driving module, power management module and data storage module are equipped on control panel. The utility model wireless network automatic synchronization standard time, realize high-precision automatic calibration, have the advantages such as multi-angle viewing, intelligent alarm clock reminding and multiple display modes, effectively improve the practicability and use experience of electronic clock.