43 results about "Anti-aliasing filter" patented technology

The invention discloses a multi-channel AFE signal acquisition method and system based on adaptive adjustment, and the method comprises the steps: synchronously acquiring multi-channel analog signals through a multi-channel parallel AFE module, and configuring an independent programmable gain amplifier and an anti-aliasing filter for each channel; extracting time-frequency domain characteristic parameters of each channel signal in real time; dynamically generating an optimal adjustment strategy based on the time-frequency domain characteristic parameters, and adaptively adjusting the gain coefficient, the filtering bandwidth and the sampling rate parameter of each channel through a closed-loop feedback mechanism; and abnormal signal detection is realized by adopting an inter-channel cross validation algorithm, and automatic isolation of a fault channel and intelligent switching of a redundant channel are triggered. Through dynamic parameter intelligent adjustment, multi-channel cooperative fault tolerance and energy efficiency optimization architecture, the problems of signal distortion, response lag and high power consumption in a traditional multi-channel signal acquisition system are solved, and the signal fidelity and the system reliability are remarkably improved.

A system and method for calibrating a time-interleaved digital-to-analog converter (DAC). A calibration signal generator generates calibration data, and a time-interleaved DAC converts the calibration data to an analog calibration signal. An observation analog-to-digital converter (ADC) samples, and quantizes, the analog calibration signal filtered by an anti-alias filter. A mismatch estimation block estimates a frequency response mismatch between the sub-DACs and generates a sub-DAC mismatch correction factor based on an output of the observation ADC. The calibration signal generator applies the sub-DAC mismatch correction factor to the calibration data. The mismatch estimation block may estimate a DC offset mismatch between the sub-DACs based on the output of the observation ADC and generates a DC offset correction factor, and the calibration signal generator applies the DC offset correction factor to the calibration data.

The invention provides a process weak correlation frequency adjustable anti-aliasing filter circuit which is characterized by comprising a current generation module, a current mirror module, a control voltage generation module and an MOSFET-C anti-aliasing filter module. The anti-aliasing filter circuit with the adjustable frequency has the remarkable advantages that the anti-aliasing filter circuit with the adjustable frequency can generate cut-off frequency linearly related to the frequency of an input clock signal, and the anti-aliasing filtering function with the adjustable frequency is achieved. In addition, the circuit can effectively reduce the influence of technological parameters on the cut-off frequency, has good circuit performance, and meanwhile, compared with a cut-off frequency adjusting method of an existing on-chip filter circuit integrated control loop, the circuit is simple in structure, small in introduction power consumption and low in cost. And the anti-aliasing filtering requirement of the ADC acquisition front end within the input clock signal frequency range of 10 kHz to 100 kHz can be met.

The invention relates to the technical field of electrical safety, and particularly discloses an arc fault protection method based on a circuit breaker intelligent algorithm, which comprises the following steps: S1, collecting a line current signal in real time, eliminating harmonic interference of a frequency converter from an original signal through an anti-aliasing filter, and converting the original signal into a digital signal; s2, processing the current signal by adopting a three-stage cascade wavelet analysis module, and outputting a dynamic peak-to-average ratio to S4; s3, detecting current disturbance based on a double-slide-rail window, outputting a disturbance positioning mark and a time-frequency feature to S4, judging a disturbance event, and positioning a starting point; s4, receiving the dynamic peak-to-average ratio of the S2 and the disturbance positioning mark and the time-frequency characteristics of the S3, performing path processing according to a characteristic analysis result, and adopting a direct interruption method and an electromagnetic radiation-current frequency domain cross validation method; s5, constructing an electric arc energy accumulation prediction model; according to the invention, the problems of weak arc leak detection, electromagnetic interference maloperation and delay are solved.

The wearable wireless transmission multi-channel gastric electric signal acquisition system comprises an electrode signal input module, an analog front-end circuit, an analog-to-digital conversion module, a single chip microcomputer control and feedback module, a wireless transmission module, terminal equipment and a power supply module, the analog front-end circuit comprises a front input amplifier, a second-order active band-pass filter and a voltage-stabilizing buffer amplifier; the characteristics of extremely low amplitude and low frequency of a stomach electric signal are considered, a fully differential input and differential three operational amplifier circuit is used as an input stage, and the signal is amplified by thousand times, so that the magnitude that a subsequent circuit can well process is achieved, and the precision and the stability of the system are improved. And the signal sequence is further filtered and denoised through a second-order active low-pass direct-current anti-aliasing filter and a second-order active high-pass filter, so that the integrity of the signal is ensured. And secondly, the signal becomes stable through a low-power voltage-stabilizing amplifying circuit, so that the ADC sampling circuit can effectively sample the gastric electric signal at a relatively high sampling frequency.

The present application relates to an anti-aliasing filter and a test machine with high suppression degree, wherein the filter comprises: a first-stage operational amplifier module, which is connected to a first analog signal, amplifies the first analog signal and outputs it; an impedance conversion filter module, which is connected to the first-stage operational amplifier module, performs impedance conversion and filtering on the signal output by the first-stage operational amplifier module and outputs it; a second-stage operational amplifier module, which comprises a plurality of parallel operational amplifier units, each of which is connected to a second analog signal and is connected to the impedance conversion filter module; each operational amplifier unit receives the signal output by the impedance conversion filter module and the second analog signal for signal processing, and outputs the processed analog signal. By adopting the architecture of impedance conversion filtering and multiple parallel operational amplifier units, the driving capability can be improved while achieving high suppression degree.

Methods and apparatus for optical filtering are provided. In one example, an apparatus includes a spatial light modulator (102) having a two-dimensional array of square, rectangular, or rhombic pixels, and a controller (110) coupled to the spatial light modulator (102). The controller (110) may be configured to write image data (114) representing an image to the spatial light modulator (102) to control the spatial light modulator (102) to display the image for a frame period, and during the frame period, spatially reposition the image across a plurality of locations over the array of pixels, each single position of the plurality of positions is maintained for a respective time period, wherein the respective time period is selected according to one or more non-negative coefficients of an anti-aliasing filter transfer function (402).

The invention discloses a low-noise and high-precision signal processing system for a multi-beam depth sounder. The system includes an RF transformer connected to a transducer, the RF transformer is connected to a preamplifier circuit, the preamplifier circuit is connected to a controllable gain circuit, the controllable gain circuit is connected to an anti-aliasing filter, the anti-aliasing filter is connected to an ADC drive circuit, and the ADC drive circuit is connected to an ADC conversion circuit. The processing loop of the invention adopts a fully differential design, which effectively avoids the influence of common-mode interference and other environmental noises, improves the signal-to-noise ratio of the signal, is conducive to the collection and processing of tiny signals, adopts a passive RF transformer for input impedance matching, does not cause system noise, and adopts a low-noise, low-power consumption device for the preamplifier circuit to avoid generating large noise before the preamplifier circuit; on the other hand, by improving the power supply module, it is ensured that the noise of the power supply at the first-stage amplifier circuit is the lowest, which is conducive to improving the signal-to-noise ratio.

Analog front-end (AFE) system with an anti-aliasing filter circuit including a filter bypass switch configured to provide charge injection and / or clock pass-through independent of an input signal, wherein the AFE system comprises: at least one sampling capacitor of an analog-to-digital converter (ADC) circuit configured to sample an output of the anti-aliasing filter circuit; an amplification or buffer circuit with an input for receiving the input signal; and the anti-aliasing filter circuit coupled to an output of the amplification or buffer circuit, wherein the filter circuit comprises the following: a filter resistor; a filter capacitor coupled to one terminal of the filter resistor; and the filter bypass switch, which is connected in a bootstrapped configuration to pull a control terminal of the filter bypass switch above or below a supply voltage, wherein the filter bypass switch is connected in parallel to the filter resistor, wherein the filter bypass switch has an ON state and an OFF state, wherein, when in the ON state, the filter bypass switch is configured to bypass the filter resistance, allowing the amplification or buffer circuit to drive the at least one sampling capacitor through the filter bypass switch; and wherein, when in the OFF state, the filter bypass switch is designed to cause the amplification or buffer circuit to drive the at least one sampling capacitor through the filter resistor.

A system for real-time fault detection and isolation in a high-voltage transmission network, the system comprising: a plurality of input terminals configured to be connected to instrument transformers associated with at least one transmission line to receive analog voltage signals and analog current signals corresponding to multiple phases of the transmission line; a signal conditioning unit electrically connected to the plurality of input terminals, the signal conditioning unit comprising an isolation arrangement, a programmable gain arrangement, and an anti-aliasing filter arrangement configured to produce conditioned analog signals;a multi-channel analog-to-digital converter unit that is operationally coupled with the signal conditioning unit and configured to simultaneously sample the processed analog signals at a predetermined sampling rate to generate digitized electrical parameter data; a time synchronization unit configured to assign precise timestamps to the digitized electrical parameter data based on a reference time source;a processing unit operationally coupled with the analog-to-digital converter unit and the time synchronization unit, wherein the processing unit is configured to execute instructions for detecting abnormal electrical states by performing signal preprocessing, extracting characteristic features from the digitized electrical parameter data, comparing the extracted features with predefined operating criteria, classifying a detected fault state based on the extracted features, and determining a fault location along the transmission line; and an isolation control unit operationally coupled with the processing unit, configured to generate control signals for actuating at least one switching device to isolate a faulty section of the transmission network in response to the detected fault state.

A seismic data acquisition device and a seismic data acquisition method are disclosed. The seismic data acquisition device includes an anti-aliasing filter, a first conversion circuit, a second conversion circuit, and a controller. The anti-aliasing filter has an input configured to receive seismic data, which is generally an analog signal. The anti-aliasing filter has an output connected to an input of the first conversion circuit and an input of the second conversion circuit, respectively. The first conversion circuit has an output connected to a first input of the controller. The second conversion circuit has an output connected to a second input of the controller. The seismic data acquisition device and method enable wide dynamic seismic data acquisition with high resolution over the full amplitude range of the (seismic data) input signal.

The application discloses a method for eliminating direct current offset between electrodes of an electroencephalogram acquisition device by using digital-analog hybrid DSL technology, and relates to electroencephalogram signal processing. The method comprises the following steps: transmitting an electroencephalogram acquisition input signal to a signal amplification module for amplification processing to obtain a first amplified electroencephalogram signal, and processing the first amplified electroencephalogram signal through an analog direct current servo loop module to obtain a second analog direct current component; then, transmitting the electroencephalogram acquisition input signal to a digital direct current servo loop module to obtain a first digital direct current component; then, converting the first digital direct current component and the second analog direct current component into alternating current through a capacitor and a chopping modulation module to offset input end alternating current; then, transmitting the first amplified electroencephalogram signal to a programmable gain amplification module for secondary amplification processing to obtain a second amplified electroencephalogram signal, inputting the second amplified electroencephalogram signal to an anti-aliasing filter, and inputting the second amplified electroencephalogram signal to a digital processing module after analog signal conversion for processing. The application shortens the time for EDO offset at the input end, and the sampling rate of an analog-to-digital converter in the digital servo loop is very low, so that the power consumption of the digital servo loop is very small, thereby effectively solving the problems of difficult realization of a high EDO suppression range and low input reference noise, and the problems of a too large time constant of an integrator in a traditional analog direct current servo loop and a too long EDO offset time.

The application relates to the technical field of electrical safety, and particularly discloses an arc fault protection method based on a circuit breaker intelligent algorithm, which comprises the following steps: S1, collecting a line current signal in real time, eliminating frequency converter harmonic interference of an original signal through an anti-aliasing filter, and converting the original signal into a digital signal; S2, processing the current signal through a three-stage cascaded wavelet analysis module, and outputting a dynamic peak-to-average ratio to S4; S3, detecting a current disturbance based on a double sliding rail window, outputting a disturbance positioning mark and a time-frequency feature to S4, determining a disturbance event, and positioning a starting point; S4, receiving the dynamic peak-to-average ratio of S2 and the disturbance positioning mark and the time-frequency feature of S3, processing according to a characteristic analysis result, and adopting a direct interruption method and an electromagnetic radiation-current frequency domain cross verification method; and S5, constructing an arc energy accumulation prediction model; the application solves the problems of weak arc missing detection, electromagnetic interference misoperation and delay.

Methods and apparatus prepare medical or therapy data, such as respiratory therapy data for electronic communication to a server system, such as a monitoring system (100). The data may be accessed. Low-pass data may be generated by applying an anti-aliasing filter to the data. Low-rate data may be generated by applying a down-sampling filter to the low-pass data. Encoded data may be generated by performing one or more of intermediate floating-point interpolation, simple linear predictive delta encoding, and / or Rice-Golomb encoding on the low-rate data. The encoded data may be packaged as compressed data with a compression header.

The invention is suitable for the technical field of electronic microphone audio signal processing, and provides an electronic microphone audio signal processing system and method, and the system comprises a server which is connected with a signal collection module, a digital signal processing module, a digital-to-analog conversion module, and an output module. The signal acquisition module comprises a sound sensor, an analog front end and an analog-to-digital converter; the sound sensor adopts an MEMS microphone array and converts sound wave pressure change into an analog electric signal; a pre-amplifier, a biasing circuit and an anti-aliasing filter are arranged in the analog front end; the pre-amplifier amplifies an electric signal output by the microphone; the anti-aliasing filter is used for filtering high-frequency components higher than the Nyquist frequency before analog-digital conversion, and aliasing distortion is prevented. According to the invention, digital audio signals can be accurately processed in real time, echoes are effectively eliminated, noise is suppressed, the volume is stabilized, the voice definition and the tone quality are improved, and the audio signal processing quality of the electronic microphone is greatly improved.

A communication system provides reliable broadband communication with reduced power consumption in a user equipment (UE) receiver. The UE may include a receiver circuit for receiving a radio frequency (RF) signal from a wireless network and outputting an analog baseband signal. The RF signal includes M copies of a replica signal in the frequency domain. The analog baseband signal includes the M copies of the replica signal uniformly offset from each other by a bandwidth F in the frequency domain and includes gaps between adjacent copies. The UE also includes an anti-aliasing analog filter, an analog-to-digital converter (ADC). The ADC samples the output of the anti-aliasing filter at a sampling frequency selected to obtain a digital baseband signal, the digital baseband signal including a combined digital copy of the M copies of the replica signal overlapping each other.

The utility model relates to the technical field of driving circuits, in particular to an ADC (Analog to Digital Converter) preceding-stage single-ended to differential driving circuit, which comprises a proportional operation circuit, a reverse operation amplification circuit and an anti-aliasing filter, the proportional operation circuit comprises a signal input end P1, a resistor RG, a resistor RF, a capacitor C1, an amplifier A1 and a first voltage division circuit used for providing reference voltage for the amplifier A1, and the reverse operation amplification circuit comprises a resistor R1, a resistor R2, an amplifier A2 and a second voltage division circuit used for providing reference voltage for the amplifier A2. The anti-aliasing filter comprises a resistor R9, a resistor R10, a capacitor C4 and a capacitor C5. According to the utility model, through the single-ended-to-differential driving circuit composed of the two operational amplifiers, the peripheral resistors, the peripheral capacitors and the like, processing such as following, amplification or attenuation, filtering, differential conversion and the like can be carried out on the amplitude of an input signal, the signal conditioning is realized, the ADC is adapted, and the application scene is wide.

The present invention discloses a SAR ADC front-end circuit and a synchronous sampling multiplexed analog-to-digital converter, wherein the SAR ADC front-end circuit includes a programmable gain amplifier, an anti-aliasing filter and a driving circuit, wherein the driving circuit includes a first switch, a resistor, a filter capacitor, a buffer amplifier and a second switch; the overall input end after the first switch and the resistor are connected in series is connected to the anti-aliasing filter, the overall output end is respectively connected to one end of the filter capacitor and the input end of the capacitor array, and the other end of the filter capacitor is grounded; the buffer amplifier and the second switch are connected in series to the output end of the anti-aliasing filter, and the buffer amplifier and the second switch are connected in series to the first switch and the resistor as a whole. The present invention enhances the signal driving capability of the SAR ADC, fully attenuates the impact of the switch capacitor kickback at the ADC input end, and eliminates the impact of the noise of the buffer amplifier on the ADC, thereby solving the problems existing in the off-chip drive circuit and the on-chip drive circuit in the prior art.

The utility model relates to the field of analog-to-digital converters, in particular to a mixed channel analog-to-digital converter, which comprises an anti-aliasing filter bank, a digital calibration engine, a signal processing module, a self-adaptive clock distribution network and a data integration module, according to the mixed channel analog-to-digital converter provided by the utility model, the SAR ADC and the Pipeline ADC architecture ADC are integrated, and two paths of signals work cooperatively through the adaptive clock distribution network, so that full-band signal acquisition is realized; an error suppression double-closed-loop architecture design is adopted, the random offset error standard deviation is reduced, and random noise interference generated by a front-end analog circuit is effectively suppressed.

The application discloses a new energy automobile power battery thermal balance integrated monitoring system. In the application, a data buffer module effectively isolates a signal source from subsequent circuits through the characteristics of high input impedance and low output impedance, ensures the stability and integrity of the signal in the transmission process, and a self-adaptive gain controller module further optimizes the quality of the signal by monitoring and automatically adjusting the amplifier gain in real time, so that the output signal is ensured to be in a suitable dynamic range, distortion caused by too small signal is prevented, and saturation caused by too large signal is avoided. A data noise suppression module uses a low-pass active filter and a noise gate technology to specifically reduce noise components in the signal, and further improves the quality and definition of the signal. An anti-aliasing filter module effectively removes signal components higher than the Nyquist frequency before signal sampling, prevents aliasing from occurring, and ensures the accuracy of the sampling data.

The utility model relates to an anti-aliasing filter with a high roll-off coefficient and a testing machine, and the filter comprises a first-stage operational amplifier module which is connected with a first analog signal, amplifies the first analog signal, and outputs the amplified first analog signal; the impedance conversion filtering module is connected with the first-stage operational amplifier module, and is used for performing impedance conversion and filtering on the signal output by the first-stage operational amplifier module and then outputting the signal; the second-stage operational amplifier module is connected with the impedance conversion filtering module and the output end of the filter, receives the signal output by the impedance conversion filtering module for signal processing, and outputs the processed signal to the output end of the filter; and the wave trap is connected between the second-stage operational amplifier module and the output end of the filter. The wave trap is designed between the second-stage operational amplifier module and the output end of the filter, the suppression capability of a transition zone can be effectively improved, a good roll-off coefficient is achieved in the transition zone, compared with a cavity filter, the size is small, and the design difficulty is reduced.

A VCO-Based Continuous-Time (CT) delta-sigma modulator (DSM) with a noise-shaping (NS) successive approximation register (SAR) quantizer for a 3rd order noise transfer function (NTF) is presented. An anti-aliasing filter (AAF) enables this new hybrid architecture. The 28 nm CMOS prototype NSQ VCO CTΣΔ achieves 84.2 dB SNDR and 86.8 dB DR within a 1 MHz bandwidth while consuming 1.62 mW at 100 MS / s. The core circuit occupies only 0.024 mm2. No calibration or coefficient tuning is required.

Methods and apparatus for optical filtering. In one example, a device includes a spatial light modulator having a two-dimensional array of square, rectangular, or diamond pixels, and a controller coupled to the spatial light modulator. The controller can be configured to write image data representing an image to the spatial light modulator to control the spatial light modulator to display the image for a frame period, and during the frame period, spatially reposition the image on the array of pixels over a plurality of positions, each individual position of the plurality of positions being maintained for a respective time period, wherein the respective time period is selected according to one or more non-negative coefficients of an anti-aliasing filter transfer function.

The invention discloses a DC offset cancellation circuit of a single-frequency continuous wave radar with a zero intermediate frequency receiver structure, comprising a mixer intermediate frequency port, an adjustable DC offset circuit, a differential amplifier, an anti-aliasing filter and an analog-to-digital converter; the mixer intermediate frequency port is used to access a first voltage source voltage divider circuit signal and output it to the differential amplifier; the adjustable DC offset circuit is used to access a second voltage source voltage divider circuit signal and suppress power supply voltage ripple and system noise, and output it to the differential amplifier; the output to the differential amplifier is used to perform DC offset cancellation on two voltage source voltage divider circuit signals, and output them to the anti-aliasing filter; the anti-aliasing filter is used to filter out signals outside a frequency band of interest, retain part of the useful DC offset, and output it to the analog-to-digital converter; the analog-to-digital converter is used to convert analog signals into digital electrical signals and output them.

The invention belongs to the technical field of industrial lifting equipment monitoring, and particularly relates to a dynamic load monitoring lithium electric lifting appliance management system which comprises a data acquisition module, a signal processing module, a cloud processing module, a load early warning module, an execution control module and a data storage module. The data acquisition module adopts a framework formed by an acquisition end and a cloud end; the signal processing module adopts an anti-aliasing filter and a wavelet packet to decompose and process load data; the cloud processing module dynamically adjusts computing resources by adopting a distributed architecture and performs load prediction by utilizing a pre-training model; the load early warning module performs normalization processing on the data and constructs a dynamic confidence interval; the execution control module awakens the power module according to the early warning signal and dynamically adjusts the weight of the abnormal item; the data storage module stores historical fault data to optimize early warning accuracy. According to the system, high-precision real-time monitoring of the load of the lithium battery lifting appliance can be realized, and the safety of lifting operation is improved.

A system may include a passive floating attenuator configured to receive an analog physical quantity and attenuate the analog physical quantity to a floating attenuated signal defined by voltage nodes other than the voltage nodes of the analog physical quantity, an anti-aliasing filter configured to filter the floating attenuated signal to generate a filtered attenuated signal, and a switched-capacitor sampling circuit comprising a plurality of switches configured to sample the filtered attenuated signal.

The utility model discloses a field intensity detection circuit of an alternating electric field, which relates to the technical field of field intensity detection of a power grid in space, and comprises an antenna, an anti-aliasing filter, a band-pass filter and an MCU (Microprogrammed Control Unit), the anti-aliasing filter prevents frequency spectrum aliasing during digital sampling and filters out low-frequency and high-frequency noise, the band-pass filtering transmission band is narrower, out-of-band signals are further filtered out, and the anti-aliasing filter is electrically connected with the MCU. The device is used for detecting the field intensity of an alternating electric field in a space, converting the field intensity into field intensity through a circuit, and then displaying the field intensity; the device can be used for field intensity detection of a power grid in space, namely, the device is suitable for a 220 / 380V50Hz high-voltage system and a 110V60Hz low-voltage system of a power frequency network; the circuit provided by the utility model can be used for detecting the field intensity level of the voltage, and can also be used for detecting the safety field intensity of power grid equipment maintainers.

The embodiment of the invention provides equipment and a method for testing natural vibration characteristics of a bogie system of a motor train unit under pulse excitation. The equipment comprises signal acquisition equipment and signal processing equipment, the signal acquisition equipment comprises an acceleration sensor, an elastic force hammer, an anti-aliasing filter and a signal transmission module; the signal processing equipment comprises a test configuration module, a signal confirmation module, a frequency response calculation module and a natural vibration characteristic parameter identification module; according to the invention, a simple and rapid test analysis system for the natural vibration characteristics of the bogie system of the motor train unit can be realized, and a basis is provided for dynamic performance design and evaluation of the motor train unit.

The present invention discloses a multi-channel high-speed dual AD synchronous sampling device and method, which is applied to data acquisition equipment for new energy vehicle testing. The synchronous sampling device includes a dual AD sampling unit, which includes a first amplifier circuit and a second amplifier circuit for analog input, a first second-order pass filter circuit and a second second-order pass filter circuit, a first high-precision AD sampling circuit and a second high-precision AD sampling circuit, a serial / parallel shift register, and a digital signal processor. The dual AD sampling unit used in this application can fully cover the amplitude of the measured signal, reduce the occurrence of shearing and clipping, avoid the component harmonics above the Nyquist frequency from being aliased into the baseband, resulting in data distortion, ensure signal integrity, and reduce the design difficulty and cost of the anti-aliasing filter.

A system for real-time decomposition of electrophysiological signals and arrhythmia classification using adaptive neural signal processing, comprising: a plurality of electrodes configured to acquire electrophysiological signals from a subject; an analog input stage consisting of an instrumentation amplifier, an impedance matching circuit, and an anti-aliasing filter for processing the acquired electrophysiological signals; an analog-to-digital converter unit operationally coupled to the analog input stage and configured to digitize the processed electrophysiological signals at a programmable sampling rate; a processing unit consisting of a microcontroller and a digital signal processor operationally coupled to each other via a communication bus; and a neural processing unit operationally coupled to the processing unit.a storage unit that stores executable instructions and trained neural parameters; wherein the processing unit and the neural processing unit are configured to jointly perform an adaptive decomposition of the digitized electrophysiological signals into a variety of intrinsic signal components based on dynamically updated baseline representations, extract temporal and morphological features from the intrinsic signal components, and classify the extracted features in real time into one or more arrhythmia categories.