16 results about "Anti-aliasing filter" patented technology

Methods and apparatus for optical filtering are provided. In one example, an apparatus includes a spatial light modulator (102) having a two-dimensional array of square, rectangular, or rhombic pixels, and a controller (110) coupled to the spatial light modulator (102). The controller (110) may be configured to write image data (114) representing an image to the spatial light modulator (102) to control the spatial light modulator (102) to display the image for a frame period, and during the frame period, spatially reposition the image across a plurality of locations over the array of pixels, each single position of the plurality of positions is maintained for a respective time period, wherein the respective time period is selected according to one or more non-negative coefficients of an anti-aliasing filter transfer function (402).

Analog front-end (AFE) system with an anti-aliasing filter circuit including a filter bypass switch configured to provide charge injection and / or clock pass-through independent of an input signal, wherein the AFE system comprises: at least one sampling capacitor of an analog-to-digital converter (ADC) circuit configured to sample an output of the anti-aliasing filter circuit; an amplification or buffer circuit with an input for receiving the input signal; and the anti-aliasing filter circuit coupled to an output of the amplification or buffer circuit, wherein the filter circuit comprises the following: a filter resistor; a filter capacitor coupled to one terminal of the filter resistor; and the filter bypass switch, which is connected in a bootstrapped configuration to pull a control terminal of the filter bypass switch above or below a supply voltage, wherein the filter bypass switch is connected in parallel to the filter resistor, wherein the filter bypass switch has an ON state and an OFF state, wherein, when in the ON state, the filter bypass switch is configured to bypass the filter resistance, allowing the amplification or buffer circuit to drive the at least one sampling capacitor through the filter bypass switch; and wherein, when in the OFF state, the filter bypass switch is designed to cause the amplification or buffer circuit to drive the at least one sampling capacitor through the filter resistor.

A system for real-time fault detection and isolation in a high-voltage transmission network, the system comprising: a plurality of input terminals configured to be connected to instrument transformers associated with at least one transmission line to receive analog voltage signals and analog current signals corresponding to multiple phases of the transmission line; a signal conditioning unit electrically connected to the plurality of input terminals, the signal conditioning unit comprising an isolation arrangement, a programmable gain arrangement, and an anti-aliasing filter arrangement configured to produce conditioned analog signals;a multi-channel analog-to-digital converter unit that is operationally coupled with the signal conditioning unit and configured to simultaneously sample the processed analog signals at a predetermined sampling rate to generate digitized electrical parameter data; a time synchronization unit configured to assign precise timestamps to the digitized electrical parameter data based on a reference time source;a processing unit operationally coupled with the analog-to-digital converter unit and the time synchronization unit, wherein the processing unit is configured to execute instructions for detecting abnormal electrical states by performing signal preprocessing, extracting characteristic features from the digitized electrical parameter data, comparing the extracted features with predefined operating criteria, classifying a detected fault state based on the extracted features, and determining a fault location along the transmission line; and an isolation control unit operationally coupled with the processing unit, configured to generate control signals for actuating at least one switching device to isolate a faulty section of the transmission network in response to the detected fault state.

The application relates to the technical field of electrical safety, and particularly discloses an arc fault protection method based on a circuit breaker intelligent algorithm, which comprises the following steps: S1, collecting a line current signal in real time, eliminating frequency converter harmonic interference of an original signal through an anti-aliasing filter, and converting the original signal into a digital signal; S2, processing the current signal through a three-stage cascaded wavelet analysis module, and outputting a dynamic peak-to-average ratio to S4; S3, detecting a current disturbance based on a double sliding rail window, outputting a disturbance positioning mark and a time-frequency feature to S4, determining a disturbance event, and positioning a starting point; S4, receiving the dynamic peak-to-average ratio of S2 and the disturbance positioning mark and the time-frequency feature of S3, processing according to a characteristic analysis result, and adopting a direct interruption method and an electromagnetic radiation-current frequency domain cross verification method; and S5, constructing an arc energy accumulation prediction model; the application solves the problems of weak arc missing detection, electromagnetic interference misoperation and delay.

Methods and apparatus prepare medical or therapy data, such as respiratory therapy data for electronic communication to a server system, such as a monitoring system (100). The data may be accessed. Low-pass data may be generated by applying an anti-aliasing filter to the data. Low-rate data may be generated by applying a down-sampling filter to the low-pass data. Encoded data may be generated by performing one or more of intermediate floating-point interpolation, simple linear predictive delta encoding, and / or Rice-Golomb encoding on the low-rate data. The encoded data may be packaged as compressed data with a compression header.

The utility model relates to the field of analog-to-digital converters, in particular to a mixed channel analog-to-digital converter, which comprises an anti-aliasing filter bank, a digital calibration engine, a signal processing module, a self-adaptive clock distribution network and a data integration module, according to the mixed channel analog-to-digital converter provided by the utility model, the SAR ADC and the Pipeline ADC architecture ADC are integrated, and two paths of signals work cooperatively through the adaptive clock distribution network, so that full-band signal acquisition is realized; an error suppression double-closed-loop architecture design is adopted, the random offset error standard deviation is reduced, and random noise interference generated by a front-end analog circuit is effectively suppressed.

The invention belongs to the technical field of industrial lifting equipment monitoring, and particularly relates to a dynamic load monitoring lithium electric lifting appliance management system which comprises a data acquisition module, a signal processing module, a cloud processing module, a load early warning module, an execution control module and a data storage module. The data acquisition module adopts a framework formed by an acquisition end and a cloud end; the signal processing module adopts an anti-aliasing filter and a wavelet packet to decompose and process load data; the cloud processing module dynamically adjusts computing resources by adopting a distributed architecture and performs load prediction by utilizing a pre-training model; the load early warning module performs normalization processing on the data and constructs a dynamic confidence interval; the execution control module awakens the power module according to the early warning signal and dynamically adjusts the weight of the abnormal item; the data storage module stores historical fault data to optimize early warning accuracy. According to the system, high-precision real-time monitoring of the load of the lithium battery lifting appliance can be realized, and the safety of lifting operation is improved.

A system may include a passive floating attenuator configured to receive an analog physical quantity and attenuate the analog physical quantity to a floating attenuated signal defined by voltage nodes other than the voltage nodes of the analog physical quantity, an anti-aliasing filter configured to filter the floating attenuated signal to generate a filtered attenuated signal, and a switched-capacitor sampling circuit comprising a plurality of switches configured to sample the filtered attenuated signal.

A system for real-time decomposition of electrophysiological signals and arrhythmia classification using adaptive neural signal processing, comprising: a plurality of electrodes configured to acquire electrophysiological signals from a subject; an analog input stage consisting of an instrumentation amplifier, an impedance matching circuit, and an anti-aliasing filter for processing the acquired electrophysiological signals; an analog-to-digital converter unit operationally coupled to the analog input stage and configured to digitize the processed electrophysiological signals at a programmable sampling rate; a processing unit consisting of a microcontroller and a digital signal processor operationally coupled to each other via a communication bus; and a neural processing unit operationally coupled to the processing unit.a storage unit that stores executable instructions and trained neural parameters; wherein the processing unit and the neural processing unit are configured to jointly perform an adaptive decomposition of the digitized electrophysiological signals into a variety of intrinsic signal components based on dynamically updated baseline representations, extract temporal and morphological features from the intrinsic signal components, and classify the extracted features in real time into one or more arrhythmia categories.

This invention relates to the field of electronic microphone audio signal processing technology, and provides an electronic microphone audio signal processing system and method, including a server connected to a signal acquisition module, a digital signal processing module, a digital-to-analog converter module, and an output module. The signal acquisition module includes a sound sensor, an analog front-end, and an analog-to-digital converter. The sound sensor uses a MEMS microphone array to convert changes in sound wave pressure into analog electrical signals. The analog front-end internally includes a preamplifier, a bias circuit, and an anti-aliasing filter. The preamplifier amplifies the electrical signal output by the microphone. The anti-aliasing filter filters out high-frequency components above the Nyquist frequency before analog-to-digital conversion, preventing aliasing distortion. This invention can process digital audio signals in real time and accurately, effectively eliminating echo, suppressing noise, stabilizing volume, and improving speech clarity and sound quality, greatly improving the audio signal processing quality of electronic microphones.

The application discloses a high-precision differential sample-and-hold circuit, which comprises a differential input voltage translation circuit, an auxiliary differential input buffer stage, auxiliary sample-and-hold switches SWX3 and SWX4, a differential gate voltage bootstrap sample-and-hold switch circuit and a high input impedance buffer output stage; when the circuit is in a sampling state, the sampling switches SW1 and SW2, the isolation switches SWX1 and SWX2, the auxiliary sample-and-hold switches SWX3 and SWX4 are all closed, and an input signal charges an anti-aliasing filter capacitor; when the circuit enters a holding state, the differential gate voltage bootstrap sample-and-hold switch circuit first turns off the sampling switches, and then the auxiliary sample-and-hold switches and the isolation switches are simultaneously turned off, so that the voltage signal at the end of the sampling state is held on the filter capacitor and is output to a subsequent stage through the buffer output stage; the circuit has high input impedance and can accept a higher signal source output impedance; the differential gate voltage bootstrap sample-and-hold circuit does not have significant clock feedthrough and charge injection errors, and the holding precision is ensured.

The utility model provides a high-speed signal acquisition device and an automatic test system in order to solve the problem of insufficient signal-to-noise ratio of signals in the prior art. The equipment comprises an analog front-end module, an analog-to-digital conversion module, a multi-stage storage module, an interface module, a clock synchronization module, a digital correction module and a distributed data processing module. The analog front-end module adopts three-stage processing of a signal conditioning circuit, a differential amplifier and an anti-aliasing filter, low-noise amplification and single-end-to-differential output are realized through the signal conditioning circuit, the bandwidth is accurately limited by combining the anti-aliasing filter, the signal-to-noise ratio of a signal is increased to more than 100dB, common-mode interference and aliasing distortion are effectively inhibited, and the signal-to-noise ratio of the signal is increased to more than 100dB. And the nanosecond baseline error is ensured. The analog-to-digital conversion module adopts a multi-ADC time interleaving architecture and is matched with a phase locking circuit to generate a synchronous clock with the phase difference of 180 degrees / n, so that the equivalent sampling rate is improved to n times of that of a single channel, and meanwhile, the time sequence offset between the channels is eliminated.

An inertial rotary sensor comprising a vibrating resonator (1) associated with at least two first transducers (2.1) connected to a first electronic processor unit (5) via electronic multiplexer means (6) so as to be operated successively in a motor mode and in a detection mode and so as to provide a first detection signal. The vibrating resonator (1) is associated with at least two second transducers (2.2) connected to a second electronic processor unit (4) via two load amplifiers (3.1), two anti-aliasing filters (3.2) and two ADCs (3.3) so as to be operated in the detection mode and to provide a second detection signal. The sensor comprises an electronic hybridization unit (20) for forming a third detection signal from the first and second detection signals.

The application discloses a kind of high integration ultra-wideband miniaturization low-cost active antennas, for radio frequency and antenna integration design, including: planar spiral antenna board, broadband coaxial balun, wave-absorbing foam, back cavity, radio frequency main carrier plate and back plate, the radio frequency main carrier plate includes radio frequency power supply, radio frequency circuit, radio frequency, radio frequency circuit includes radio frequency transceiver front end FE SIP, first frequency conversion circuit MIX1 SIP, intermediate frequency filter circuit IF1 SIP, secondary frequency conversion circuit MIX2 SIP, intermediate frequency circuit IF SIP, anti-aliasing filter AAF and internal integrated VCO frequency synthesizer PLL+VCO, the application has the characteristics of high integration, miniaturization, low cost, and can quickly build the verification platform of different array scheme, without redeveloping microwave front end.

The utility model discloses an IMU-based satellite following device, which comprises an MEMS sensor, an integrated high-performance microprocessor, a temperature control module and an anti-aliasing filter, the MEMS sensor, the temperature control module and the anti-aliasing filter are connected to the integrated high-performance microprocessor, the temperature control module and the anti-aliasing filter are installed on the MEMS sensor, and the temperature control module and the anti-aliasing filter are connected to the integrated high-performance microprocessor. The utility model relates to the technical field of satellite-following navigation, and the satellite-following navigation system has higher real-time performance; the IMU can output measured carrier data at high frequency and transmit the data to the ACU for attitude angle compensation resolving, so that the problem of low updating rate caused by inertial navigation assembly integrated data resolving processing is avoided, and the satellite following device based on the IMU can sense and respond to the motion state change of a carrier in real time, so that a satellite following strategy is adjusted more quickly; the device is higher in flexibility.

The invention provides a power device life prediction method and system, and the method comprises the steps: S1, carrying out the data collection of a target power device, collecting the temperature, operation time, and the voltage and current data sampled by employing an anti-aliasing filter, and calculating the on-resistance; carrying out VMD decomposition on the on-resistance to obtain a new on-resistance, and carrying out temperature compensation calculation on the new on-resistance; s2, constructing a residual service life label of the target power device; s3, the collected data is preprocessed; s4, constructing a power device residual service life prediction model and verifying the power device residual service life prediction model; comprising the steps that an LSTM neural network is adopted to construct a power device remaining service life prediction model; and finally, carrying out anti-standardization processing on a prediction result through an output layer, generating an actual residual service life prediction value, and obtaining an optimal model meeting requirements.