291 results about "Anti-aliasing filter" patented technology

A chopped Hall effect sensor topology includes a switched Hall plate, an amplifier responsive to an output of the switched Hall plate and a filter stage responsive to the output of the amplifier and including an anti-aliasing filter and a selective filter that is tuned to the modulation frequency. The switched Hall plate includes a Hall element and a Hall plate modulation circuit that modulates the Hall offset signal component or the magnetic signal component. In embodiments in which the Hall offset signal component is modulated by the switched Hall plate, the amplifier, if chopped, includes an even number of additional modulation circuits. In embodiments in which the magnetic signal component is modulated by the switched Hall plate, the amplifier contains an odd number of modulation circuits. The described topology provides a low noise, fast response time Hall effect sensor.

A chopped Hall effect sensor topology includes a switched Hall plate, an amplifier responsive to an output of the switched Hall plate and a filter stage responsive to the output of the amplifier and including an anti-aliasing filter and a selective filter that is tuned to the modulation frequency. The switched Hall plate includes a Hall element and a Hall plate modulation circuit that modulates the Hall offset signal component or the magnetic signal component. In embodiments in which the Hall offset signal component is modulated by the switched Hall plate, the amplifier, if chopped, includes an even number of additional modulation circuits. In embodiments in which the magnetic signal component is modulated by the switched Hall plate, the amplifier contains an odd number of modulation circuits. The described topology provides a low noise, fast response time Hall effect sensor.

The invention discloses an integrated multi-channel synchronous vibration data acquisition, monitoring and analysis diagnosis device. The data acquisition unit comprises a signal conditioning circuit, an anti-aliasing filtering circuit, a multi-channel synchronous sampling chip, a system control logic unit, a pulse-shaping circuit (16), a phaselocking frequency multiplication chip and a microprocessor CPU, wherein the system control logic unit comprises a channel configuration logic unit, a clock generation logic unit, a rotating speed measurement logic unit, a sampling control logic unit and a frequency divider, and the data acquisition unit (1) is directly connected with a plurality of eddy current vibration displacement sensors, ICP type piezoelectric vibration acceleration sensors or magnetoelectric vibration speed sensors, and has an interface of a single-channel direct-connected eddy-current, photoelectric or magnetoelectric key phase / revolution speed sensor and so on. The CPU core board is connected with a computer or a palm computer through a network and a USB or a serial interface and finishes the data acquisition for monitoring and analysis diagnosis.

Apparatus and methods for optimizing the interplay between the sampling rate of an ADC of a receiver system and a bandwidth of analog anti-aliasing filters are described. The described technology can be used to mitigate aliasing for receiver systems that operate at fractional sampling rates by optimizing a bandwidth of optical and electrical filters included in the receiver systems.

An RF signal source receives wideband digital signals representing the instantaneous amplitude of the desired RF, and ΣΔ converts to ternary ΣΔ signals. The ternary ΣΔ signals are delayed in a transversal filter and the delayed signals are converted to currents for application to a traveling-wave summer for producing the desired RF. The traveling-wave summer may be a transmission line. The currents may be weighted with a filter response in order to limit the bandwidth of the RF signals. The RF may be coupled out through an antialiasing filter. The digital clocks may be delayed to correspond with the delays of the combiner, to impart directionality to the summed signals.

A digitizing analog front end (DAFE) using mixed technology on a single substrate is described. SiGe BiCMOS technology is implemented for the semiconductor components, which include a low noise amplifier and an analog-to-digital converter. Micro Electro Mechanical System (MEMS) switches are used to change the filtering characteristics of several filters, including an anti-aliasing filter and a pre-select and anti-jamming filter.

The invention relates to a device and a method for detecting pipeline closed cracks based on the vibro-acoustic modulation technology and belongs to the pipeline nondestructive testing field. The device provided by the invention comprises a computer, a first function generator, a second function generator, a first power amplifier, a second power amplifier, a vibration exciter, an accelerometer, acharge amplifier, a first thickness concertina-type piezoelectric ceramic sheet array and a second thickness concertina-type piezoelectric ceramic sheet array, an anti-aliasing filter and a data collection card. The method provided by the invention comprises the following steps of: acquiring a pipeline first-order bending vibration inherent frequency by swept frequency excitation; taking the frequency as the one of low-frequency vibration in the vibro-acoustic modulation detection; simultaneously exciting low-frequency bending vibration and high-frequency supersonic waves into the pipeline, determining whether there exists closed cracks inside the pipeline by the existence of frequency components which equal high frequency supersonic wave frequency subtracts or adds low frequency bending vibration frequency in a received signal frequency spectrogram. The device provided by the invention is utilized to solve the problem that it is hard to detect closed cracks by traditional methods, and can be applied to detect closed cracks in industrial pipelines.

A television (TV) receiver includes a multi-standard channel filter with a programmable intermediate frequency adapted to receive television signals in a variety of television standards and formats. In one embodiment, a receiver includes a tuner and a channel filter. The tuner receives input RF signals encoding information in one of a number of formats and converts the input RF signals to intermediate signals having an intermediate frequency (IF). The intermediate signals are coupled to the channel filter. The channel filter includes an anti-aliasing filter for filtering the intermediate signals, an analog-to-digital converter for sampling the filtered intermediate signals and generating a digital representation thereof, and a signal processor for processing the digital representation of the intermediate signals in accordance with the format of the input RF signal. The signal processor generates digital output signals indicative of information encoded in the input RF signal.

The invention relates to a method for detecting a fault of a train suspension system on the basis of a robust observer. The method comprises the following steps of: a, carrying out modeling on the train suspension system and designing the corresponding fault detection robust observer; b, utilizing an acceleration sensor and a gyroscope to respectively acquire acceleration signals and angular speed signals of a vehicle body and front and rear bogies when a train operates; c, carrying out treatment of anti-aliasing filtering, high-pass filtering, quadratic integration and the like on the acceleration signals and only carrying out anti-aliasing filtering and high-pass filtering on the angular speed signals to obtain a system output; d, utilizing the fault detection robust observer to carry out processing on the system output to obtain a residual output; e, according to a residual sequence, applying a MCUSUM (Multivariable Cumulative Sum) method to calculate a fault detection index; and f, by a fault diagnosis expert system, generating a fault alarm threshold value in real time and judging whether to give an alarm. According to the detection method, when the suspension system has a small fault, the fault can be detected in real time, the alarm is given and the possibility of false alarm and failure in report of a fault detection system can also be reduced.

Cumulative histograms generated based on threshold matrixes with respect to halftone-dot area percentage data of the four plates C, M, Y, K are referred to for thereby determining the existential probability of halftone dots. Then, average colorimetric data are calculated from predetermined colorimetric data with respect to every 2n colors using the area percentage as a weighting coefficient. An anti-aliasing filtering process is effected on the average colorimetric data to produce device-independent image data for a color printer. The cumulative histograms are emphasized and the average colorimetric data are emphasized to accurately reproduce a peculiar pattern such as a rosette image which will appear on a printed document on a proof which is outputted from a low-resolution color printer. A process is provided for changing the halftone-dot area percentage data based on the type (wood-free paper, art paper, or the like) of paper of a print sheet of the printed document and the halftone-dot area percentage data on presensitized plates, when the halftone-dot area percentage data are converted into bit map data for the color printer, for thereby reproducing "impression irregularity" and "harshness" out of the visual irregular qualities of paper.

The invention discloses a device and method for detecting a micro grid harmonic wave and inter-harmonics based on STM32F107VCT6, and belongs to the technical field of power quality detection. The device comprises a signal acquisition module, a signal processing module and a signal display output module. A Hall voltage current sensor is adopted in the signal acquisition module to serve as a collector for collecting power grid three-phase voltage electric current. The signal processing module comprises a switching circuit of voltage and current, an anti-aliasing filter circuit, an electrical level regulator circuit, a core processor STM32F107VCT6 and a processor peripheral circuit. The output end of the electrical level regulator circuit is connected with the input end of an A / D converter of the core processor STM32F107VCT6. The method comprises the processes of collection and processing of signals. The device and method meets the requirement of computational accuracy and computational speed, and meets flexibility and convenience of the structure.

The invention relates to the data acquisition and equipment fault diagnosis field, in particular to a portable vibration data acquisition device and a method based on embedded technology. The device comprises an acceleration transducer, an acceleration transducer interface module, a capacitance isolation module, a programmed control amplifying module, a self-adapting antialiasing filter, an AD converter and the bus interface of the converter which are connected in turn; moreover, the device also comprises an ARM minimum system, a DIM144 interface module, a singlechip as well as an electronic label module, a keyboard, a power source management and voltage conversion module which are connected with the singlechip; in addition, the programmed control amplifying module and the self-adapting antialiasing filter are also connected with a singlechip 8. The device communicates with an upper computer through a serial port to assign point inspection task, and transmits the sampling frequency in the point inspection task to the singlechip; moreover, the singlechip sets the lowpass cut-off frequency of the antialiasing filter according to the sampling frequency. With low power consumption, convenient operation and powerful data analysis function, the device has the characteristics of real time and accuracy.

The invention belongs to the technical field of avionics and relate to a module and a method for acquiring and processing a vibration signal of the rotating component of a helicopter. The module comprises a sensor interface circuit, a programmable amplifier, an anti-aliasing filter, an A / D converting circuit, and a FPGA which are successively connected. The method comprises steps of using a vibration sensor to input the vibration signal into the sensor interface circuit in order to convert the vibration signal into a voltage signal, and passing the voltage signal through a high-pass filter in the sensor interface circuit in order to filter a DC component in the voltage signal. Compared with a CPU-controlled A / D converting manner, a FPGA-controlled A / D converting manner increases sampling frequency and sampling realtimeness. By using anti-aliasing filtering technology, the order and the cut-off frequency of the filter can be set flexibly; the stop band descending slope of the filter is increased; and a signal anti-interference capability is enhanced.

The invention discloses a capacitive voltage-division type self-calibration optical voltage transducer, which is used for solving the problem that the existing capacitive voltage-division type optical voltage transducer generates measurement accuracy temperature drift under the influence of temperature and is poor in interference rejection. The capacitive voltage-division type self-calibration optical voltage transducer comprises a capacitive voltage divider, a base and an optical voltage sensor, the capacitive voltage divider comprises a high-voltage capacitor, a low-voltage capacitor, a signal output terminal and a grounding terminal; the optical voltage sensor comprises an optical voltage sensing unit, and further comprises a signal processing unit; and the signal processing unit comprises a photoelectric conversion module, an anti-aliasing filter, a band-pass filter, an amplifier, an A / D (analogue / digital) conversion module, a DSP (Digital Signal Processor),a D / A conversion module, an amplifying module, an overvoltage protection module, an LED (Light-Emitting Diode) light source, a power conversion module, a combining unit and a direct current power module, and further comprises a photoelectric hybrid connector module. The capacitive voltage-division type self-calibration optical voltage transducer is used for voltage measurement in an electric power system.

The present invention addresses the problem of a second (or higher) order representation of a transmit signal which is transmitted by a transceiver being mixed into the region of the frequency spectrum of interest to the transceiver receiver, such that it can not then be spectrally filtered out. At its most straightforward, in one embodiment of the invention this is achieved by providing a cross-talk cancellation unit which takes the transmit signal, and obtains the second (or higher) order representation thereof. This representation is then subtracted from the received signal before the signal is passed to the radio control receiver signal processing elements. However, in a more preferred arrangement a filter is also provided, to filter the second or higher order version of the transmit signal, prior to its being subtracted from the received signal. The filter basically takes out the effects of any other filtering or processing which has happened to the transmit signal in the receiver signal chain. This would be, for example, the filtering effects provided by the anti-aliasing filter in the receiver.

The invention discloses a two-dimensional sub-pixel sampling-based super-resolution display method and a two-dimensional sub-pixel sampling-based super-resolution display device. Based on the characteristic of diversity of R, G and B primary color sub-pixel arrangement of flat panel display equipment, a Nyquist frequency limiting region of each primary color sub-pixel arrangement is calculated, and a group of R, G and B primary color anti-aliasing filters is designed on the basis of the calculated Nyquist frequency limiting region of each primary color sub-pixel arrangement, so that the aim of weakening and even eliminating the aliasing introduced by sub-pixel sampling is fulfilled while a high image sensing resolution is kept. According to the method and the device, corresponding anti-aliasing filtering is applied to R, G and B primary color components of an original image respectively, and then sub-pixel sampling is performed on the filtered image according to the spatial position structure of the two-dimensional sub-pixel arrangement of the display equipment. The visual perception resolution of the flat panel display equipment is improved at a lower cost on the premise of not changing any physical attribute, super-resolution display of the display equipment is realized, and meanwhile, the method is simple and easy to implement.

There provides a two-point modulation phase modulation apparatus capable of obtaining an RF phase modulation signal of superior modulation precision with low power consumption and a simple configuration even in the event of inputting a wide band baseband modulation signal. A differentiator (21) of the opposite characteristics to the attenuation characteristics of anti-alias filter (22) is provided at the front stage of a D / A converter (6). As a result, it is possible to sufficiently suppress an alias signal without raising the sampling frequency of the D / A converter (6) (i.e. low power consumption) using an anti-alias filter (22) of a simple configuration (i.e. low cost) with a low order for a narrower bandwidth than a PLL modulation frequency bandwidth, and it is possible to obtain an RF phase modulation signal where the entire frequency band of input digital baseband modulation signal (S1) is reflected in a superior manner.

The invention discloses a three phase electrical measurement method based on positive-sequence component computation. The method comprises: 1, adopting a mutual inductor to collect voltage signals and current signals of a three phase line, and processing the collected voltage signals and current signals to form low voltage analog signals of voltage and current; 2, passing the low voltage analog signals through an anti-aliasing filter to form signals; 3, converting the signals obtained in step 2 into digital signals; 4, utilizing discrete Fourier transform computing method to obtain frequency domain components, and then utilizing sequence component decomposition method to obtain positive sequence, negative sequence and zero sequence components of fundamental wave voltage and current; and 5, computing the digital signals comprehensively after decomposing sequence components of fundamental wave voltage and current to form the parameters such as fundamental wave positive sequence active power, fundamental wave positive sequence active power reactive power and corresponding fundamental wave positive sequence active electric quantity and fundamental wave positive sequence reactive electric quantity, and finally computing electric quantity of the line by using the fundamental wave positive sequence active electric quantity and fundamental wave positive sequence reactive electric quantity.

The invention discloses a method and a device for precisely measuring temperatures of platinum resistors. The scheme for measuring the temperatures of the micro-current-drive four-wired Pt100 platinum resistors includes that the device for precisely measuring the temperatures of the platinum resistors comprises a constant-current source drive circuit, a four-wired platinum resistor interface circuit, an instrument amplifier circuit, an anti-aliasing filter circuit, a sampling hold circuit, an A / D (analog / digital) sampling circuit and a single chip microcomputer system. A constant-current source comprises two low-noise and low-offset bipolar operational amplifiers OP07CD with high open-loop gain; the four-wired platinum resistor interface circuit is divided into a constant-current source power lead and a voltage drive lead; the instrument amplifier circuit comprises a double-stage differential amplifier circuit; the anti-aliasing filter circuit is an RC low-pass filter circuit; an A / D converter is a 24-bit high-resolution A / D converter CS5550. The method and the device have the advantage that the measurement precision is high, calibrated temperature measurement errors are smaller than + / -0.03 DEG C, and requirements of industrial production procedures on high temperature measurement precision can be met.

This invention relates to a fully differential non-inverting parallel amplifier for detecting biology electrical signal, including input buffer circuits, differential filter circuits, data selector, non-inverting parallel amplifying circuits and analog-digital circuits. The biology electrical signal, first impeded and converted by the input buffer circuits, and then low-pass filtered by the differential filter circuits, shall be amplified with its common mode signal rejected by passing through the data selector and non-inverting parallel amplifier circuits. At last, the amplified biology electrical signal is output by analog to digital conversion in the analog-digital circuits after its noises beyond signal high frequency band are filtered by anti-aliasing filter net. This invention, with low noise and high common mode rejection ratio, stable baseline, large signal input dynamic range, is reliable and not easy to be saturated. Furthermore, it can support mature PACE Detecting with a low cost. It is notable in social and economical benefits for its simple electrical circuits and easy use in any biology electrical testing equipments and controlling system.

The invention provides a technique that saves rate conversion accompanying complicated calculations and shares an analog filter for anti-aliasing in a sampling device. The sampling device employs an anti-alias filter having a fixed cutoff frequency, an A / D converter and a D / A converter each having a clock signal input, which are capable of varying a sampling frequency, and a PLL circuit capable of varying the frequency of a clock signal; and it sets the sampling frequency not lower than an integral multiple of a signal bandwidth and double the cutoff frequency for sampling.

The invention discloses a method for realizing order analysis of rotating machinery, belonging to the technical field of signal processing. The method comprises the following steps of: extracting a vibration signal and a rotation speed signal of equipment by using a vibration acceleration sensor; performing anti-aliasing filtering by using an anti-aliasing filter; generating a digital signal by using a data acquisition card; generating an analog pulse by using a transmission ratio parameter and performing equal-angle resampling on the vibration signal; and realizing order analysis through spectrum conversion. By adopting the method, the defect of the need of additionally arranging a rotating speed signal sensor on an enterprise field for realizing order analysis is overcome. The method plays an important role in improving the technology of the conventional equipment.

A novel and useful method and apparatus for suppressing aliasing interferers in decimating and sub-sampling discrete time systems. The present invention is operative to reduce the requirements for or completely eliminate the need for the anti-aliasing filter by dynamically modifying the sub-sampling rate (or decimation ratio). Rather than maintain a constant sampling rate (or decimation ratio), the sampling rate (or decimation ratio) is randomized such that its average remains at the nominal value and the effective jitter is low enough for the low rate (or low decimation ratio) system to tolerate. This smears or spreads interfering signals across the spectrum resulting in a noise floor at a significantly reduced level much lower than that of the original interferer signal. The interfering signals are reduced to background noise wherein the level of the resulting noise floor is not nearly as strong as the original interfering signal. Aliasing interferers are effectively suppressed by spreading the energy of the interfering signals out over a wider spectrum.

The invention discloses a PMU and a method for achieving the on-line identification and alarm of the secondary synchronous oscillation. The PMU comprises an anti-aliasing filter module, an ADC sampling module, a synchronous sampling clock module, a DFT quadrature conversion module, a front-loading filter module, a phasor amplitude analyzing and processing module, and an uploading and processing module. The method comprises the steps of accurately calculating the synchronous phasor; pre-filtering the synchronous phasor; sampling and processing the calculated amplitude of the phasor; analyzing the frequency spectrum of the phasor amplitude; identifying the secondary synchronous oscillation according to the components of the frequency spectrum of the phasor amplitude; uploading the frequency components of the secondary synchronous oscillation and the alarm information to a dispatching master station. According to the technical scheme of the invention, the on-line identification and alarm of the secondary synchronous oscillation of the power system can be completed by the PMU. Through adopting the analysis on the frequency spectrum of measured high-density phasor data, the frequency components of the secondary synchronous oscillation can be accurately calculated. Therefore, the analysis monitoring accuracy and the analysis monitoring adaptability of the secondary synchronous oscillation are improved.

An integrated programmable gain amplifier circuit that receives at an input an analog signal, circuit including an operational amplifier and a gain setup network comprising resistive elements and selection elements, which may be controlled in order to setup the gain of the amplifier circuit. The gain setup network further includes capacitive elements, for defining, together with the resistive elements and the operational amplifier, an anti-aliasing filter of the active RC type.

A radar or sonar system amplifies the signal received by an antenna of the radar system or a transducer of the sonar system is amplified and then subject to linear demodulation by a linear receiver. There may be an anti-aliasing filter and an analog-to-digital converter between the amplifier and the linear receiver. The system may also have a digital signal processor with a network stack running in the processor. That processor may also have a network interface media access controller, where the system operates at different ranges, the modulator may produce pulses of two pulse patterns differing in pulse duration and inter-pulse spacing, those pulse patterns are introduced and used to form two radar images with the two images being derived from data acquired in a duration not more than twenty times larger than the larger inter-pulse spacing, or for a radar system, larger than one half of the antenna resolution time. One or more look-up tables may be used to control the amplifier. The radar system may generate digital output which comprises greater than eight levels of radar video.

A high-voltage circuit breaker synchronism detection device based on vibration energy mutation, including: three vibration sensors, fixedly installed on the three phase-separated operation bases of the high-voltage circuit breaker; / D conversion module and anti-aliasing filter module, the synchronous high-speed A / D conversion module receives the output of the three vibration sensors respectively; the signal analysis and processing module and the diagnosis conclusion output module connected in sequence, the signal analysis and processing module input synchronous acquisition The card's anti-aliasing filter module output and diagnosis conclusion output module are also externally connected to a contemporaneous index database. The invention also relates to a method for using the device to perform synchronous on-line detection of high-voltage circuit breakers. Since the present invention adopts real-time vibration data, and carries out the calculation of synchronous parameters and the determination of potential failures, it can effectively and more accurately obtain the synchronous index of the high-voltage circuit breaker without power failure, and improves the operating efficiency of the high-voltage circuit breaker itself and reliability.