281 results about "Signal chain" patented technology

Designs and operational methods to increase the dynamic range of image sensors and APS devices in particular by achieving more than one integration times for each pixel thereof. An APS system with more than one column-parallel signal chains for readout are described for maintaining a high frame rate in readout. Each active pixel is sampled for multiple times during a single frame readout, thus resulting in multiple integration times. The operation methods can also be used to obtain multiple integration times for each pixel with an APS design having a single column-parallel signal chain for readout. Furthermore, analog-to-digital conversion of high speed and high resolution can be implemented.

A universal music production system and related software is provided that enables an open source microprocessor and its operating system to provide ergonomic and user friendly control of editing audio processing configurations of one or more systems, instruments or synthesizers in a music studio edit mode environment and then utilize the studio edit mode song/performance configurations in a live mode performance environment that disables the user from certain studio edit mode functions. Ergonomic user functionality for creating ivory keyboard splits is provided. Also a song configuration sustain feature allows sounds generated in a previous song to be held over or sustained while a next song configuration is established and the user begins playing the next song. User created virtual controls can be displayed on a touch sensitive display screen enabling a user to control predetermined sound or performance parameters easily during a live performance. Also, reconfiguration of any or all of the sound signal chains for various sound tracks can be accomplished substantially instantaneously via set list loading of VST instrument and effect plug-ins.

Disclosed is a hybrid antenna array (100) comprising a plurality of digital branches (145), each digital branch including an analogue beamforming sub-array (e.g. 110-1), each sub- array having a plurality of antenna elements (120), a phase shifter (130) adapted to apply a phase shift to the signal from each antenna element, and a combiner (e.g. 135-1) adapted to combine the phase-shifted signals. Each digital branch also includes a signal chain (e.g.140-1) adapted to convert the output of the sub-array to baseband. The hybrid antenna array also comprises a digital processing module (150), including: an angle of arrival estimation sub-module (155) adapted to estimate an angle of arrival of a signal at the antenna elements; a phase control sub-module (170) adapted to control the phase shift applied by each phase shifter depending on the estimated angle of arrival; and a digital beamformer (165) adapted to combine the baseband signals from the digital branches using a weight vector to form an output signal (180).

An imager including a self test mode. The imager includes a pixel array for providing multiple pixel output signals via multiple columns; and a test switch for (a) receiving a test signal from a test generator and (b) disconnecting a pixel output signal from a column of the pixel array. The test switch provides the test signal to the column of the pixel array. The test signal includes a test voltage that replaces the pixel output signal. The test signal is digitized by an analog-to digital converter (ADC) and provided to a processor. The processor compares the digitized test signal to an expected pixel output signal. The processor also interpolates the output signal from a corresponding pixel using adjacent pixels, when the test switch disconnects the pixel output signal from the column of the pixel array.

The present invention addresses the problem of a second (or higher) order representation of a transmit signal which is transmitted by a transceiver being mixed into the region of the frequency spectrum of interest to the transceiver receiver, such that it can not then be spectrally filtered out. At its most straightforward, in one embodiment of the invention this is achieved by providing a cross-talk cancellation unit which takes the transmit signal, and obtains the second (or higher) order representation thereof. This representation is then subtracted from the received signal before the signal is passed to the radio control receiver signal processing elements. However, in a more preferred arrangement a filter is also provided, to filter the second or higher order version of the transmit signal, prior to its being subtracted from the received signal. The filter basically takes out the effects of any other filtering or processing which has happened to the transmit signal in the receiver signal chain. This would be, for example, the filtering effects provided by the anti-aliasing filter in the receiver.

A universal music production system and related software is provided that enables an open source microprocessor and its operating system to provide ergonomic and user friendly control of editing audio processing configurations of one or more systems, instruments or synthesizers in a music studio edit mode environment and then utilize the studio edit mode song/performance configurations in a live mode performance environment that disables the user from certain studio edit mode functions. When in edit mode, the universal music production system may check for illogical sound and effect plug-in order in a user created signal/sound stream and automatically stop its creation or warn the user of the illogical order. User created virtual controls can be displayed on a touch sensitive display screen enabling a user to control predetermined sound parameters easily during a live performance. Also, reconfiguration of any or all of the sound signal chains for various sound tracks can be accomplished substantially instantaneously via VST instrument and effect plug-ins.

A method and apparatus for a high frequency resistance measurement instrument with a reasonable dynamic range, which militates against saturation in the presence of one or more large undesirable signals, the high frequency measurement instrument capable of employing multiple alternating currents of differing frequencies to maintain measurement capability despite signal chain saturation in the presence of a large undesirable signal.

The present invention constitutes a method, processes, and apparatus for measurement and analysis of variables of different type and origin. In particular, the invention presents a method and apparatus for real-time signal conditioning and analysis in the presense of impulsive, or sparse interferences. The present invention overcomes limitations of the prior art by providing a novel method for identifying and discriminating between, in real time, the conditions of the signal with and without impulsive disturbances. This method can be implemented without substantial changes in the signal processing chain of a communication or data acquisition system.

The present invention also overcomes the shortcomings of the prior art through the introduction of the novel SPART filters, which can replace the corresponding analog linear filters in the signal chain of a device. SPART filters have the ability to sense and discriminate between, in real time, the conditions of the signal with and without impulsive disturbances, and temporarily adjust their behavior in a manner which reduces the power of these disturbances.

A capacitive sensing circuit is disclosed, wherein the transimpedance amplifier in front of the mixer in prior art is removed respectively replaced by an amplifier with low gain and consequently high dynamic range. The mixer DC offset voltage or current together with the large amplification factor required after the mixer now would result in an inacceptable DC offset at the output of the signal chain. In order to eliminate the effect of the mixer offset, the amplifying stages after the mixer are AC coupled to the mixer output and one of the signals entering the mixer is phase modulated or amplitude modulated with a known low frequency signal. An additional mixer after the AC coupled amplifying stages is driven with the same low frequency modulating signal, resulting in the wanted DC output signal responsive to the capacitance to be measured.

The invention provides an X-band dual-polarization Doppler weather radar system which comprises two parts which are an outer machine and an inner machine. The outer machine part comprises an antenna server subsystem, a transmission subsystem, a receiving subsystem, a monitoring calibration subsystem, and a power distribution system. The inner machine part comprises a signal processor and a user subsystem. According to the system, an original signal chain design is employed, the amount of equipment is reduced, and the reliability of the system is improved. A mode of multi-channel signal processing is employed, the simultaneous measurement of all parameters of a dual-wire Doppler weather radar is realized, and the timeliness of detection data is improved. The GPU-based signal processing technology is employed, and the dual-wire signal processing ability is improved. The unique dual-channel full path transceiver calibration technology is employed, the dual-channel transceiver system error of the radar system is reduced, and the improvement of detection data quality is effectively ensured.

The invention discloses a power unit and a control method of single fiber annular communication, which belongs to an electric power electronic power unit and a driving control method of the electric power electronic power unit. The power unit of the invention comprises an input end fiber and an output end fiber and further comprises an optical-to-electric transducer, a decoder, a signal selector switch, an optical-to-electric transducer, a power circuit and an encoder. The driving control method of the invention adopts single fiber serial communication and an annular signal chain circuit, signals which are sent by a main controller return to the main controller after winding a loop of the annular chain circuit and form closed-loop transmission. The method simplifies the transmission circuit of driving signals, enables the complex design of the signal transmission of a system control circuit and a power circuit to be simple and feasible, reduces the costs and improves the reliability of the system.

Rapid connection of multiple motor drive modules for safety operation may be made using screw terminals for initial connections to a safety controller and pre-wired cables for daisy chaining subsequent motor drives responsive to the same safety signals. Adaptor modules may be used to provide for a variety of different connector configurations depending on the location of the motor drive within the signal chain.

An integrated digital calibration circuit and digital to analog converter includes a digital to analog converter (DAC) and a digital calibration circuit including a memory for storing predetermined end point coefficients of the digital to analog converter transfer function; and an arithmetic logic unit for applying the end point coefficients to the DAC input signal to adjust the end points of the DAC and/or analog signal chain.

The invention relates to system and method for carriable affair of communication signal. The system is based on communication network composed by some telephone switch nodes with signaling chain circuit connect to seventh signaling network, and comprises some signaling message processing device and an integrated management center of user number and attribution; wherein, signaling message processing device is used to analyze and deal with real-time signaling message for controlling calling succeeded, executes operation of decoding and changing to user number; integrated management center of user number and attribution is used to register and manage mapping relation between logic number of portable user and route number and user affair attribution. The invention breaks technique limit of existing intelligence network and other systems, avoids improvement and upgrade of running switching device and signaling device, ensures communication serving quality, with low cost, independent to existing communication network, realizes number carriable affair both in and out network quickly, steadily and efficiently, and also fit to development and advance of communication network..

An integrated digital calibration circuit and digital to analog converter includes a digital to analog converter (DAC) and a digital calibration circuit including a memory for storing predetermined end point coefficients of the digital to analog converter transfer function; and an arithmetic logic unit for applying the end point coefficients to the DAC input signal to adjust the end points of the DAC and/or analog signal chain.

The invention belongs to the technical field of electronic circuits, and in particular relates to an ultra-high-voltage level shifting circuit for an IGBT (Insulated Gate Bipolar Translator) driving chip. The ultra-high-voltage level shifting circuit disclosed by the invention comprises a pulse circuit generation module, a pulse signal shaping module, an ultra-high-voltage level shifting module and an RS trigger, wherein the pulse signal shaping module and the ultra-high-voltage level shifting module are each composed of two sub-modules same in structure; each sub-module forms a circuit; one control chain is used for generating a pulse signal chain for turning on a high-side IGBT; and the other control chain is used for generating a pulse signal chain for turning off the high-side IGBT. The ultra-high-voltage level shifting circuit disclosed by the invention has the benefits that: the turn-on speed of a NLDMOS (N-channel Laterally Diffused Metal Oxide Semiconductor) is reduced while the level shifting power consumption is reduced; dV/dt and di/dt of the NLDMOS are reduced; and the reliability of the NLDMOS is increased.

A capacitive sensing circuit is disclosed, wherein the mixer is directly connected to the sense electrode. The AC transimpedance amplifier in front of the mixer in prior art is removed and replaced by a differential DC transimpedance amplifier respectively integrator. The mixer DC offset voltage or current together with the large amplification factor required after the mixer now would result in an inacceptable DC offset at the output of the signal chain. In order to eliminate the effect of the mixer offset, the amplifying stages after the mixer are AC coupled to the mixer output and one of the signals entering the mixer is phase modulated or amplitude modulated with a known low frequency signal. An additional mixer after the AC coupled amplifying stages is driven with the same low frequency modulating signal, resulting in the wanted DC output signal responsive to the capacitance to be measured.

An CMOS active pixel sensor (APS) imaging system include circuitry to compensate for different analog offset levels from the CMOS pixel array. More specifically, the compensation is performed in the analog (charge) domain. A digital correction value, which may be measured as part of the operation or testing of the CMOS APS system, is provided to a offset correction block circuit, to generate an analog electrical signal. The analog electrical signal is supplied to a sample-and-hold circuit including a charge amplifier. The signal read from the pixel array, after conditioning through an analog signal chain, is also supplied to the charge amplifier, which has a linear transfer function and outputs the compensated signal.

The invention discloses an analog signal link circuit for a high-frame frequency reading-out integrated circuit system for collecting and processing weak signals of a short wave infrared detector and belongs to the technical field of integrated circuit design. The analog signal link circuit is characterized in that a reading-out circuit adopts an analog signal link structure. The analog signal link circuit has the concrete scheme that a current source loaded CTIA (capacitance trans-impedance amplifier) structure input stage in a cascade structure is adopted in a unit structure, a CDS (correlated double sampling) module and a charge amplifying module are arranged in a row public structure, and a public output stage adopts a complementary output stage. The CDS structure is integrated in the analog signal link, the serious low-frequency noise of a reading-out circuit of the infrared detector is filtered out, and the technical support is provided for the short wave infrared detector in applications of high resolution ratio and the like.