286 results about "Signal chain" patented technology

Designs and operational methods to increase the dynamic range of image sensors and APS devices in particular by achieving more than one integration times for each pixel thereof. An APS system with more than one column-parallel signal chains for readout are described for maintaining a high frame rate in readout. Each active pixel is sampled for multiple times during a single frame readout, thus resulting in multiple integration times. The operation methods can also be used to obtain multiple integration times for each pixel with an APS design having a single column-parallel signal chain for readout. Furthermore, analog-to-digital conversion of high speed and high resolution can be implemented.

To activate an interactive multimedia station (BN) providing facilities of a mobile office to a user of a mobile radio terminal (TM), the mobile terminal (TM) signals its presence in the vicinity of the station (BN), either by local radio link to the station itself, or by short messages to a management server (SB) when the terminal is a radiotelephone. An identifier of the terminal is transmitted from the station (BN) to the management server, or to a location recorder of the radiotelephony network (RR) to activate the station after validating the identifier.

A method and system to calibrate a motor circuit protection device is disclosed. An example method calibrates a signal chain of a circuit breaker. The signal chain includes a current transformer, a burden resistor, a stored energy circuit and a controller. The circuit breaker includes a memory coupled to the controller. A calibration instruction routine is written in a first location of the memory. A test current is injected in the circuit breaker signal chain. The test current peak of the test current in the circuit breaker signal chain is measured. Data indicative of the test current peak is stored in a second location of the memory. The test current peak data is read from the second location of the memory. The test current peak data is compared with nominal current data related to the signal chain remotely from the circuit breaker. A calibration factor is determined based on the comparison.

A universal music production system and related software is provided that enables an open source microprocessor and its operating system to provide ergonomic and user friendly control of editing audio processing configurations of one or more systems, instruments or synthesizers in a music studio edit mode environment and then utilize the studio edit mode song / performance configurations in a live mode performance environment that disables the user from certain studio edit mode functions. Ergonomic user functionality for creating ivory keyboard splits is provided. Also a song configuration sustain feature allows sounds generated in a previous song to be held over or sustained while a next song configuration is established and the user begins playing the next song. User created virtual controls can be displayed on a touch sensitive display screen enabling a user to control predetermined sound or performance parameters easily during a live performance. Also, reconfiguration of any or all of the sound signal chains for various sound tracks can be accomplished substantially instantaneously via set list loading of VST instrument and effect plug-ins.

The transponder comprises an antenna and a receiver circuit (2) for receiving RF signals, this receiver circuit is implemented with a control mechanism to activate it at least periodically in a listening mode. This receiver circuit is comprises a decoding circuit (4), formed at least by a demodulator (8) and a decoder (10), and a wake-up circuit (14B) to analyze received RF signals in the listening mode and arranged for controlling the activation of the decoding circuit in this listening mode. The wake-up circuit comprises a frequency discriminator (17) and a digital modulation or preamble detector (18) downstream from a field clock generator (28). The wake-up circuit receives as entry an alternating signal branched from the signal chain through the receiver circuit upstream from the demodulator and it activates the decoding circuit only when a modulation or a preamble is detected in a received RF signal by the digital modulation or preamble detector.

Disclosed is a hybrid antenna array (100) comprising a plurality of digital branches (145), each digital branch including an analogue beamforming sub-array (e.g. 110-1), each sub- array having a plurality of antenna elements (120), a phase shifter (130) adapted to apply a phase shift to the signal from each antenna element, and a combiner (e.g. 135-1) adapted to combine the phase-shifted signals. Each digital branch also includes a signal chain (e.g.140-1) adapted to convert the output of the sub-array to baseband. The hybrid antenna array also comprises a digital processing module (150), including: an angle of arrival estimation sub-module (155) adapted to estimate an angle of arrival of a signal at the antenna elements; a phase control sub-module (170) adapted to control the phase shift applied by each phase shifter depending on the estimated angle of arrival; and a digital beamformer (165) adapted to combine the baseband signals from the digital branches using a weight vector to form an output signal (180).

Control systems and methods are disclosed for controlling operation of movable systems in an automated process with a stationary system having a first control system component and at least one movable system having a second control system component, in which optical or other non-contacting signaling between the stationary and movable systems is used to ascertain whether a movable system is proximate the stationary system, and wireless communications is used to transfer control data between the systems while the non-contacting signal link is maintained.

Designs and operational methods to increase the dynamic range of image sensors and APS devices in particular by achieving more than one integration times for each pixel thereof. An APS system with more than one column-parallel signal chains for readout are described for maintaining a high frame rate in readout. Each active pixel is sampled for multiple times during a single frame readout, thus resulting in multiple integration times. The operation methods can also be used to obtain multiple integration times for each pixel with an APS design having a single column-parallel signal chain for readout. Furthermore, analog-to-digital conversion of high speed and high resolution can be implemented.

An imager including a self test mode. The imager includes a pixel array for providing multiple pixel output signals via multiple columns; and a test switch for (a) receiving a test signal from a test generator and (b) disconnecting a pixel output signal from a column of the pixel array. The test switch provides the test signal to the column of the pixel array. The test signal includes a test voltage that replaces the pixel output signal. The test signal is digitized by an analog-to digital converter (ADC) and provided to a processor. The processor compares the digitized test signal to an expected pixel output signal. The processor also interpolates the output signal from a corresponding pixel using adjacent pixels, when the test switch disconnects the pixel output signal from the column of the pixel array.

The present invention addresses the problem of a second (or higher) order representation of a transmit signal which is transmitted by a transceiver being mixed into the region of the frequency spectrum of interest to the transceiver receiver, such that it can not then be spectrally filtered out. At its most straightforward, in one embodiment of the invention this is achieved by providing a cross-talk cancellation unit which takes the transmit signal, and obtains the second (or higher) order representation thereof. This representation is then subtracted from the received signal before the signal is passed to the radio control receiver signal processing elements. However, in a more preferred arrangement a filter is also provided, to filter the second or higher order version of the transmit signal, prior to its being subtracted from the received signal. The filter basically takes out the effects of any other filtering or processing which has happened to the transmit signal in the receiver signal chain. This would be, for example, the filtering effects provided by the anti-aliasing filter in the receiver.

A universal music production system and related software is provided that enables an open source microprocessor and its operating system to provide ergonomic and user friendly control of editing audio processing configurations of one or more systems, instruments or synthesizers in a music studio edit mode environment and then utilize the studio edit mode song / performance configurations in a live mode performance environment that disables the user from certain studio edit mode functions. When in edit mode, the universal music production system may check for illogical sound and effect plug-in order in a user created signal / sound stream and automatically stop its creation or warn the user of the illogical order. User created virtual controls can be displayed on a touch sensitive display screen enabling a user to control predetermined sound parameters easily during a live performance. Also, reconfiguration of any or all of the sound signal chains for various sound tracks can be accomplished substantially instantaneously via VST instrument and effect plug-ins.

A method and apparatus for a high frequency resistance measurement instrument with a reasonable dynamic range, which militates against saturation in the presence of one or more large undesirable signals, the high frequency measurement instrument capable of employing multiple alternating currents of differing frequencies to maintain measurement capability despite signal chain saturation in the presence of a large undesirable signal.

The present invention constitutes a method, processes, and apparatus for measurement and analysis of variables of different type and origin. In particular, the invention presents a method and apparatus for real-time signal conditioning and analysis in the presense of impulsive, or sparse interferences. The present invention overcomes limitations of the prior art by providing a novel method for identifying and discriminating between, in real time, the conditions of the signal with and without impulsive disturbances. This method can be implemented without substantial changes in the signal processing chain of a communication or data acquisition system.The present invention also overcomes the shortcomings of the prior art through the introduction of the novel SPART filters, which can replace the corresponding analog linear filters in the signal chain of a device. SPART filters have the ability to sense and discriminate between, in real time, the conditions of the signal with and without impulsive disturbances, and temporarily adjust their behavior in a manner which reduces the power of these disturbances.

A capacitive sensing circuit is disclosed, wherein the transimpedance amplifier in front of the mixer in prior art is removed respectively replaced by an amplifier with low gain and consequently high dynamic range. The mixer DC offset voltage or current together with the large amplification factor required after the mixer now would result in an inacceptable DC offset at the output of the signal chain. In order to eliminate the effect of the mixer offset, the amplifying stages after the mixer are AC coupled to the mixer output and one of the signals entering the mixer is phase modulated or amplitude modulated with a known low frequency signal. An additional mixer after the AC coupled amplifying stages is driven with the same low frequency modulating signal, resulting in the wanted DC output signal responsive to the capacitance to be measured.

The invention provides an X-band dual-polarization Doppler weather radar system which comprises two parts which are an outer machine and an inner machine. The outer machine part comprises an antenna server subsystem, a transmission subsystem, a receiving subsystem, a monitoring calibration subsystem, and a power distribution system. The inner machine part comprises a signal processor and a user subsystem. According to the system, an original signal chain design is employed, the amount of equipment is reduced, and the reliability of the system is improved. A mode of multi-channel signal processing is employed, the simultaneous measurement of all parameters of a dual-wire Doppler weather radar is realized, and the timeliness of detection data is improved. The GPU-based signal processing technology is employed, and the dual-wire signal processing ability is improved. The unique dual-channel full path transceiver calibration technology is employed, the dual-channel transceiver system error of the radar system is reduced, and the improvement of detection data quality is effectively ensured.

The invention discloses a power unit and a control method of single fiber annular communication, which belongs to an electric power electronic power unit and a driving control method of the electric power electronic power unit. The power unit of the invention comprises an input end fiber and an output end fiber and further comprises an optical-to-electric transducer, a decoder, a signal selector switch, an optical-to-electric transducer, a power circuit and an encoder. The driving control method of the invention adopts single fiber serial communication and an annular signal chain circuit, signals which are sent by a main controller return to the main controller after winding a loop of the annular chain circuit and form closed-loop transmission. The method simplifies the transmission circuit of driving signals, enables the complex design of the signal transmission of a system control circuit and a power circuit to be simple and feasible, reduces the costs and improves the reliability of the system.

Traffic service signaling data in signaling chain of stored-program control exchange in each telecom dept. are corrected through signaling correction unit in real time. Signaling correction unit through network port transfers corrected data to signaling corrector. The signaling corrector stores traffic service signaling data onto storage. Signaling decoder in call ticket generation module decodes signaling data in the signaling corrector; and based on signaling data flow, call data record (CDR) is generated. According to time period, CDR is converted to file CDR so as to generate original call ticket data. File transferring server in the call ticket generation module saves signaling data (original call ticket data) decoded by signaling decoder in a designated directory for computer to down load. Further, voice service analysis module and assistant balance module can be added to the system in order to carry out voice service analysis and settling accounts.

Rapid connection of multiple motor drive modules for safety operation may be made using screw terminals for initial connections to a safety controller and pre-wired cables for daisy chaining subsequent motor drives responsive to the same safety signals. Adaptor modules may be used to provide for a variety of different connector configurations depending on the location of the motor drive within the signal chain.

An integrated digital calibration circuit and digital to analog converter includes a digital to analog converter (DAC) and a digital calibration circuit including a memory for storing predetermined end point coefficients of the digital to analog converter transfer function; and an arithmetic logic unit for applying the end point coefficients to the DAC input signal to adjust the end points of the DAC and / or analog signal chain.

The invention relates to system and method for carriable affair of communication signal. The system is based on communication network composed by some telephone switch nodes with signaling chain circuit connect to seventh signaling network, and comprises some signaling message processing device and an integrated management center of user number and attribution; wherein, signaling message processing device is used to analyze and deal with real-time signaling message for controlling calling succeeded, executes operation of decoding and changing to user number; integrated management center of user number and attribution is used to register and manage mapping relation between logic number of portable user and route number and user affair attribution. The invention breaks technique limit of existing intelligence network and other systems, avoids improvement and upgrade of running switching device and signaling device, ensures communication serving quality, with low cost, independent to existing communication network, realizes number carriable affair both in and out network quickly, steadily and efficiently, and also fit to development and advance of communication network..

An integrated digital calibration circuit and digital to analog converter includes a digital to analog converter (DAC) and a digital calibration circuit including a memory for storing predetermined end point coefficients of the digital to analog converter transfer function; and an arithmetic logic unit for applying the end point coefficients to the DAC input signal to adjust the end points of the DAC and / or analog signal chain.

The invention belongs to the technical field of electronic circuits, and in particular relates to an ultra-high-voltage level shifting circuit for an IGBT (Insulated Gate Bipolar Translator) driving chip. The ultra-high-voltage level shifting circuit disclosed by the invention comprises a pulse circuit generation module, a pulse signal shaping module, an ultra-high-voltage level shifting module and an RS trigger, wherein the pulse signal shaping module and the ultra-high-voltage level shifting module are each composed of two sub-modules same in structure; each sub-module forms a circuit; one control chain is used for generating a pulse signal chain for turning on a high-side IGBT; and the other control chain is used for generating a pulse signal chain for turning off the high-side IGBT. The ultra-high-voltage level shifting circuit disclosed by the invention has the benefits that: the turn-on speed of a NLDMOS (N-channel Laterally Diffused Metal Oxide Semiconductor) is reduced while the level shifting power consumption is reduced; dV / dt and di / dt of the NLDMOS are reduced; and the reliability of the NLDMOS is increased.

A wideband signal processing receiver system including an interface for connecting to an analogue to digital converter (ADC) of a broader signal chain lineup, wherein the interface receives digital data from the ADC, and a field programmable gate array (FPGA) and associated configuration for converting the digital data into two digital signal paths. The two digital signal paths include a frequency domain path and an optionally decimated time domain path. A memory and / or high speed bus stores or transfers high speed bus / link data from the frequency domain path and the time domain path.

The invention provides a digital television single frequency network radio frequency adapter and a broadband network system thereof. The adapter comprises a programmable module, and a broadband radio-frequency signal FM is subjected to down-conversion filtering to acquire a broadband intermediate frequency signal IF1. IF1 is switched in an intermediate frequency gain control module to acquire a broadband intermediate frequency signal IF2 with constant signal power. A / D conversion is performed to acquire a digital signal DATA1, which is switched in the programmable module to form DATA2=DATA1+delta t according to set time delay. The IF2 is subjected to D / A conversion to become a broadband intermediate frequency signal IF3 having accordant frequency domain with the IF2 and delayed time domain, and then the IF3 is subjected to up-conversion filtering to acquire a delayed broadband radio-frequency signal. The broadband network system is provided with the single frequency network radio frequency adapter. A multipath audio / video program source is processed by a front-end information source processing module, a channel processing module and a small signal broadband synthesizer into a small signal broadband radio-frequency signal FM. A signal chain transmits to each node, the single frequency network radio frequency adapter of each node adjusts the signal time delay and each broadband transmitter amplifies and transmits the signal FM, so the stability and covering effect of the system are improved and the cost is lowered.

A claimed utility box design that can be connected to a mobile phone with V.92 data modem function and a landline house telephone which is unsupported by local telephone service provider. The utility box houses a claimed circuit design to control signal currents for both in-coming and out-going phone calls, and a claimed controller program to utilize the data modem function of a mobile phone for making out-going phone call for voice communication. With this utility box, a mobile phone user can answer and make phone call on a connected house landline telephone set that is not supported by the traditional landline phone company service.

Cognitive radios by dynamically detecting available channels and changing their transmission or reception parameters allow increased concurrent wireless communications within a given spectrum band. It would be beneficial for such cognitive radios to exploit orthogonal frequency division multiplexing (OFDM) and accordingly establishing a spectrum monitoring technique suitable for OFDM-based cognitive radios an essential element for this. The inventors have established a technique allowing for the detection of the reappearance of the primary user within a reception period within an OFDM-based cognitive radio network and beneficially does so quickly without requiring received bit decoding and allows for different signal chain impairments to be considered. Further, the technique is applicable to address other important OFDM challenges for cognitive radios such as power leakage as well as extending the embodiments of the invention to multiple antenna systems.

A capacitive sensing circuit is disclosed, wherein the mixer is directly connected to the sense electrode. The AC transimpedance amplifier in front of the mixer in prior art is removed and replaced by a differential DC transimpedance amplifier respectively integrator. The mixer DC offset voltage or current together with the large amplification factor required after the mixer now would result in an inacceptable DC offset at the output of the signal chain. In order to eliminate the effect of the mixer offset, the amplifying stages after the mixer are AC coupled to the mixer output and one of the signals entering the mixer is phase modulated or amplitude modulated with a known low frequency signal. An additional mixer after the AC coupled amplifying stages is driven with the same low frequency modulating signal, resulting in the wanted DC output signal responsive to the capacitance to be measured.

An CMOS active pixel sensor (APS) imaging system include circuitry to compensate for different analog offset levels from the CMOS pixel array. More specifically, the compensation is performed in the analog (charge) domain. A digital correction value, which may be measured as part of the operation or testing of the CMOS APS system, is provided to a offset correction block circuit, to generate an analog electrical signal. The analog electrical signal is supplied to a sample-and-hold circuit including a charge amplifier. The signal read from the pixel array, after conditioning through an analog signal chain, is also supplied to the charge amplifier, which has a linear transfer function and outputs the compensated signal.

The invention provides methods and apparatus for improving the direct current (DC) offset performance of an oversampling analog-to-digital (A / D) converter, including A / D converters that include an oversampling quantizer such as a single or multi-bit Δ-Σ modulator, successive approximation quantizer, flash quantizer, pipelined quantizer or other suitable oversampling quantizer. A customized buffer / amplifier may be inserted between an analog chopper and a signal processing chain. The customized buffer / amplifier is optimized for input noise and the signal chain compensates for poor DC performance. The result is a buffered analog-to-digital converter with both low input noise and very good DC accuracy.