254 results about "Signal chain" patented technology

The invention relates to the technical field of anti-electromagnetic interference, in particular to an anti-electromagnetic interference method for a flywheel energy storage system of a data center, which comprises the following steps: acquiring change rate data of the rotating speed and the angular speed of a flywheel, judging the attribution of a disturbance interval, recording change characteristics, extracting an interference identifier, comparing the interference identifier with impedance change, and generating a switching node. Frequency response and reflection coefficient characteristics of the filtering unit are detected, a coupling channel generation label is identified, and output fluctuation is evaluated to generate an anti-interference capability state label. According to the method, the surface resistivity of the shielding layer is dynamically switched according to the comparison result of the specific interference triggering identification bit and the signal link impedance change state in each disturbance stage through classification judgment and correlation marking of inertial disturbance, so that the effect of suppressing electromagnetic interference in real time is optimized; the influence degree of electromagnetic interference can be dynamically evaluated in the system operation process, and the adaptability of the energy storage system to the electromagnetic interference is judged and adjusted in real time.

The invention relates to the technical field of direct-current power supply fault diagnosis, in particular to a fault self-diagnosis modular direct-current power supply system, which is characterized in that a failure mechanism dynamic modeling unit constructs a multi-stress coupling degradation mapping library, adopts a degradation mechanism decoupling algorithm to separate and superpose failure effects and generates a dynamic degradation model; the early degradation capture unit deploys a high-frequency wide-domain sampling circuit and a noise suppression signal chain, combines time-frequency domain joint feature extraction and separates degradation feature signals from background noise, and the self-adaptive life prediction unit adopts a long short-term memory network and random forest fusion algorithm to dynamically correct parameters and output residual life probability distribution. The intelligent fault judgment unit realizes progressive diagnosis through a hierarchical threshold decision mechanism, and the health management cooperative execution unit triggers a pre-maintenance strategy, executes power flexible derating, redundancy switching or directional fusing isolation, and improves the reliability of the system.

The invention provides a method and a system for evaluating the health degree of audio and video conference equipment, which comprehensively utilize a QFD thought and AHP and AI methods to construct an equipment fault model and a fault risk transfer model, solve the field problem of fault influence dependency analysis among an equipment principle, a real-time operation state and a historical operation state in equipment fault detection, and improve the reliability of the equipment fault detection. The evaluation method comprises the following steps: scanning a basic state in real time and detecting an environment in real time; verifying the integrity of the signal link; carrying out equipment performance standard test; the influence of the hardware loss on functionality is evaluated; performing actual use state testing, including limiting condition testing and fault injection testing; and performing health degree modeling and grading, and establishing a multi-dimensional comprehensive evaluation model. According to the method, a traditional regular maintenance mode is exceeded through multi-dimensional dynamic modeling and a predictive intervention mechanism, real-time environment sensing and hardware loss modeling are fused, a fault window can be pre-judged, the equipment operation fault rate is reduced, and preventive maintenance is achieved.

The invention is suitable for the technical field of semiconductor testing, and provides a data acquisition method and device based on a DDIC chip, and testing equipment, and the data acquisition method comprises the steps: receiving a test pattern, controlling the DDIC chip to output a corresponding gray scale voltage signal, and achieving the comprehensive testing of the response capability of the chip in a full gray scale range; secondly, a target acquisition link composed of functional units including impedance conversion, single-ended to differential conversion, programmable gain amplification, filtering, analog-to-digital conversion and the like is utilized, so that the signal driving capability and the anti-interference capability are effectively improved, meanwhile, high-frequency noise and nonlinear distortion are reduced, and the basic quality of sampled data is guaranteed; on the basis, sampling optimization processing is carried out on the sampling data based on the FPGA unit, and the data stability is improved. According to the scheme, through high-precision transmission of the signal link, the data acquisition precision of the DDIC chip is improved, and then the technical requirements of high-precision DDIC chip testing are met.

An integrated circuit (IC), comprising: a first gain stage configured to apply a first gain to a first signal to generate a first amplified signal; a first converter configured to convert the first signal to a first output signal; a first output pin for outputting the first output signal; gain update circuitry configured to: output a first internal gain control signal to the first gain stage to update the first gain of the first gain stage, subsequently output a first external gain control signal to a second output pin of the IC, wherein output of the first external gain control signal is delayed relative to output of the first internal gain control signal by a first predetermined delay, the first predetermined delay to compensate for signal chain delay between the first gain stage and the first output pin.

The invention relates to an unmanned aerial vehicle communication system based on an ad hoc network, in particular to an intelligent monitoring and automatic response method for unmanned aerial vehicle signal link faults. According to the system, efficient communication between the unmanned aerial vehicles is achieved through the ad hoc network technology, the communication link quality of the unmanned aerial vehicles can be monitored in real time, parameters such as signal strength, the signal-to-noise ratio and the bit error rate can be monitored, and the fault condition of a signal link can be automatically diagnosed. When a communication link is detected to be abnormal (such as antenna loosening or signal strength reduction), the system can intelligently judge and automatically switch channels, close damaged channels, prevent overload or damage of a power amplifier, and ensure the stability of the communication system.

The technology described herein is directed towards a design and implementation of a subarray of unit cells for an active reconfigurable intelligent surface that is power efficient. The reconfigurable intelligent surface design integrates a power amplifier with subarrays of unit cells to amplify the reflected signal, resulting in an active reconfigurable intelligent surface with relatively low power consumption. For example, rather than equipping each unit cell with its own power amplifier, a power amplifier is shared by a m×n (e.g., 3×3) subarray of unit cells, which can be arranged as a module of a larger reconfigurable intelligent surface. Further, the design provides a device for receiving and reflecting the electromagnetic signal in the same polarization by coupling the RF energy, processing, amplifying, and then introducing a delay module to not create unwanted harmonics and amplifying the signal without breaking the signal link.

Described herein are techniques that improve efficiency of analog-to-digital conversion circuits by reducing idling time, during which the ADC circuit is not converting an analog signal to a digital representation, which reduces associated power consumption from keeping the ADC circuit running during idling time. In some embodiments, chop circuits may be used in combination with a plurality of track-and-hold circuits to acquire one polarity of an input signal and convert another polarity of the input signal during a same sampling period. A chop circuit may be configured to alternate between generating a first polarity of the input signal and a second polarity of the input signal. A first T / H circuit may be configured to acquire one polarity of the input signal from the chop circuit while a second T / H circuit provides another polarity of the input signal, previously acquired from the chop circuit, to an ADC for conversion.

The invention provides a battery capacity detection circuit and detection method. One end of a first signal link of the battery capacity detection circuit is used for being connected with a battery to be detected, and the other end is connected with a first control unit; one end of the second signal link is connected to the first signal link, and the other end is grounded; a divider resistor is arranged on the second signal link; the second control unit is configured to disconnect the second signal link before detecting the capacity of the battery to be detected; under the condition that the capacity of the battery to be detected is detected, conducting a second signal link; the first control unit is used for acquiring a first voltage signal when the second signal link is disconnected and acquiring a second voltage signal when the second signal link is connected; the first control unit is also used for obtaining the capacity of the to-be-detected battery based on the first voltage signal and the second voltage signal; the capacity of the to-be-detected battery is calculated through the first signal and the second signal, and compared with detection of a single voltage value, the detection accuracy is higher.

The invention discloses a Beidou space-time signal frequency conversion compatible time service method, and belongs to the technical field of satellite navigation and time service, and the method comprises the steps: obtaining a Beidou space-time signal, monitoring the comprehensive electromagnetic characteristics of the Beidou space-time signal in a current environment, and generating a real-time environment fingerprint; matching the real-time environment fingerprint with an environment strategy knowledge base to obtain a current time service strategy; according to the current time service strategy, dynamically adjusting the receiving frequency and processing parameters of the Beidou space-time signal, and reconstructing a time service signal chain to obtain a reconstructed Beidou time service signal; and reconstructing the Beidou time service signal to establish a unified space-time grid, projecting the pre-received GPS signals of the plurality of GPS systems to the unified space-time grid for alignment correction, and generating a fusion time service result. Signal chain dynamic reconstruction combining environment perception and strategy matching is adopted, and multi-system fusion based on a unified space-time grid is adopted, so that the precision and robustness of time service in a complex electromagnetic environment can be improved.

The invention belongs to the technical field of automatic monitoring of welding equipment, and discloses a welding machine counting and welding omission prevention monitoring system, which comprises a data acquisition module for performing multi-channel parallel acquisition on welding operation state data based on a time slice polling mechanism in a welding process, the collected welding operation state data are embedded into the parameter hash signature stream to form a tamper-proof real-time signal chain; the abnormal state judgment module is used for mapping the real-time signal chain into a state transition hypergraph, analyzing time sequence phase deviation between state nodes based on a time window sliding resonance detection algorithm, identifying a welding skipping related abnormal state and marking an abnormal topological position; the welding spot counting correction module is used for correcting the current welding spot counting value in real time when an abnormal topological position is detected, introducing a cost benefit balance factor between different nodes and outputting a corrected credible welding spot counting value; intelligent monitoring of welding and missing welding prevention are achieved, and operation safety and production efficiency are improved.

The invention discloses a fault repairing method of a server single board and electronic equipment, and relates to the field of server hardware reliability, and the method comprises the steps: scanning a plurality of target signal links of the server single board through a time domain reflectometer, correspondingly comparing the new impedance value and the new reflection waveform characteristic in the scanning result with the initial impedance value and the initial reflection waveform characteristic, determining at least one fault link of the server single board when the comparison result is inconsistent, and performing multi-modal analysis by combining the operation state data of the server single board. And determining the fault level of at least one fault link in the server single board and correspondingly generating a fault repair strategy to switch the fault link to the standby link, thereby solving the problems of single detection dimension, complex fault monitoring blind area, high-frequency signal monitoring failure and the like in the related technology, and improving the detection accuracy. Through time domain reflectometer monitoring, multi-modal data fusion analysis and redundancy switching, fault prediction, accurate positioning and lossless self-repairing of a server single board target signal link are realized.

The invention relates to the technical field of optical communication, in particular to a front optical fiber amplifier with a power balancing function. On the basis of a traditional Er-doped optical fiber amplifier, incident light is divided into a signal link and a competition link through a light splitting device with a fixed proportion. The purpose of introducing the competitive link is to generate a competitive wavelength which has an obvious competitive effect with the signal light in the EDF, and gain competition is carried out in the amplification process of the signal light in the EDF; wherein the competitive link finishes conversion from signal light wavelength to wavelength with obvious competitive effect by adopting a four-wave mixing principle based on HNLF, and then reversely inputs the converted competitive light into the EDF of the signal link to carry out a light amplification process with gain competition, so that the aim of reducing the output power fluctuation range after the signal light is amplified by the EDF is fulfilled.

The invention discloses a power supply self-adaptive active temperature compensation attenuator which comprises a radio frequency attenuation circuit, a positive voltage temperature compensation driving circuit and a power supply self-adaptive adjusting circuit. The radio frequency attenuation circuit is connected in series in a signal link and comprises a transistor and a resistor; the positive voltage temperature compensation driving circuit comprises a transistor, a diode and a resistor. The driving transistor outputs a voltage playing a temperature compensation role by utilizing the temperature change of the electrical characteristic of the diode, and outputs the voltage to the radio frequency attenuation circuit in a voltage division manner; the power supply self-adaptive adjusting circuit comprises a resistor and a diode, the resistor and the diode adjust the grid voltage of a transistor in the driving circuit when the power supply fluctuates, the output voltage of the whole driving circuit is adjusted, and the influence of power supply fluctuation on the driving circuit is counteracted. Positive voltage is used for working, the structure is novel, the chip size is small, the temperature compensation characteristic is good, and the application range is wide; and the power supply interference resistance is good.

The invention provides a method for determining a radio frequency link resource optimization model of a heterogeneous network and related equipment. The method comprises the following steps of: performing uniform mathematical modeling representation on signal coexistence, interference, blockage, loss and time division multiplexing link budget processes of parallel signal links in a multi-band, multi-mode and multi-system reconfigurable radio frequency front end; based on the mathematical modeling representation, dynamically configuring a regulation and control system through a topological connection mode of a time division multiplexing reconfigurable radio frequency front-end resource pool and a signal chain parameter; and optimizing dynamic topology planning and link parameters of the time division multiplexing reconfigurable radio frequency front-end resource pool by using a multi-agent deep reinforcement learning method.

Provided is a direct radiating array (“DRA”) antenna for transmitting or receiving an electromagnetic radio frequency (“RF”) signal of at least one predetermined signal frequency band. The DRA antenna comprising a plurality of radiating elements defining a radiating surface of the DRA antenna, a plurality of RF signal chain paths, each of the plurality of RF signal chain paths coupled to a respective one of the plurality of radiating elements and configured to amplify an RF signal either received by or to be transmitted by the respective one of the radiating elements, and a beamforming network board having a plurality of electrical ports for electrically connecting to the plurality of RF signal chain paths.

The invention relates to the technical field of visible light communication, and discloses an intelligent lamp data transmission system based on visible light communication. The system comprises an optical signal processing module, a transmission management module and a terminal control module. The optical signal processing module collects and processes the visible light signal and outputs a light intensity space coding signal; after the transmission management module receives the signal, the signal is decoded by the signal analysis unit to obtain an original data stream signal and a channel interference characteristic signal, the channel optimization unit processes the original data stream signal and the channel interference characteristic signal to obtain an optimal modulation parameter signal, and the transmission strategy unit outputs a dynamic bandwidth allocation signal; in the terminal control module, an adaptive modulation execution unit adjusts the driving parameters of the light emitter according to the optimal modulation parameter signal, a lamp array control unit adjusts the working state of a lamp light-emitting unit and collects a real-time link state signal, and a link monitoring module outputs a communication quality index. The system is suitable for an intelligent illumination and data transmission fusion scene.

The invention discloses a vibration suppression circuit applied to a wheel speed sensor and a suppression method of the vibration suppression circuit, the vibration suppression circuit comprises a Hall disc HallR, a Hall disc HallC, a Hall disc HallL, a first signal link, a second signal link, a digital processor DSP and a current signal output module IOUT, differential electric signals output by the Hall disc HallR and the Hall disc HallC are input to the input end of the first signal link, and differential electric signals output by the Hall disc HallL are input to the output end of the second signal link; differential electric signals output by the Hall disc Hall L and the Hall disc Hall C are input to the input end of the second signal link, the output end of the first signal link and the output end of the second signal link are connected with the first input end and the second input end of the digital processor DSP respectively, and the first output end of the digital processor DSP is connected with the current signal output module IOUT. According to the invention, the vibration suppression function of the wheel speed sensor is improved, and the vibration suppression difficulty of the DSP is reduced.

The invention discloses a low-power-consumption electromagnetic water meter system with dynamic excitation and self-calibration functions, which comprises a sensor layer, a metering board, a main control board and a communication board, and is characterized in that the sensor layer comprises an excitation coil, an electrode pair, a temperature sensor and a pressure sensor; the metering board comprises an excitation driving circuit, a signal conditioning circuit, a high-precision ADC and a register block, the main control board comprises an embedded processor, an RTC clock, a data storage module and a display screen, and the embedded processor is used for receiving signals and processing and executing tasks according to a pre-written program; the RTC clock is used for providing an accurate and continuous time reference for the embedded processor; the communication board comprises an NB-IoT / 485 / PWM multimode communication interface, when water flow passes through the measuring pipe, the electrode pair generates an induced voltage signal, after the induced voltage signal is converted by the signal conditioning circuit and the high-precision ADC, the main control board optimizes excitation parameters in real time by combining environmental parameters and a cloud platform strategy, and meanwhile, triple calibration is periodically executed to ensure the precision of a signal chain.

Various techniques are described for correcting distortion in an analog input signal after digitization in a receiver signal chain. The techniques include a system that stores concatenated distortion correction terms, allowing for efficient data handling and processing. The techniques further include a system that has a smaller number of replica memories compared to primary memories, which store operational data. The replica memories are updated with new data and may be swapped with primary memories to update them without interrupting system operations. The techniques further include a dither system that uses two memories to store and process the dithered signals, which are then combined to produce a noise-corrected digital output. The techniques further include a system to correct distortions in analog input signals processed through multiple parallel paths.

The invention discloses a high-integration-level miniaturized TMR magnetic field sensor and a use method thereof, relates to the technical field of electrical equipment measurement, and solves the problems that most existing TMR sensors in the prior art are discrete devices, the system integration level is low, and the noise immunity and the stability are not high in an electric power environment with high-frequency signals and strong electromagnetic interference. The TMR magneto-sensitive unit, the signal conditioning circuit and the analog / digital interface are highly integrated in the same package, and the size of the sensor is remarkably reduced while high sensitivity and broadband response are kept. Besides, by optimizing the magnetoelectric structure design and the signal chain topology, background noise and bias drift are reduced, the measurement precision is improved, and the method is particularly suitable for high-density layout, complex electromagnetic environments and high-bandwidth measurement scenes. According to the invention, a better current measurement solution is provided for novel power systems such as a smart power grid, a modular power electronic device and a distributed energy system.

Various techniques are described for correcting distortion in an analog input signal after digitization in a receiver signal chain. The techniques include a system that stores concatenated distortion correction terms, allowing for efficient data handling and processing. The techniques further include a system that has a smaller number of replica memories compared to primary memories, which store operational data. The replica memories are updated with new data and may be swapped with primary memories to update them without interrupting system operations. The techniques further include a dither system that uses two memories to store and process the dithered signals, which are then combined to produce a noise-corrected digital output. The techniques further include a system to correct distortions in analog input signals processed through multiple parallel paths.

The present invention discloses a waveform synchronization method and device. After the system is turned on, a dot frequency signal with the same frequency and synchronization with a low-frequency reference clock is first generated. After passing through a signal link, it is fed back in the form of a clock to perform digital phase identification with the low-speed reference clock. By adjusting the signal link delay, the feedback clock and the reference clock phase are aligned, thereby achieving the certainty of the signal link delay. By adopting this idea similar to a phase-locked loop, the problems of uncertain delay and asynchrony between channels between the DAC and FPGA interface can be solved without using an ADC to collect feedback waveforms and perform complex correction calculations, significantly reducing the hardware complexity and cost of the system, and the digital phase identification speed and calibration speed are fast. In addition, the accuracy of the delay calibration mainly depends on the setup and hold time of the D flip-flop, which can achieve very high accuracy. The present invention also discloses a synchronous waveform generating device.

The invention discloses a method for improving decoding robustness of an MIPI A-PHY (Mobile Industry Processor Interface A-Physical Layer) cable, and belongs to the field of high-speed serial buses. The method comprises the following steps: in a process of establishing a signal link between a local end and an opposite end, periodically sending a 01 sequence with a fixed length and a fixed format by a sending end, and recording the 01 sequence as a first sequence; and in the stage of establishing the double-end signal link, the receiving end continuously detects the received code stream, and when the receiving end continuously detects that the number of times of the first sequence reaches a preset threshold value thresholdA, the double-end signal link work is completed. Compared with a cable link algorithm which does not limit adjacent detection intervals, the algorithm provided by the invention has the advantages that the cable link judgment standard is improved, the occurrence of misrecognition caused by poor signal quality is effectively avoided, a foundation is laid for subsequent decoding operation, the credibility of real data after decoding is improved, the realizability on a hardware circuit is high, and the method is suitable for popularization and application. The method has high configurability, and improves the degree of adaptation to different link detection environments.

This invention provides a satellite-launch separation signal system and a satellite-launch separation system, comprising: a first user unit that outputs two satellite-launch separation signal sources, each leading to two different contacts of a first analog separation relay; these signals then return to the first user unit via a first separation connector and a second separation connector; the input and output terminals of the first analog separation relay are each connected to a satellite display socket via cables; and a second user unit that outputs two satellite-launch separation signal sources, each leading to two different contacts of a second analog separation relay; these signals then return to the second user unit via a first separation connector and a second separation connector; the input and output terminals of the second analog separation relay are each connected to a satellite display socket via cables. This invention ensures that the signal is provided by the analog satellite-launch separation relay during ground testing, and avoids fatal malfunctions such as accidental separation commands issued before launch or mis-separation due to severe vibrations during the active phase, thus improving the reliability of the satellite-launch separation signal link.

The invention belongs to the technical field of intelligent health monitoring and wearable equipment, and particularly relates to an intelligent wearable terminal health data real-time synchronous monitoring system which comprises a multi-mode interface dynamic sensing subsystem, a self-adaptive light path compensation subsystem, a physical layer compensation coprocessor, a main application processor and a wireless transmission module. The method is characterized in that the dynamic state of an interface is sensed in real time through an MEMS pressure array, an IMU and a ToF displacement unit, the contact state is fused and estimated through an EKF algorithm, an MEMS micro-reflector is driven to implement closed-loop optical compensation, and an incident light path is stabilized; and meanwhile, the compensation metadata and the PPG signal are packaged into a fusion data frame, and the fusion data frame is synchronously transmitted to a remote platform in real time. Through high-frequency closed-loop control of the MEMS micro-reflector, the system can eliminate noise before the noise is injected into a signal link, so that the purity and fidelity of an original PPG signal are fundamentally ensured, and the heart rate monitoring precision under strong interference scenes such as strenuous exercise and the like is greatly improved.

The invention relates to the field of vehicle control, in particular to a vehicle window control method and device, equipment and a medium. Existing signals of the safety airbag controller and the emergency call module are integrated to serve as a triggering basis, new signals do not need to be additionally developed for linkage of multiple controllers, and starting judgment of emergency disposal is directly achieved through an original signal link of the vehicle. According to the method, a collision explosion indication signal and an emergency calling activation signal are taken as core triggering conditions, and detection logic of emergency disposal conditions is combined, so that the signal interaction requirement among multiple controllers is simplified, the cost of hardware adaptation, protocol debugging and the like caused by signal development is reduced, the emergency response reliability is guaranteed, and meanwhile, the system reliability is improved. Extra signal development cost investment is avoided, and the problem that cost is increased due to the fact that signals need to be developed additionally in multi-controller linkage in the prior art is effectively solved.

The application provides a serial multi-chip communication device applied to a signal chain chip and a corresponding method. It relates to the technical field of chip serial communication and solves the problems of line design complexity and increased hardware resource occupation in the prior art. The device comprises: a chip select differential negative end of a master controller and a chip select input end of a first-level chip are interconnected; a second-level chip forms a chip select series connection structure; a slave chip select output end of the first-level chip and a chip select input end of a first second-level chip of the chip select series connection structure are interconnected; a serial differential positive end, a clock signal output end and a feedback signal input end of the master controller are respectively interconnected with a slave input end, a clock signal input end and a slave output end of the first-level chip and each second-level chip. The application can reduce resource consumption, realize access to different slave chips and is easy to adjust and expand.

This invention relates to the field of visible light communication technology and discloses a smart lighting data transmission system based on visible light communication. The system includes an optical signal processing module, a transmission management module, and a terminal control module. The optical signal processing module acquires and processes visible light signals, outputting a spatially encoded light intensity signal. The transmission management module receives this signal, decodes it through a signal analysis unit to obtain the original data stream signal and channel interference characteristic signal, processes it through a channel optimization unit to obtain the optimal modulation parameter signal, and outputs a dynamic bandwidth allocation signal through a transmission strategy unit. In the terminal control module, an adaptive modulation execution unit adjusts the light transmitter drive parameters according to the optimal modulation parameter signal, a lighting array control unit adjusts the working state of the lighting units and collects real-time link status signals, and a link monitoring module outputs a communication quality index. This system is suitable for scenarios integrating smart lighting and data transmission.

Integrated circuit devices and circuitry for digital filtering are provided. An integrated circuit device may include a first digital signal processing (DSP) block with first hardened arithmetic circuitry and an output register to store an output of the first DSP block and a second DSP block with second hardened arithmetic circuitry and an input register to receive the output of the first DSP block. An input signal chain may include a first set of registers to provide first input data signals to the first DSP block, a second set of registers to provide second input data signals to the second DSP block, and a third set of registers connected between the first set of registers and the second set of registers to provide delay equal to that of the output register of the first DSP block and the input register of the second DSP block.