102results about "Active element network" patented technology

The invention discloses an active power synthesis network of a micro-strip and waveguide hybrid architecture. The active power synthesis network comprises a micro-strip power division network, a micro-strip power amplification circuit, a waveguide power combiner and a power-on / power-off sequence control circuit. The power synthesis network is designed by adopting a micro-strip and waveguide hybrid architecture, so that the overall size can be greatly reduced on the premise of ensuring the power capacity of the power synthesis network; the power-on / power-off sequence control circuit based on the Zener diode is designed, the power amplification chip can be effectively protected and prevented from being damaged due to the wrong power-on / power-off sequence, meanwhile, the number of power needing to be supplied to the power amplification chip at the same time is reduced, and the use complexity of the power synthesis module is reduced.

The invention relates to a full duplex digital isolator. A circuit is provided. The circuit comprises: a first transmitter circuit having a first input terminal arranged to receive first input data and a first node arranged to transmit first intermediate data corresponding to the first input data; a first receiver circuit including a second node arranged to receive the first intermediate data and a first output terminal arranged to generate first output data corresponding to the first input data; comprising a second input terminal and said second node, the second input terminal arranged to receive second input data, the second node further arranged to transmit second intermediate data corresponding to the second input data; and a second receiver circuit comprising a first node and a second output terminal, the first node being further arranged to receive the second intermediate data, and the second output terminal being arranged to generate second output data corresponding to the second input data.

A programmable impedance element includes a plurality of nominally identical two-port elements, each two-port element having an impedance element and two switches. The two-port elements are arranged in a chain with a structured switch group such that a certain range of impedances can be obtained from each unit by dynamically changing the connections between the impedance elements in the unit. A common unit is constructed by connecting the nominally identical two-port impedance elements in such a way that the number of possible combinations of impedance elements is reduced to a subset of all possible combinations using the minimum possible number of connections. This structure allows the use of industry-standard devices to generate matching impedances. The connections between the impedance elements are switches, which can be "field programmable", i.e., they can be set on the chip after manufacturing and configured during the operation of the circuit or can be mask programmable.

The present disclosure relates to a capacitance multiplier for decoupling capacitors. An integrated circuit can include one or more circuits coupled to a capacitance multiplier circuit. The capacitance multiplier circuit can include a capacitor, fixed and tunable resistors, and a transconductance circuit. The tunable resistor can be adjusted to control the total capacitance of the capacitance multiplier circuit. The transconductance circuit can include a transistor having a drain terminal coupled to a first electrical component and a source terminal coupled to a second electrical component. The first electrical component can be a diode-connected transistor, a direct shorted wire, a resistor, an inductor, or a current source. The second electrical component can be a current source, a direct shorted wire, a resistor, an inductor, or another diode-connected device. Configured in this way, the capacitance multiplier circuit can provide a large adjustable capacitance without voltage drop and without consuming a large amount of power.

A radio-frequency module includes a first switch, a first filter, second filters, a power amplifier, and a low-noise amplifier. The first switch has a first terminal, a second terminal, and a third terminal. The first terminal is coupled to an antenna terminal. The first filter is coupled to the second terminal. The second filters are coupled to the third terminal. The first filter includes a common filter circuit and an additional filter circuit. The additional filter circuit is coupled between the power amplifier and the common filter circuit. The low-noise amplifier is coupled to a path that branches off from a path connecting between the common filter circuit and the additional filter circuit. The common filter circuit is coupled between the additional filter circuit and the first switch.

Aspects of this disclosure relate to a parallel hybrid acoustic passive filter. The parallel hybrid acoustic passive filter includes a first sub-filter and a second sub-filter. The first sub-filter includes a first acoustic resonator and a first non-acoustic passive component. The second sub-filter includes a second acoustic resonator and second first non-acoustic passive component. The first sub-filter and the second sub-filter are together arranged to filter a radio frequency signal. The parallel hybrid acoustic filter can be a band pass filter or a band stop filter, for example. Related multiplexers, wireless communication devices, and methods are disclosed.

To improve the heat dissipation properties of a filter.SOLUTION: A duplexer 100 includes a substrate 10, a receiving filter 40 provided on the substrate 10 and including series resonators S21 to S23 and parallel resonators P21, P22, a transmitting filter 30 provided on the substrate 10 alongside the receiving filter 40 and including series resonators S11 to S14 and parallel resonators P11 to P14, a lid provided on the substrate 10 and sandwiching a gap 18, where the receiving filter 40 and the transmitting filter 30 are located, between the substrate 10 and the lid, columnar bodies 80b provided in a region 42 of the receiving filter 40 between the substrate 10 and the lid within the gap 18, and columnar bodies 80a provided in a region 32 of the transmitting filter 30 between the substrate 10 and the lid within the gap 18, the number of columnar bodies being greater than the number of columnar bodies 80b.SELECTED DRAWING: Figure 1

The error amplifier circuit of the present invention includes: a plurality of error amplifiers that respectively obtain outputs of errors regarding two input signals; and a multiplexer that selects or deselects the outputs of the plurality of error amplifiers and outputs the output of the selected error amplifier as a control signal for a controlled circuit. In the multiplexer, for one of the plurality of error amplifiers whose output is not selected, a delay element provided on the input path of the one error amplifier is short-circuited to expand the frequency band of the error amplifier.

Aspects of this disclosure relate to hybrid acoustic LC filter with harmonic suppression. The hybrid acoustic LC filter includes a hybrid passive / acoustic and a non-acoustic LC filter cascaded with the hybrid passive / acoustic filter. The hybrid passive / acoustic filter can be configured to filter a radio frequency signal. The hybrid passive / acoustic filter can include acoustic resonators and a non-acoustic passive component. The non-acoustic LC filter can be configured to suppress a harmonic of the radio frequency signal. The non-acoustic LC filter can be a low pass filter or a harmonic notch filter, for example. Related multiplexers, wireless communication devices, and methods are disclosed.

Aspects of this disclosure relate to a multiplexer with a hybrid acoustic passive filter. The multiplexer includes a plurality of filters configured to filter respective radio frequency signals, a shared filter coupled between each of the plurality of filters and a common node, and a radio frequency filter coupled to the common node. At least a first filter of the plurality of filters includes acoustic resonators and a non-acoustic passive component. Related multiplexers, wireless communication devices, and methods are disclosed.

The utility model relates to the technical field of radio frequency microwave communication, and discloses a radio frequency microwave power synthesis device, which comprises an external power supply, an EMC (Electro Magnetic Compatibility) protection module and a power supply management module, the power management module is electrically connected with a signal preprocessing module, a power amplification module, an input coupling and detection module, a frequency selection switch matrix module, a reconfigurable filter network module, a dynamic power adjustment module, a phase matching module, a power synthesis module, an output coupling and detection module and an intelligent control module. According to the utility model, through cooperation of the dynamic power adjustment module, the phase matching module, the power amplification module and the power synthesis module, the power synthesis efficiency of the radio frequency microwave power synthesis device is improved, the power consumption is reduced, and the signal distortion is reduced; and high-efficiency power synthesis in a wide frequency band is realized.

The invention provides a switching circuit, an attenuation circuit, a receiver, a base station and a mobile device. The switching circuit includes: a first node for coupling to a first conductive path; and a second node for coupling to a second conductive path. Further, the switching circuit includes a first stack and a second stack of transistors arranged between the first node and the second node. The first transistor in the first stack and the first transistor in the second stack are cross-coupled with the second transistor in the second stack and the second transistor in the first stack, respectively. The first transistors in the first stack and the second stack are coupled to a first node. The third transistor in the first stack and the third transistor in the second stack are cross-coupled with the fourth transistor in the second stack and the fourth transistor in the first stack, respectively. The fourth transistors in the first stack and the second stack are coupled to a second node.

Provided is a semiconductor device. In a first operation mode, a first modulated signal is input to a plurality of inverter circuits provided in a first amplifier circuit, and a second modulated signal is input to a plurality of inverter circuits provided in a second amplifier circuit. In a second operation mode, a test signal generation circuit modulates a test signal to generate a third modulated signal and a fourth modulated signal. The third modulated signal is input to some of the plurality of inverter circuits provided in the first amplifier circuit, and outputs of other inverter circuits have high impedances. The fourth modulated signal is input to some of the plurality of inverter circuits provided in the second amplifier circuit, and outputs of other inverter circuits have high impedances. A peak frequency detection circuit detects a frequency range including a frequency of the test signal at which an impedance of a sound reproduction device peaks.

A coupling module can be used to communicate high speed signals between an optical transceiver and a processing module of an optical communication device, such as an optical line termination (OLT) or an optical network unit (ONU). The coupling module can adjust the common mode voltage level of a differential signal output by the optical transceiver to the common mode voltage level required by the processing module. In addition, the coupling module splits each of the differential output signals from the optical transceiver and passes the split signals to both a high-pass filter and a low-pass filter that are connected in parallel. The outputs of the high-pass filter and the low-pass filter from different paths of the differential signal are cross-coupled and combined to provide a differential signal to the processing module.

The invention relates to a local oscillator power division circuit applied to large-scale MIMO independent local oscillator configuration, which comprises a reference low-frequency local oscillator source, a plurality of phase-locked loop modules, a power distribution module, a plurality of IQ mixers and a radio frequency processing module, the output end of the reference low-frequency local oscillator source is respectively connected with the plurality of phase-locked loop modules, the output end of each phase-locked loop module is connected with the power distribution module, the input end of each IQ frequency mixer is respectively connected with the output end of the power distribution module, and the input end of each IQ frequency mixer also receives an independent IQ signal; and the output end of the reference low-frequency local oscillator source is also connected with the power distribution module. By adopting the local oscillator power division circuit applied to the large-scale MIMO independent local oscillator configuration, a plurality of local oscillator signals which are independent, small in stray and adjustable in frequency and power can be obtained, a plurality of local oscillators can be independently provided for each receiving and transmitting channel of an MIMO system, and a receiving and transmitting channel is more flexible and adapts to a more complex environment.

The utility model relates to a circuit structure for direct single-point superposition output of multi-stack signal frequency. The circuit structure comprises a signal input end, a signal coupling module, an input filtering module, a register filtering module, an operational amplifier circuit module, an output bias resistor, a first ground resistor and a signal output end, the signal input end is connected with the input end of the signal coupling module, the output end of the signal coupling module is connected with the input end of the input filtering module, the output end of the input filtering module is connected with the input end of the register filtering module, and the output end of the register filtering module is connected with the input end of the operational amplifier circuit module. The output end of the operational amplifier circuit module is connected with the first end of the output bias resistor and the input end of the register filter module, the second end of the output bias resistor is connected with the input end of the operational amplifier circuit module, the first end of the first resistor to ground is connected with the input end of the operational amplifier circuit module, and the second end of the first resistor to ground is grounded. The signal output end is connected with the second end of the output bias resistor.

A noise filtering circuit, a digital to analog converter and an electronic device are provided. The noise filtering circuit comprises a first amplifier configured to receive a bias voltage at a first input terminal, receive a bias output voltage at a second input terminal though a feedback path, and compensate for a difference between the bias voltage and the bias output voltage; a first transistor connected to an output of the first amplifier and having a gate to which an off-voltage is applied; a first capacitor connected to the first transistor; a second capacitor connected to the output of the first amplifier; a second transistor connected to the second capacitor and having a gate to which an off-voltage is applied, and a second amplifier having an input terminal connected to the first capacitor and a second input terminal connected to the second transistor.

The invention relates to a multiplexer circuit for a battery management system and a corresponding battery management system. A MUX for a battery management system includes first, second, and third input terminals for coupling to first, second, and third, respectively, of a stack. The first, second, and third switches have respective first, second, and third terminals coupled to first, second, and third input terminals, respectively, of the MUX. The AFE and selection circuit includes first, second and third input terminals coupled to second terminals of the first, second and third switches, respectively, first and third output terminals for coupling to positive inputs of the first and second level shifter circuits, and second and fourth output terminals for coupling to negative inputs of the first and second level shifter circuits, respectively. Each of the first, second, third, and fourth output terminals of the AFE and selection circuit is selectively coupleable to any of the first, second, and third input terminals of the AFE and selection circuit.

A circuit. The circuit includes a first transmitter circuit having a first input terminal arranged to receive a first input data and a first node arranged to transmit a first intermediate data corresponding to the first input data, a first receiver circuit including a second node arranged to receive the first intermediate data and a first output terminal arranged to produce a first output data corresponding to the first input data, a second transmitter circuit including a second input terminal arranged to receive a second input data and the second node that is further arranged to transmit a second intermediate data corresponding to the second input data; and a second receiver circuit including the first node and a second output terminal, the first node further arranged to receive the second intermediate data, and the second output terminal arranged to produce a second output data corresponding to the second input data.

The present application relates to the field of quantum chips, and discloses a parameter determination method and apparatus for a quantum chip, and a filtering regulation and control method and apparatus for a quantum chip, for use in solving the problem that a large amount of space of a quantum chip is occupied in order to meet a filtering function of the quantum chip having a large number of bits. Josephson junctions are provided on a coplanar waveguide of a filter. By adjusting the critical current of the Josephson junctions, the equivalent inductance corresponding to the filter is changed, thereby achieving the adjustment of the center frequency of the filter; and by screening for an initial length meeting a center frequency range and a bandwidth range and screening for an inductance set, the Josephson junctions can cover the frequencies required by all resonant cavities during adjustment, thereby achieving the coverage of all resonant cavity frequency bands through one filter. Since the center frequency of the filter is adjustable, the bandwidth of the filter can be designed to be narrower to improve a filtering effect, so that the frequency range for filtering is not compromised and the space required by a filtering circuit is also saved, and therefore, the filter can be integrated on a quantum chip having a large number of bits.

The present invention is provided with a filter circuit (104) having resistors (201a, 201b), MOS capacitors (202a, 202b), and an MOM capacitor (203) laminated on the resistors (201a, 201b) or / and the MOS capacitors (202a, 202b). Given the cutoff frequency of a filter circuit (104) is ft, the resistance area of a resistance formation region (600) in which resistors (201a, 201b) are formed is Mr, the MOS capacitance area of an MOS capacitance formation region (500) in which MOS capacitors (202a, 202b) are formed is Mc, the resistivity of the resistors (201a, 201b) is alpha, the MOS permittivity of the MOS capacitors (202a, 202b) is beta, and the MOM permittivity of the MOM capacitor (203) is gamma, # imgabs0 # is satisfied.

Disclosed is a calibration circuit, a calibration method for a filter and a filter device. The calibration circuit includes: a signal receiving terminal, receiving an output signal from the filter; a frequency detection module, obtaining a count value according to the output signal, the count value representing a frequency of the output signal; an adjustment module, adjusting the control signal according to the count value and a target value representing a target frequency, to adjust the frequency of the output signal provided by the filter until a calibration value, which allows the count value to be consistent with the target value, of the control signal is determined. The filter performs filtering according to the control signal with the calibration value in an operating stage. The calibration circuit performs feedback adjustment on the filter to achieve bandwidth calibration with high calibration accuracy and simple circuit structure.

Participant station (10; 30; 50; 60) for a bus system (1; 2), with a transmitting / receiving device (13) for transmitting a signal via the bus system (1; 2) to another subscriber station and for receiving a signal via the bus system (1; 2), in which at least temporarily exclusive, collision-free access of a subscriber station (10, 20, 30, 50, 60) to a bus line (40) of the bus system (1; 2) is ensured, and a modification device (12; 14) for modifying the transmission characteristics of a transmit path (131) of the transmit / receive device (13) and / or the receiving characteristics of a receive path (132) of the transmit / receive device (13), wherein the modification device (14) comprises a transmitter output stage (150) for pre-distortion of the signal to be transmitted by the transmit / receive device (13) in order to prevent the bus level from settling on a transmit channel within one clock cycle (T S) of the signal to be sent, and / or wherein the modification device (12) is a receiver modification device for changing the detection time (TD) to the right in the eye diagram and the decision threshold (E) upwards in the eye diagram, wherein the transmitter output stage (150) for pre-distortion of the signal to be transmitted by the transmit / receive device (13) is designed such that it adapts the transmitter characteristics of the subscriber station (50; 60) depending on the section of a frame of the bus system (2).

To provide a phase characteristics measuring instrument and the like that uses a voltmeter and a wave detector not requiring a high-speed trigger operation to avoid increase in the scale of an apparatus used for phase measurement, and thereby can achieve phase measurement at a relatively low price.SOLUTION: A phase characteristics measuring instrument comprises: a first wave detector 11 that receives and detects two patterns of three-tone signals, a first three-tone signal obtained by combining the three waves of angular frequencies ω1,ω2,ω3 (wherein ω2-ω1=ω3-ω2=Δω) and a second three-tone signal obtained by changing the phase of one tone of the first three-tone signal; a BPF 12 that allows only a beat component of an angular frequency difference Δω of adjacent waves of the three-tone signal from the signal output from the first wave detector to pass therethrough; a second wave detector 13 that detects power of the beat component that has passed through the BPF 12; a voltmeter 14 that measures the voltage of the signal output from the second wave detector; and a phase calculator 15 that calculates the phase on the basis of the measured voltage value.SELECTED DRAWING: Figure 2

The present invention discloses a programmable gain amplifier having mode-switching mechanism. An operational amplifier includes a first input terminal, a second input terminal and an output terminal. The second input terminal is coupled to a ground terminal. The output terminal generates an output signal. A variable resistor and a first switch are coupled in series between a first terminal and a second terminal that coupled to the first input terminal. A first variable capacitor and a second switch are coupled in series between the first terminal and the second terminal. A second variable capacitor and a third switch are coupled in series between the first terminal and the ground terminal. A low-pass resistor and a low-pass capacitor are coupled in parallel between the first input terminal and the output terminal. An input resistor is coupled between a signal input terminal and the first terminal to receive an input signal from the signal input terminal. The first, the second and the third switches receive a set of mode-switching signals to switch to form a path or an open-circuit.

Radio frequency front end modules are provided. In one aspect, a front end system includes at least one power amplifier configured to amplify a transmit radio frequency signal, at least one low noise amplifier configured to receive a receive radio frequency signal, an output node coupled to an antenna. The front end system further includes at least one switch configured to selectively couple the output node to the at least one power amplifier during a transmit period and to the at least one low noise amplifier during a receive period, at least one transmit filter coupled between the power amplifier and the at least one switch, and at least one receive filter coupled between the low noise amplifier and the at least one switch.

A resistor-capacitor (RC) sensor circuit of an electronic device drives a representative copy of a current driving an electronic circuit line of the electronic device to a drive voltage. The RC sensor circuit is to sample a voltage indicative of an RC time constant of the electronic circuit line. A first sample voltage is determined by sampling a first representative voltage generated at the RC sensor circuit by driving the RC sensor circuit with the representative copy of the current for a first period of time. A second sample voltage is determined by sampling a second representative voltage generated at the RC sensor circuit by driving the RC sensor circuit with the representative copy of the current for a second period of time. A ratio of the first sample voltage to the second sample voltage is indicative of the RC time constant of the electronic circuit line.

Antenna combiner (200), comprising: a housing (3); a plurality of input terminals (4) mounted on the housing (3), each of the plurality of input terminals (4) being adapted to receive an input signal; an output terminal (5) attached to the housing (3); and a signal combination circuit module (6) arranged in the housing (3) and comprising a plurality of input circuit units (61) each electrically connected to the plurality of input terminals (4), and a combination circuit unit (62) electrically connected between the plurality of input circuit units (61) and the output terminal (5), wherein each of the plurality of input circuit units (61) comprises an amplifier circuit (611) adapted to amplify the input signal received from the corresponding one of the plurality of input terminals (4) into a processed signal, and a circulator circuit (612) configured to transmit the processed signal to the combination circuit unit (62) and to isolate a returned signal from the combination circuit unit (62), wherein the combination circuit unit (62) is configured to combine the respective processed signals from the plurality of input circuit units (61) into an output signal and to output the output signal through the output terminal (5).

The present application discloses a filter with approximate multiplication capability and a method thereof. The filter with approximate multiplication capability includes at least one first multiplication approximation unit for approximating at least one first multiplication operation corresponding to at least one first coefficient using at least one first bitwise shift operation; and at least one second multiplication approximation unit for approximating at least one second multiplication operation corresponding to at least one second coefficient using multiple second bitwise shift operations and at least one addition operation. The present application can simplify arithmetic operations, reduce the demand for hardware resources and computing cycles, and reduce power consumption.

An error amplifier for a pulse width modulation circuit is described. The amplifier includes an operational amplifier configured as an integrator and a feedback loop coupled between a signal output of the operational amplifier and an inverting input of the operational amplifier. The feedback loop comprises a feedback capacitor coupled to the signal output, a feedback resistor coupled to the feedback capacitor, and an integrator resistor coupled to the feedback resistor and the inverting input of the operational amplifier. A junction between the feedback resistor and the integrator resistor is configured to receive an input signal and a junction between the feedback capacitor and the feedback resistor is configured to receive a feedback signal from the pulse width modulation circuit.