3376results about "RF amplifier" patented technology

Aspects of this disclosure relate to a bulk acoustic wave device that includes a multi-layer raised frame structure. The multi-layer raised frame structure includes a first raised frame layer positioned between a first electrode and a second electrode of the bulk acoustic wave device. The first raised frame layer has a lower acoustic impedance than the first electrode. The first raised frame layer and the second raised frame layer overlap in an active region of the bulk acoustic wave device. Related filters, multiplexers, packaged modules, wireless communication devices, and methods are disclosed.

Aspects of this disclosure relate to acoustic wave devices on stacked die. A first die can include first acoustic wave device configured to generate a boundary acoustic wave. A second die can include a second acoustic wave device configured to generate a second boundary acoustic wave, in which the second die is stacked with the first die. The first acoustic wave resonator can include a piezoelectric layer, an interdigital transducer electrode on the piezoelectric layer, and high acoustic velocity layers on opposing sides of the piezoelectric layer. The high acoustic velocity layers can each have an acoustic velocity that is greater than a velocity of the boundary acoustic wave.

The invention relates to the technical field of wireless communication, and provides a radio frequency low-noise amplifier which comprises an input matching module, a power amplification module, an output matching module, an RC attenuation module and an RC feedback module, the first end of the first inductor serves as the input end of the output matching module, the first end of the first inductor is connected with the output end of the power amplification module, the control end of the switch and the first end of the first adjustable resistor, and the second end of the first inductor is connected with the first end of the second inductor and the first end of the third capacitor. The output end of the switch is connected with the first end of the first capacitor and the first end of the second capacitor. The second end of the second capacitor is connected with the second end of the first adjustable resistor and the second end of the second inductor and used for being connected with a power supply. The second end of the first capacitor is connected with the second end of the third capacitor and serves as the output end of the output matching circuit. The radio frequency low-noise amplifier is adjustable in gain, low in noise and good in linearity performance.

The invention relates to the technical field of wireless communication, and provides a radio frequency power amplifier and a radio frequency chip, the radio frequency power amplifier comprises an input matching circuit, a first-stage amplifier, a first inter-stage matching circuit, a second-stage amplifier, a second inter-stage matching circuit, a third-stage amplifier and an output matching circuit which are electrically connected in sequence; the radio frequency power amplifier further comprises a control module, a direct current power supply module, a first bias circuit, a second bias circuit and a third bias circuit. The first biasing circuit comprises a power detection network and a switch control circuit; the first input end of the power detection network serves as the first input end of the first bias circuit, the second input end of the power detection network serves as the second input end of the first bias circuit, and the power detection network is used for receiving a radio frequency signal, converting the radio frequency signal into a control voltage in a detection mode and outputting the control voltage to the input end of the switch control circuit. The control switch controls connection or disconnection of the circuit. According to the invention, the robustness of power can be improved.

Apparatus and methods for reconfigurable power amplifiers are disclosed. In certain embodiments, a mobile device includes a transceiver configured to generate a first radio frequency signal of a first frequency band and a second radio frequency signal of a second frequency band, and a front-end system including a push-pull power amplifier configured to selectively amplify one of the first radio frequency signal or the second radio frequency signal based on a band control signal. The push-pull power amplifier includes an input balun, an output balun, and a pair of amplifiers coupled between the input balun and the output balun. The band control signal is operable to control an output capacitance of the pair of amplifiers.

A packaged RF transistor amplifier includes an RF transistor amplifier die having a first terminal, a first lead, an integrated passive device that includes a first series microstrip transmission line, a first bond wire coupled between the first terminal and the first series microstrip transmission line, and a second bond wire coupled between the first series microstrip transmission line and the first lead.

An RF transmitter (1) having a gate-segmented power output stage (2) and a digital driver (5). The gate-segmented power output stage (2) includes a field-effect transistor with a plurality of gate fingers (32) and drain fingers (31) that define a gate periphery. The field-effect transistor comprises a plurality of power output stage segments (3) that each correspond to a respective part of the gate periphery, and that each have a respective power output stage segment input (4). The digital driver (5) has control outputs (6) which are connected to corresponding ones of the respective power output stage segment inputs (4), and is configured for individually switching each of the power output stage segments (3) between an on mode and a cut-off mode in dependence of one or more input signals to obtain a modulated RF carrier signal at an output (7) of the gate-segmented power output stage (2).

The invention provides a broadband low-noise amplifier based on a three-coil coupling transformer. The broadband low-noise amplifier comprises an input matching network, a common-source differential output driving stage amplifier, an inter-stage matching network, a common-source differential output power stage amplifier and an output matching network which are connected in sequence, broadband matching is realized by using the input matching network and the inter-stage matching network, and the effective transconductance of the transistor is improved; through the cross-coupled capacitors, the LNA gain and stability on a broadband are improved, better isolation is realized, and input and output are decoupled; due to the design of the grounding capacitor, the linearity of the LNA is improved; through the combination of the three-coil coupling transformer and the differential topology, output signals are superposed in the same direction at the output end, and noise is cancelled in the reverse direction at the output end, so that the thermal noise is greatly inhibited, the isolation is improved through the output matching network, the insertion loss is reduced, and the output matching performance is optimized.

Method and device(s) for supporting performance of machine learning based CFR and DPD on multiple digital input signals relating to different frequency bands, respectively, in order to signal condition said signals before power amplification and subsequent transmission in said frequency bands by a wireless communication network. The device(s) obtain said multiple digital input signals as complex valued signals. The device(s) perform feature construction that takes said multiple digital input signals as input and provides constructed feature signals according to predefined constructed feature types as output. Said predefined constructed feature types relate to at least the following per complex valued sample of the obtained complex valued multiple digital input signals the real part of the sample, the imaginary part of the sample and at least one of the absolute value of the sample and the phase of the sample.

An adaptable, generalized digital predistortion system that can increase the accuracy of the distortion applied to a power amplifier input signal is disclosed. Further, the digital predistortion system can be implemented using a reduced circuit area by reducing a number of coefficients used by the models applied to generate the distortion compensation signal. Further, the system can implement an improved digital predistortion adaptation engine that can improve one or more of the following metrics of a complete radio frequency (RF) analog front-end radio signal chain: error vector magnitude (EVM), adjacent channel leakage ratio (ACLR), spectrum emission mask (SEM), and power consumption of the circuits and systems. An example of circuits and systems is a radio frequency power amplifier (PA).

A method of adjusting an impedance of a power amplifier of a radio frequency system for matching with an antenna switch die is disclosed. In one aspect, the method includes connecting the power amplifier to the antenna switch die via an impedance adjustment circuit, the impedance adjustment circuit including an input node, an output node, a plurality of electrical components arranged between the input node and the output node, and at least one switch configured to selectively electrically connect at least one of the electrical components to the input node and the output node. The method further includes determining an Error Vector Magnitude of the radio frequency system for each of a plurality of states of the at least one switch, and controlling the at least one switch to enter the state of the plurality of states that minimizes the Error Vector Magnitude of the radio frequency system.

The invention relates to a digital pre-distortion method and system based on a hierarchical iterative neural network, and belongs to the field of digital pre-distortion of power amplifiers. According to the method, the pre-distortion process is decoupled into two stages of off-line generalization training and on-line specialization optimization. In the offline stage, a mixed data set containing multiple modulation modes and bandwidths is adopted to train an offline neural network, and a basic model with high generalization ability is constructed; in the online stage, aiming at a signal with a specific modulation mode and bandwidth, a single configuration data set is utilized to train an online neural network, and the accurate compensation capability of the model on a real-time input signal is enhanced. In practical application, a baseband signal is firstly subjected to targeted preprocessing through the online neural network, then is subjected to deep optimization through the offline neural network, and finally is input into the power amplifier PA. According to the method, through a generalization-specialization double-layer structure, the dynamic response capability and compensation precision of a digital pre-distortion system to a complex signal environment are remarkably improved.

A calibration circuit includes a replica transconductance stage that is a replica of a transconductance amplifier in a serializer / deserializer (SerDes) interface and a replica transimpedance stage that is a replica of a transimpedance amplifier in the SerDes interface. The replica transimpedance stage has an input coupled to its output. A comparison circuit is configured to generate a difference signal representative of a difference between voltage levels of an input signal received at an input of the replica transconductance stage and an output signal representative of voltage level at the output of the replica transimpedance stage. Replica feedback resistors are configured to couple an output of the replica transimpedance stage to the input of the replica transconductance stage. The difference signal can be used to select resistance values provided by the replica feedback resistors and by corresponding gain control resistors in the transimpedance amplifier in the SerDes interface.

The present disclosure discloses a Doherty power amplifier, including: a quadrature coupler including a first coupled inductor and a second coupled inductor, the quadrature coupler being configured to split an input signal into a first signal and a second signal; a first amplifier circuit, configured to amplify the first signal; a second amplifier circuit, configured to amplify the second signal; and a load modulation network, which is an output voltage-combined Doherty load modulation network using a T equivalent model. An overlapping part of the coupled inductors is used to provide distributed parasitic capacitance, thereby eliminating the need to set an additional capacitor in the quadrature coupler, and therefore reducing an area. Through the T equivalent model, a quarter-wavelength transmission line is equated to the load modulation network of the embodiments of the present disclosure, multiple inductors are combined into transformers with small areas.

The invention relates to the technical field of wireless communication, and discloses a digital pre-distortion method for improving the linearity of a power amplifier in a phased array system, which comprises the following steps of: 1, acquiring a nonlinear parameter of the power amplifier under a dynamic load in real time, the nonlinear parameters comprise an input signal amplitude-phase characteristic, a temperature parameter and a quantum tunneling current parameter; 2, generating a pre-distortion compensation signal based on the nonlinear parameter, wherein the pre-distortion compensation signal comprises a quantum phase compensation item and a dynamic phase change compensation item; and step 3, superposing the pre-distortion compensation signal to an original input signal to generate a pre-distortion modulation signal. The linearity of the power amplifier is improved by introducing the quantum phase compensation item and the dynamic phase change compensation item, nonlinear parameters are accurately obtained in real time in a dynamic load environment, and the precision of pre-distortion compensation is improved.

Aspects of this disclosure relate to acoustic wave filters with bulk acoustic wave resonators. An acoustic wave filter can include a first bulk acoustic wave resonator configured to excite an overtone mode as a main mode and a second bulk acoustic wave resonator having a fundamental mode as a main mode.

An improved architecture for a radio frequency (RF) power amplifier, impedance matching network, and selector switch. One aspect of embodiments of the invention is splitting the functionality of a final stage impedance matching network (IMN) into two parts, comprising a base set of off-chip IMN components and an on-chip IMN tuning component. The on-chip IMN tuning component may be a digitally tunable capacitor (DTC). In one embodiment, an integrated circuit having a power amplifier, an on-chip IMN tuner, and a selector switch is configured to be coupled to an off-chip set of IMN components. In another embodiment, an integrated circuit having an on-chip IMN tuner and a selector switch is configured to be coupled through an off-chip set of IMN components to a separate integrated circuit having an RF power amplifier.

Amplification circuitry is disclosed that couples neutralization transistors to amplification transistors to neutralize parasitic capacitance of the amplification transistors. Gates of a first amplification transistor and a first neutralization transistor are coupled together, and gates of a second amplification transistor and a second neutralization transistor are also coupled together. Drains of the first amplification transistor and the second neutralization transistor are coupled together, and drains of the second amplification transistor and the first neutralization transistor are also coupled together. Sources of neutralization transistors are coupled together at a node, such that a voltage swing of a first signal in the first neutralization transistor may be canceled by a voltage swing of a second signal in the second neutralization transistor. The node also couples to a resistor that prevents charge building in the neutralization transistors.

The invention relates to the technical field of radio-frequency signal processing, and discloses a 5G radio-frequency signal amplification method and system, and the method comprises the steps: decomposing an obtained radio-frequency signal into a high-frequency sub-band and a low-frequency sub-band through a multilayer wavelet packet, judging whether the radio-frequency signal is sparse in a wavelet packet domain, and carrying out the sparse reconstruction of an LI norm minimization problem if the radio-frequency signal is sparse; obtaining feature data of each sub-band, extracting a nonlinear transfer function of each sub-band through a CNN-GRU network, and carrying out transfer learning pre-training and dynamic adaptation updating; on the basis of dynamic adaptation update ending, layered memory polynomial calculation and layered model joint output construction, layered model parameter optimization is converted into a least square problem to obtain an error compensation function, and resource allocation is dynamically adjusted according to the peak-to-average power ratio of an input signal; and based on power amplifier state data, holographic sensing is performed on nonlinear parameters of the device through a fusion model, and dynamic changes of the device are compensated through multi-stage calibration and calibration delay is controlled.

A power amplifier includes a 3-dB coupler which splits a first signal into a second signal and a third signal lagging behind the second signal by 90°, a carrier amplifier, a peak amplifier, and a hybrid coupler. The carrier amplifier amplifies the second signal and outputs a fourth signal when the first-signal power level is a first level or higher. The peak amplifier amplifies the third signal and outputs a fifth signal when the first-signal power level is a second level or higher, which is higher than the first level. The hybrid coupler includes a first transmission line receiving the fourth signal at its first terminal, and a second transmission line receiving the fifth signal at its first terminal and being open at its second terminal. The first transmission line outputs, from its second terminal, an amplified first signal obtained by combining the fourth and fifth signals.

Methods and devices to improve nonlinearity performance of low noise amplifiers (LNAs) are disclosed. The described methods and devices reduce the capacitive loading of the LNA amplifying devices on the bypass path of the LNAs when operating in the bypass mode. This is performed by decoupling the active devices from ground to put the amplifying devices in a floating state, thus minimizing the impact of the gate-source capacitances of the amplifying devices on the overall linear performance of the LNA operating in the bypass mode.

An impedance matching circuit includes a radiofrequency terminal and a series circuit connected to the radiofrequency terminal, wherein the series circuit comprises at least one reactance and at least one switching element having a drive input. A drive circuit is connected to the drive input and a coupler is connected to the drive circuit so as to an enable signal input. The impedance matching circuit enables short switching times and low losses in the at least one switching element.

A computer-implemented method performed by a device configured with a power feature aided machine learning, ML, model is provided that models a behavior of a DPD to reduce non-linear distortion of an output signal of a non-linear device. The method includes extracting a plurality of power features from an input signal destined to be input to the DPD. The method further includes labelling the extracted plurality of power features to obtain at least one labelled average power level; inputting the at least one labelled average power level to the input of the ML model to obtain an output signal from the ML model having characteristics to reduce the non-linear distortion of the output signal of the non-linear device; and providing the output signal from the ML model as an input to the non-linear device.

The invention relates to a folded cascode low noise amplifier. The disclosed low noise amplifiers (LNAs) include a common emitter amplifier (CE-A), a common gate amplifier (CG-A), and various passive devices located in CE-A and CG-A. The CE-A includes an NPN type bipolar junction transistor (BJT) having emitter and collector (E / C) regions, and a base region located between the E / C regions and connected to an input node. The CG-A includes a P-channel field effect transistor (PFET) having source and drain (S / D) regions, a channel region between the S / D regions, and a gate adjacent to the channel region. A drain region of the PFET is connected to the output node. Further, the common inductor, the collector region of the BJT, and the source region of the PFET are connected at an intermediate node. The LNA is implemented on a three-dimensional integrated circuit (3DIC) in which the BJT and the FET are located on different chips and the passive device is located in a back-end-of-line region between the BJT and the FET.

An even harmonic multiplier employing complementary current reuse is disclosed. The even harmonic multiplier employs supply voltage and current density scaling to reduce power consumption. Further, by using complimentary NMOS and PMOS transistors, the even harmonic multiplier achieves high areal efficiency. Current reuse causes a reduction in noise at the first harmonic, as the corresponding first harmonic currents from the NMOS and PMOS transistors are in opposite, i.e., canceling, directions. Complementary current reuse is now feasible, as the performance of PMOS transistors at current process nodes is similar to those of NMOS transistors, with appropriate sizing leading to approximately equivalent transconductances. Multiple even harmonic multiplier configurations are possible, with many using transformer circuits at the input and / or the output. The resultant even harmonic multipliers find ready application in millimeter wave radio frequency receivers. The most common even harmonic multiplier is a frequency doubler, which produces a strong second harmonic signal.

A frontend circuit includes a wide-band filter, a transmit filter, and switches. The wide-band filter passes both the receive frequency band of a first communication frequency band and that of a second communication frequency band which is close to or overlaps that of the first communication frequency band. The transmit filter passes the transmit frequency band of the first or second communication frequency band. The switches are capable of simultaneously bringing, into conduction, at least two of multiple filters including the wide-band filter and the transmit filter. In carrier aggregation using the receive frequency bands of the first and second communication frequency bands, the switches simultaneously bring the wide-band filter and the transmit filter into conduction. Thus, in carrier aggregation using signals of multiple communication frequencies simultaneously in communication, attenuation of signals due to signal leakage in two receive frequency bands, which are close to each other, is suppressed.

Apparatus and methods for reconfigurable power amplifiers are disclosed. In certain embodiments, a mobile device includes a transceiver configured to generate a first radio frequency signal of a first frequency band and a second radio frequency signal of a second frequency band, and a front-end system including a push-pull power amplifier configured to selectively amplify one of the first radio frequency signal or the second radio frequency signal based on a band control signal. The push-pull power amplifier includes an input balun, an output balun, and a pair of amplifiers coupled between the input balun and the output balun. The band control signal is operable to control an input capacitance of the pair of amplifiers.

Disclosed is a technology related to a low noise amplifier applied between an RF receiver and an RF switch. A phase difference matching circuit having the same phase difference as a positive gain amplifier is added to an output terminal of an attenuator of a low noise amplifier having a variable gain switching structure. In addition, a variable impedance circuit connected to an output terminal of the positive gain amplifier and an output terminal of a phase difference matching unit to finely adjust the phase difference of each output terminal may be further included.

According to one embodiment, a low noise amplifier (LNA) circuit includes a first stage which includes: a first transistor; a second transistor coupled to the first transistor; a first inductor coupled in between an input port and a gate of the first transistor; and a second inductor coupled to a source of the first transistor, where the first inductor and the second inductor resonates with a gate capacitance of the first transistor for a dual-resonance. The LNA circuit includes a second stage including a third transistor; a fourth transistor coupled between the third transistor and an output port; and a passive network coupled to a gate of the third transistor. The LNA circuit includes a capacitor coupled in between the first and the second stages, where the capacitor transforms an impedance of the passive network to an optimal load for the first amplifier stage.

A disclosed low noise amplifier (LNA) includes a common-emitter amplifier (CE-A), a common-gate amplifier (CG-A) and various passive devices in CE-A and CG-A. CE-A includes an NPN-type bipolar junction transistor (BJT) with emitter and collector (E / C) regions and a base region between the E / C regions and connected to an input node. CG-A includes P-channel field effect transistor (PFET) with source and drain (S / D) regions, a channel region between the S / D region, and a gate adjacent to the channel region. The drain region of the PFET is connected to an output node. Additionally, a common inductor, collector region of the BJT, and source region of the PFET are connected at an intermediate node. The LNA is implemented on a three-dimensional integrated circuit (3DIC) with the BJT and FET on different chips and with passive devices in back end of the line regions between the BJT and FET.