361results about "Positive-feedback-circuit arrangements" patented technology

A variable feedback impedance is presented capable of providing high linearity (e.g. as represented by 1P2 and 1P3) and high linear range (e.g. as represented by P1dB) when used in a feedback path of an RF amplifier in the presence of high voltage amplitudes.

Various envelope tracking amplifiers are presented that can be switched between an ET (envelope tracking) mode and a non-ET mode. Switches and / or tunable components are utilized in constructing the envelope tracking amplifiers that can be switched between the ET mode and the non-ET mode.

A RF-digital hybrid mode power amplifier system for achieving high efficiency and high linearity in wideband communication systems is disclosed. The present invention is based on the method of adaptive digital predistortion to linearize a power amplifier in the RF domain. The power amplifier characteristics such as variation of linearity and asymmetric distortion of the amplifier output signal are monitored by the narrowband feedback path and controlled by the adaptation algorithm in a digital module. Therefore, the present invention could compensate the nonlinearities as well as memory effects of the power amplifier systems and also improve performances, in terms of power added efficiency, adjacent channel leakage ratio and peak-to-average power ratio. The present disclosure enables a power amplifier system to be field reconfigurable and support multi-modulation schemes (modulation agnostic), multi-carriers and multi-channels. As a result, the digital hybrid mode power amplifier system is particularly suitable for wireless transmission systems, such as base-stations, repeaters, and indoor signal coverage systems, where baseband I-Q signal information is not readily available.

Optimization methods via various circuital arrangements for amplifier with variable supply power are presented. In one embodiment, a switch can be controlled to include or exclude a feedback network in a feedback path to the amplifier to adjust a response of the amplifier dependent on a region of operation of the amplifier arrangement (e.g. linear region or compression region).

An RF power amplifier system comprises an amplitude control loop and a phase control loop. The amplitude control loop adjusts the supply voltage to the power amplifier based upon the amplitude correction signal indicating the amplitude difference between the amplitude of the input signal and an attenuated amplitude of the output signal. The phase control loop adjusts the phase of the input signal based upon a phase error signal indicating a phase difference between phases of the input signal and the output signal. The phase control loop may comprise one or more variable phase delays introducing a relative phase delay to allow the phase differences between the input and output signals of the PA circuit to be within a range compatible with a phase comparator generating the phase error signal, and a low frequency blocking module that removes the larger extent, lower frequency components of the phase error signal.

A direct current (DC)-DC converter that includes a first switching converter and a multi-stage filter is disclosed. The multi-stage filter includes at least a first inductance (L) capacitance (C) filter and a second LC filter coupled in series between the first switching converter and a DC-DC converter output. The first LC filter has a first LC time constant and the second LC filter has a second LC time constant, which is less than the first LC time constant. The first switching converter and the multi-stage filter form a feedback loop, which is used to regulate the first switching power supply output signal based on the setpoint. The first LC filter includes a first capacitive element having a first self-resonant frequency, which is about equal to a first notch frequency of the multi-stage filter.

An automatic gain control (AGC) amplifier including a high gain transimpedance amplifier, a resistive feedback network and multiple transconductance stages coupled in the feedback path of the AGC amplifier. The feedback network receives an input signal and is coupled to the output of the high gain amplifier and has multiple intermediate nodes. Each transconductance stage has an input coupled to an intermediate node of the feedback network and an output coupled to the input of the high gain amplifier. Each transconductance stage is independently controllable to position a virtual ground within the feedback network to control closed loop gain. Each transconductance stage may have a bias current input coupled to a bias current control circuit. The control circuit controls each bias current to vary the gain of the AGC amplifier. The bias currents may be linearly controlled employing a ramp function to achieve a linear in dB gain response.

In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.

A power amplifier controller circuit controls a power amplifier based upon an amplitude correction signal indicating the amplitude difference between the amplitude of the input signal and an attenuated amplitude of the output signal. The power amplifier controller circuit comprises an amplitude control loop and a phase control loop. The amplitude control loop adjusts the supply voltage to the power amplifier based upon the amplitude correction signal. The amplitude loop may include a variable gain amplifier adjusting the amplitude of the input signal. The amplitude loop can include a compression control block which may be configured either to adjust the gain in the variable gain amplifier or the voltage from the power supply based upon the operating level of the other, in addition to being based upon the amplitude correction signal, thus providing a way of maintaining the depth beyond the PA's compression point and allowing a control of the efficiency of the RF power amplifier.

A method (500) and apparatus (300, 400, 601) facilitate closed loop transmit power control in a power control loop at and during a transition from one transmit power level to another transmit power level in a transmitter. The apparatus includes a reference path (326) configured to provide a reference signal (325) and a gain compensation signal (417), a detect path (327) configured to process, in accordance with the gain compensation signal, a detected signal corresponding to a power level to provide a gain compensated detected signal; and a power control path (328) configured to generate a power control value in accordance with the reference signal, the gain compensated detected signal, and a loop compensation factor associated with the gain compensation signal where the power control value is suitable for setting the power level for the transmission.

A switched capacitor CMOS amplifier uses a first stage non-inverting CMOS amplifier driving a second stage inverting CMOS amplifier. The first stage amplifier is provided with positive feedback to substantially increase the gain of the first stage amplifier. In the described examples, the positive feedback is provided either by connecting a capacitor from the output to the input of the first stage amplifier or by connecting a shunt transistor in parallel with an input transistor and driving the transistor from the output of the first stage amplifier. The substantially increased gain resulting from the positive feedback allows the gain of the switched capacitor amplifier to be set by the ratio of the capacitance of an input capacitor to the capacitance of a feedback capacitor. The amplifier also includes switching transistors for periodically discharging the input capacitor and the feedback capacitor.

Techniques for sequencing switched single capacitor for automatic equalization of batteries connected in series are described herein. In one embodiment, a battery equalizer includes a single capacitor, at least two switching circuits to be coupled to each of at least two batteries coupled in series. The battery equalizer further includes at least two driver circuits corresponding the at least two switching circuits and a controller. The controller is programmed to control the driver circuits in order to drive the switching circuits to sequentially couple the single capacitor to one of the batteries coupled in series during charging and / or discharging of the batteries. Only one of the switching circuits is turned on at a given time such that only one of the batteries is coupled to the single capacitor at the given time. Other methods and apparatuses are also described.

A transistor bias circuit is provided that is capable of operating from a power supply voltage that is slightly higher than twice the base-emitter voltage of the transistor to be biased. The bias circuit includes a transistor connected in a current-mirror configuration with the transistor to be biased. A feedback circuit maintains the mirrored current at a constant level. The gain of the feedback circuit is improved by the addition of a non-inverting amplifier within the feedback circuit. In a preferred embodiment, the biased transistor is concurrently in both a Darlington and the current mirror configuration. Moreover, a feedback transistor in the feedback circuit is also concurrently in the Darlington configuration, thus providing an efficient biasing arrangement for an amplifier block based on the Darlington arrangement.

An integrated circuit is described for providing a power supply to a radio frequency (RF) power amplifier (PA). The integrated circuit comprises a low-frequency power supply path comprising a switching regulator and a high-frequency power supply path arranged to regulate an output voltage of a combined power supply at an output port of the integrated circuit for coupling to a load. The combined power supply is provided by the low-frequency power supply path and high-frequency power supply path. The high-frequency power supply path comprises: an amplifier comprising a voltage feedback and arranged to drive a power supply signal on the high-frequency power supply path; and a high-frequency-path supply module arranged to provide a high frequency supply to drive the amplifier, where the high-frequency-path supply module comprises a pulse-width modulator operably coupled to the high frequency supply via a filter and arranged to provide a filtered pulse-width modulated signal to the high frequency supply.

An apparatus comprising a first amplifier circuit, a detect circuit, a control circuit and a second amplifier circuit. The first amplifier circuit may be configured to generate an amplified signal in response to an input signal. The detect circuit may be configured to generate a feed-forward signal in response to the amplified signal. The control circuit may be configured to generate a dynamic control signal in response to the feed-forward signal. The second amplifier circuit may be configured to generate an output signal in response to (i) the amplified signal and (ii) the dynamic control signal. The control circuit may be configured to control a gain of the second amplifier circuit by adjusting a magnitude of the dynamic control signal.

According to an embodiment, a system for amplifying a signal provided by a capacitive signal source includes a first stage and a second stage. The first stage has a voltage follower device including an input terminal configured to be coupled to a first terminal of the capacitive signal source, and a first capacitor having a first end coupled to an output terminal of the capacitive signal source. The second stage includes a differential amplifier capacitively coupled to the output terminal of the voltage follower device.

To provide a predistorter compensating for distortion generated at an amplifier by inputting a signal to be inputted to the amplifier constituting an object of compensating for the distortion and previously providing the distortion to the input signal. Amplifier replica means is provided with an input / output characteristic the same as an input / output characteristic of an amplifier or an input / output characteristic approximated thereto and inputs a signal to output. Difference detecting means detects a difference between an input signal to a predistorter and an output signal from the amplifier replica means. Amplifier replica input signal changing means changes a signal inputted to the amplifier replica means such that the difference detected by the difference detecting means is reduced. Change signal outputting means outputs a signal changed by the amplifier replica input signal changing means to the amplifier.

An automatic gain control (AGC) amplifier including a high gain transimpedance amplifier, a resistive feedback network and multiple transconductance stages coupled in the feedback path of the AGC amplifier. The feedback network receives an input signal and is coupled to the output of the high gain amplifier and has multiple intermediate nodes. Each transconductance stage has an input coupled to an intermediate node of the feedback network and an output coupled to the input of the high gain amplifier. Each transconductance stage is independently controllable to position a virtual ground within the feedback network to control closed loop gain. Each transconductance stage may have a bias current input coupled to a bias current control circuit. The control circuit controls each bias current to vary the gain of the AGC amplifier. The bias currents may be linearly controlled employing a ramp function to achieve a linear in dB gain response.

Embodiments of the invention are concerned with configurable RFICs. In an exemplary embodiment there is provided a configurable radio-frequency integrated circuit (RFIC) including one or more configurable low noise amplifier circuits, each of said one or more configurable low noise amplifier circuits being configurable between:an internal input impedance matching topology in which the respective low noise amplifier circuit includes one or more internal input impedance matching components adapted to match the input impedance of the respective low noise amplifier to a given input, said one or more internal input impedance matching components being located internally to the respective low noise amplifier circuit; anda topology different from said internal input impedance matching topology.

An amplifier and a driver circuit therefor are presented for driving a load according to a system analog input. The amplifier comprises a passive delta-sigma modulator with a passive filter providing a first filtered signal according to a passive filter input and according to a feedback signal, a quantizer coupled with the passive filter and providing a quantized output according to the first filtered signal, and a switching system coupled with the the passive filter and the quantizer. The switching system selectively providing power to a load according to the quantized output and provides the feedback signal to the passive input, wherein a gain amplifier is provided in a feedback loop around the passive delta-sigma modulator.

A system for a feedback transimpedance amplifier with sub-40 khz low-frequency cutoff is disclosed and may include amplifying electrical signals received via coupling capacitors utilizing a transimpedance amplifier (TIA) having feedback paths comprising source followers and feedback resistors. The feedback paths may be coupled prior to the coupling capacitors at inputs of the TIA. Voltages may be level shifted prior to the coupling capacitors to ensure stable bias conditions for the TIA. The TIA may be integrated in a CMOS chip and the source followers may comprise CMOS transistors. The TIA may receive current-mode logic or voltage signals. The electrical signals may be received from a photodetector, which may comprise a silicon germanium photodiode and may be differentially coupled to the TIA. The chip may comprise a CMOS photonics chip where optical signals for the photodetector in the CMOS photonics chip may be received via one or more optical fibers.

A novel method and apparatus is disclosed for reducing power dissipation of RF power amplifiers when a reduced output power level is required. The mechanism has the specific purpose of optimizing the collector terminal voltage on portions of the amplifier's RF chain for maintaining linearity while minimizing power consumption. The apparatus permits a smaller DC to DC converter to be used than in prior art, such that it is implemented in the same semiconductor die or module. Furthermore, the invention eliminates the amplification and phase continuity issues that arise from switched state power amplifiers and envelope-following approaches.

In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.

A Class-E amplifier has bee adapted for use in the radio frequency section of a magnetic resonance imaging (MRI) system. A drive signal is produces by modulating the envelope of a radio frequency carrier signal and then applied to a switch in the Class-E amplifier. The switch is connected in series with a choke between a supply voltage terminal and circuit ground with an output node formed between the choke and the switch. The output node is coupled to circuit ground by a shunt capacitor. In a preferred embodiment, a pair of such amplifiers, that are Π radians out of phase, are connected to each rung of a transverse electromagnetic transmit array type radio frequency coil of the MRI system.

To eliminate the substrate voltage dependences of the respective resistance values of resistor elements, in the resistor elements coupled in series to each other over respective substrate regions, the ends of the resistor elements are coupled to the corresponding substrate regions by respective bias wires such that respective average potentials between the substrate regions of the resistor elements and the corresponding resistor elements have opposite polarities, and equal magnitudes.

A loop delay control circuit is provided between a comparator and a power switch stage. When the amplitude of an input signal is especially high, the loop delay control circuit secures an oscillation threshold value by setting a delay amount at a low value. On the other hand, when the amplitude of the input signal is not so high, the loop delay control circuit reduces an average switching rate by increasing the delay amount, but does not reduce the oscillation threshold value. This makes it possible to provide a delta-sigma modulator allowing realization of both (i) a high oscillation threshold value, i.e., high output power, and (ii) high power efficiency.

A low power, low noise amplifier system includes at least one amplifier having first and second differential input terminals, first and second differential output terminals and providing a differential output; first and second input capacitors interconnected with the first and second differential amplifier input terminals; first and second feedback circuits containing first and second feedback capacitors, respectively, interconnected with the amplifier differential input and output terminals; an input chopper switch circuit for receiving a low frequency differential input and selectively, alternately swapping those low frequency differential inputs through the input capacitors to the differential input terminals of the amplifier; an output chopper switch for receiving and selectively, alternately swapping the amplifier differential outputs synchronously with the input chopper switch circuit; and a low pass filter responsive to the swapped differential outputs for providing a low noise, low power amplification of the low frequency differential inputs.

A low noise amplifying (LNA) circuit comprising an amplifying section (11, 12) and a feedback means (14) arranged for providing input matching from the output to the input. The LNA circuit further comprises at least one frequency band determining inductor (15) having a predetermined resonance frequency for influencing at least one frequency band in which the amplifying section operates. The at least one inductor is directly connected to the output of the circuit and the feedback means (14) provides a feedback connection for the section (s) to the input. In this way, the at least one frequency band in which the amplifying section operates is substantially completely determined by the at least one frequency band determining inductor (15).

This application relates to amplifier circuitry for amplifying a signal from a MEMS transducer. A super source follower circuit (40) is provided which includes a feedback path from its output node (Nout) to a control bias node (BC) in order to provide a preamplifier signal gain that may be greater than unity. A first transistor (M1) is configured to have its gate node connected to an input node (NIN) for receiving the input signal (VIN) and its drain node connected to an input node (X) of an output stage (A). The source node of the first transistor is connected to the output node (NOUT). A current source (I2) is configured to deliver a current to the drain node of the first transistor (M1), wherein the current source (I2) is controlled by a bias control voltage (VBC) at the bias control node (BC). A feedback impedance network (Z1) comprising a first port connected to the output node (NOUT) and a second port connected to the bias control node (BC) is provided.

A follower amplifier with power supply biased by a controlled voltage source such that the power supply potentials are, for the frequencies of interest, as close as possible to the potential of the follower output. There is proposed a front-end electronic circuit for biopotential and impedance measurements with outstanding performances (very high input impedance and gain very close to unity). Preferably, the explicit guard electrode and the explicit electronic unit at the belt are no longer necessary; all electronics is embedded in units placed directly at the measurement sites. Moreover, the proposed front-end electronic circuit allows a drastic simplification of the cabling and connectors since all units are connected to only one wire (the theoretical minimum) for potential reference and current return. Preferably, this wire does not even require an electrical isolation and can be easily embedded in the textile of a shirt, in a garment, mesh, belt, etc.