41results about "Dc amplifiers with modulator-demodulator" patented technology

Voltage data capture circuits and techniques. In one example, a circuit includes a differential transconductance stage, a differential transimpedance stage, and an analog to digital converter (ADC). The differential transconductance stage is configured to convert a differential input voltage into a differential current, and the differential transimpedance stage is configured to convert the differential current into a differential output voltage. The ADC is configured to sample the differential output voltage to produce a digital output signal. The circuit may further include a common-mode voltage regulator configured to regulate a common-mode input voltage for the differential transimpedance stage. The circuit can be used, for instance, in a battery monitoring system, or other voltage monitoring application.

The application discloses an isolation amplification circuit. The isolation amplification circuit comprises a modulation circuit, an isolation circuit and a demodulation circuit. The modulation circuit receives an input signal and a first clock signal and generates a first modulation signal and a second modulation signal according to the first clock signal and the input signal. The isolation amplification circuit receives a second clock signal, the first modulation signal and the second modulation signal, and generates the first clock signal according to the second clock signal, a first demodulation signal according to the first modulation signal and a second demodulation signal according to the second modulation signal. The demodulation circuit receives the first demodulation signal, the second demodulation signal and the second clock signal, and generates an output signal according to the second clock signal, the first demodulation signal and the second demodulation signal. The application realizes low noise of the isolation amplification circuit by weighting and summing the second demodulation signal generated according to the second modulation signal in the demodulation circuit and the demodulated first modulation signal to offset quantization noise generated by the first modulation circuit.

A signal processing device and a signal transceiver device are provided. The signal processing device includes a first amplifier, two first choppers, a second chopper, and a third chopper. The first amplifier is configured to generate a second signal from a first signal. The two first choppers are embedded between an input and an output of the first amplifier and are configured to perform a first frequency shift and a first frequency shift back, respectively. The second chopper is coupled to the input of the first amplifier and is configured to perform a second frequency shift. The third chopper is coupled to the output of the first amplifier and is configured to perform a second frequency shift back. The first frequency and the second frequency are different.

A delta sigma type ADC (1) is provided with a quantizer (30) operating at a prescribed sampling frequency (fs), an FIR filter (40) connected to the quantizer (30), and a DAC (50). A feedback path for the quantizer (30) is structured by the FIR filter (40) and the DAC (50). A reference signal for the DAC (50) is supplied from a reference signal source (60) chopping at a frequency lower than the prescribed sampling frequency (fs).

The present disclosure relates to chopper amplifier circuits featuring inherent chopper ripple suppression. A chopper amplifier circuit includes a modulator circuit tuned to a chopper frequency, and configured, in accordance with the chopper frequency, to convert a voltage into an AC voltage; an amplifier circuit having inverting and non-inverting inputs for the AC voltage, and having inverting and non-inverting outputs for an amplified AC voltage; a demodulator circuit tuned to the chopper frequency, and configured to convert the amplified AC voltage into an amplified DC voltage, the inverting output being coupled, via a first capacitance in a first signal path, to a first input of the demodulator circuit, the non-inverting output being coupled, via a second capacitance in a second signal path, to a second input of the demodulator circuit; and a discharge resistor circuit coupled on an output side of both capacitances between the first and second signal paths.

A data acquisition circuit includes a plurality of signal processors including a first analog chopper circuit, an amplifier, a second analog chopper circuit, and an analog filter that are coupled in series, respectively. The data acquisition circuit during a first mode converts analog signals from analog filters into a serial signal and converts the serial signal into a digital signal, and filters the digital signal after converting the digital signal into parallel signals. The data acquisition circuit during a second mode converts the analog signals from the amplifiers into the serial signal and converts the serial signal into the digital signal, outputs the digital signal to the digital chopper circuit, and filters the digital signal after converting the digital signal from the digital chopper circuit into parallel signals. Thus, biological information in the plurality of frequency bands can be appropriately acquired.

The present application relates to current sensing circuitry (100) that comprises a differential amplifier (110) comprising first and second inputs configured to sense a current across a sense resistance, and an output configured to output a current sense signal. The circuitry (100) further comprises a first current source, a second current source and a switch network operable in: a first phase in which the first current source is connected to the first input and disconnected from the output, and the second current source is connected to the output and disconnected from the first input; and a second phase in which the first current source is connected to the output and disconnected from the first input, and the second current source is connected to the first input and disconnected from the output.

This application relates to methods and apparatus for clipping prevention. A driver apparatus for driving a load with an output signal has a switching driver with a switch network and a modulator configured to control the switch network to switch output nodes between different switching voltages with a controlled duty-cycle. A quantizer controller receives a quantizer input signal based on an input signal and a feedback signal and controls the duty-cycle of the switch network. A clipping prevention controller is configured to control a gain applied to the input signal so as to provide limiting of the input signal to avoid clipping, wherein the clipping prevention controller is configured to dynamically control at least one limiting threshold used to determine when to apply limiting of the input signal based on an indication of said quantizer input signal.

Disclosed herein are some examples of analog-to-digital converters (ADCs) that can perform auto-zeroing with amplifying a signal for improvement of a signal-to-noise ratio. The ADCs may produce a first digital code to represent an analog input signal and a second digital code based on a residue from the first digital code, and may combine the first digital code and the second digital code to produce a digital output code to represent the analog input signal. The ADC may utilize a first observation and a second observation of an analog residue value representing the residue to produce the second digital code.

An isolated circuit system is provided. The system includes a primary side circuit and a secondary side circuit that are electrically isolated from each other. The primary side circuit and the secondary side circuit each utilize a direct current (DC) reference signal. The primary side circuit may use the DC reference signal in a modulation operation. The secondary side circuit may use the DC reference signal in a demodulation operation. The DC reference signal may be transmitted from the primary side circuit to the secondary side circuit or from the secondary side circuit to the primary side circuit.

The present application discloses an isolation amplifier circuit. The isolation amplifier circuit comprises a modulation circuit, an isolation circuit, and a demodulation circuit. The modulation circuit receives an input signal and a first clock signal, and generates a first modulation signal and a second modulation signal according to the first clock signal and the input signal. The isolation circuit receives a second clock signal, the first modulation signal, and the second modulation signal, generates a first clock signal according to the second clock signal, generates a first demodulation signal according to the first modulation signal, and generates a second demodulation signal according to the second modulation signal. The demodulation circuit receives the first demodulation signal, the second demodulation signal, and the second clock signal, and generates an output signal according to the second clock signal, the first demodulation signal, and the second demodulation signal. In the present application, quantization noise generated by a first modulation circuit is canceled by performing, in a demodulation circuit, weighted summation of a second demodulation signal, generated according to the second modulation signal, with the demodulated first modulation signal, thereby achieving low noise in an isolation amplifier circuit.

Embodiments of the present disclosure relate to a chopper amplifier circuit and a method for operating a chopper amplifier circuit. The present disclosure relates to a chopper amplifier circuit with inherent chopper ripple rejection.

To provide a highly accurate amplifier having a reduced residual offset caused by a spike noise with high accuracy, without a complicated circuit which generates a high-speed control clock and a high-speed switch.SOLUTION: A chopper modulator 2 modulates an input signal to a high frequency band. A transconductance amplifier 3 amplifies the output of the chopper modulator 2. A chopper modulator 4 demodulates an input signal component in the output of the transconductance amplifier 3 to modulate an offset component and a low frequency noise component to a high frequency band. In switching between an inverted path and a non-inverted path, the chopper modulator 2 is controlled into a non-overlap state in which all switches S11-S14 are turned off and inputs and outputs come to an open state. In switching between an inverted path and a non-inverted path, the chopper modulator 4 is controlled to be in an overlap state in which all switches S21-S24 are turned on and input / output positive and negative electrodes are made into a short-circuit state. The chopper modulator 4 comes to the overlap state when the chopper modulator 2 is in the non-overlap state.SELECTED DRAWING: Figure 1

To provide electronic circuitry and a power converter, capable of suppressing degradation in performance due to transmission of a signal through electromagnetic field coupling.SOLUTION: Electronic circuitry according to the present embodiment includes: a clock generation circuit configured to generate a first clock signal; a first conversion circuit configured to convert an input signal into a first signal having a frequency corresponding to the first clock signal on the basis of the first clock signal; a first electromagnetic field coupler configured to transmit the first signal by electromagnetic field coupling; a second electromagnetic field coupler configured to transmit the first clock signal by the electromagnetic field coupling; and a second conversion circuit configured to convert the first signal transmitted by the first electromagnetic field coupler into a second signal having a frequency corresponding to the input signal, on the basis of the first clock signal transmitted by the second electromagnetic field coupler.SELECTED DRAWING: Figure 1

Provided is an implementation method of a novel low-distortion digitally modulated direct-drive power amplifier apparatus. The method can achieve acquisition of modulated waveform signals by Δ-Σ oversampling technique, and further improves a sampling rate of the modulated waveform signals by an interpolated filter. An exciter can generate multiphase PDM modulated waveform pulses and carrier drive pulses to directly drive power amplifier modules to complete carrier generation and waveform modulation. However, to reduce complexity of a system and take the modulated waveform THD indicators into account, the multiphcontrolled within 12 phases.

An optical light sensing device includes a detector operable to detect a light wave. The optical light sensing device also includes an integration circuit that includes an operational amplifier that is operable to reduce or cancel dark currents generated at the detector.

To provide an isolation amplifier and an anomaly state detection device that convey the occurrence of an abnormal state quickly.SOLUTION: An isolation amplifier 1 includes: a primary circuit 10 provided with a ΔΣADC for converting an input signal into a digital signal and an encoder; an abnormality detection circuit for detecting abnormality having occurred to the input signal; an isolation unit for conveying the output of the encoder and a detection signal to a secondary circuit 20 in the insulated state; and an abnormal input detection output circuit provided in the secondary circuit, having a decoder and a low-pass filter receiving the output and the detection signal of the encoder and performing decode processing, and changing the output signal on the basis of an output circuit for generating an output signal and the detection signal. The input signal and the output signal are a pair of differential signals. The abnormal input detection output circuit inputs the detection signal from the isolation unit without passing through the low-pass filter, and changes the levels of both of the differential signals being the output signals by the same predetermined level during the period in which an abnormality occurs due to the detection signal.SELECTED DRAWING: Figure 1

A sensor readout system (100) is provided. The sensor readout system (100) comprises a signal generator (101) configured to generate a biasing signal (102), a first chopper (103) configured to modulate the biasing signal (102) using a chopping signal (117) with a chopping frequency fchop to generate a modulated biasing signal (104) . It also comprises a Wheatstone bridge circuit (105) comprising four resistive branches (R1, R2, R3, R4), at least one of the four resistive branches comprises an impedance-based sensor (Rs1, Rs2, Rs3). The Wheatstone bridge circuit (105) is configured to receive the modulated biasing signal (104) and to generate a sensing signal (106) based on the modulated biasing signal (104). A second chopper (107) is configured to modulate the sensing signal (106) using the chopping signal (117) with the chopping frequency fchop to generate a modulated sensing signal (108) .

Embodiments of the present application relate to chopping systems and methods. Systems and methods are provided herein, wherein a chopping modulator and a chopping demodulator are described, and a chopping device (11) having a variable chopping frequency is provided. A feedback path (16) is provided for reducing ripple and / or residual offset caused by the variable chopping frequency.

To provide an amplifier in which an effective chopper amplifier gain is stably obtained with respect to a closed-loop gain setting, and the convenience of correction is good.SOLUTION: An amplifier 1 includes: an operational amplifier 11 having input terminals INP and INN, chopper circuits 21 and 22 capable of switching between a straight connection state and a cross connection state, resistors 31 and 33, a variable resistor 32, an input terminal 11a connected to an output terminal 21c, a control terminal 11b receiving a supplied control signal, and an input terminal 11c connected to one end of the resistor 31 and one end (node N2) of the variable resistor 32; an operational amplifier 12 having an input terminal 12a connected to an output terminal 21d, a control terminal 12b for receiving a supplied control signal, and an input terminal 12c connected to one end of the resistor 33 and the other end (node N3) of the variable resistor 32; and output terminals OUTP and OUTN. The operational amplifiers 11 and 12 are configured to be capable of switching the gain bandwidth based on the control signal.SELECTED DRAWING: Figure 1

The application relates to a chopping operational amplifier circuit applied to voltage isolation, which mainly comprises transconductance amplifiers amp1, amp2, amp3, amp4, amp5, chopping modulation circuits CHIN, CHOUT, CHfb, CHRRL, capacitors Cin1, Cin2, Cfb1, Cfb2, Cs1, Cs2, Cm1, Cm21a, Cm21b, Cm22a, Cm22b, resistors res1, res2, and a chopping modulation signal f chop The chopping modulation circuit CHIN modulates the analog voltage signal input from the high-voltage end into a voltage signal with a frequency of f chop , and couples the voltage signal to the low-voltage end through the isolation capacitors Cin1 and Cin2; the bias resistors res1 and res2 of the low-voltage end provide the transconductance amplifier amp1 of the low-voltage end with a direct current bias signal again; the CHOUT modulates the offset voltage V OFFSET of the transconductance amplifier amp1 and the 1 / f noise into high frequency, and re-modulates the output current signal of the amp1 into the frequency input from the high-voltage end; finally, the size of the output voltage is input signal Vout=Vin x (Cfb / Cin), and the ripple elimination ring eliminates the ripple generated by the offset voltage of the transconductance amplifiers amp1, amp2 and amp3.

The present invention relates to the field of plasma generation radio-frequency power supplies, and provides a method for implementing a novel low-distortion digital-modulation direct-drive power amplifier device. In the method, the acquisition of a modulated waveform signal is achieved by using a Δ-Σ oversampling technique, the sampling rate of the modulated waveform signal is further improved by means of an interpolation filter within a PDM pulse distribution unit, and an exciter can generate a multi-phase PDM modulated waveform pulse and a carrier drive pulse, thereby directly driving a power amplifier module to complete carrier generation and waveform modulation. Multi-phase PDM modulation can achieve a better total harmonic distortion (THD) index of a modulated waveform, ensuring that a modulated waveform signal is basically restored without any distortion; however, in order to reduce system complexity and take into account the THD index of the modulated waveform, multi-phase PDM modulation is generally controlled to be within 12 phases. In addition, a modulated waveform signal is divided into multiple equal-amplitude PDM square-wave signals by means of multi-phase PDM modulation and a superposition technique, allowing a power amplifier to operate in a switching state, thereby improving the efficiency of the power amplifier.

To provide an amplifier in which an input offset current is reduced.SOLUTION: The auto-zero amplifier circuit 2122 includes a transconductance amplifier 211221 and sampling capacitors CM1 and CM2. A modulation chopper circuit 31,32 modulates an input signal and inputs the modulated signal to a mutual conductance amplifier 211,221. The auto-zero switch circuit 41 includes auto-zero switches S31 and S32, and the auto-zero switch circuit 42 includes auto-zero switches S33 and S33. An isolation resistor R1 is connected between the connection point of the auto-zero switches S31 and S32 and INM. An isolation resistor R2 is connected between the connection point of the auto-zero switches S33 and S34 and INM.SELECTED DRAWING: Figure 1

Disclosed is a bidirectional amplifier. The bidirectional amplifier includes a first matching circuit, a second matching circuit, an amplifier circuit connected between the first matching circuit and the second matching circuit, that amplifies a first input signal received from the first matching circuit to output the amplified first input signal to the second matching circuit, and that amplifies a second input signal received from the second matching circuit to output the amplified first input signal to the first matching circuit, and the first and second matching circuits have a symmetrical structure and operate complementary to each other.

Voltage data capture circuits and techniques. In one example, a circuit includes a differential transconductance stage (306), a differential transimpedance stage (308), and an analog to digital converter (ADC) (304). The differential transconductance stage (306) is configured to convert a differential input voltage (318) into a differential current, and the differential transimpedance stage (308) is configured to convert the differential current into a differential output voltage. The ADC (304) is configured to sample the differential output voltage to produce a digital output signal (210). The circuit may further include a common-mode voltage regulator (310) configured to regulate a common-mode input voltage for the differential transimpedance stage (308). The circuit can be used, for instance, in a battery monitoring system, or other voltage monitoring application.

To provide a semiconductor device including an amplifier with the accuracy improved.SOLUTION: A semiconductor device includes a switch, a capacitor, a chopping circuit, and an amplifier. The amplifier includes a non-inverted input terminal, an inverted input terminal, an inverted output terminal, and a non-inverted output terminal. The semiconductor device has a function of sampling and keeping a first potential and a second potential input in a first period using the switch and the capacitor. The chopping circuit is provided on each of the input terminal side and the output terminal side of the amplifier. The first potential and the second potential are input to any of the non-inverted input terminal and the inverted input terminal in a second period. In a third period, the first potential and the second potential are input to the input terminals of the non-inverted input terminal and the inverted input terminal that are different from those in the second period. Regarding the inverted output terminal and the non-inverted output terminal, the switch by the chopping circuit is performed similarly in the second period and the third period and the output is carried out from the semiconductor device.SELECTED DRAWING: Figure 1

A signal processing device and a signal transcciving device are provided. The signal processing device includes a first amplifier, two first choppers, a second chopper, and a third chopper. The first amplifier is configured to generate a second signal according to a first signal. The two first choppers are embedded between an input end and an output end of the first amplifier and respectively configured to perform a shifting operation of a first frequency and a shifting back operation of the first frequency. The second chopper is coupled to the input end of the first amplifier and configured to perform a shifting operation of a second frequency. The third chopper is coupled to the output end of the first amplifier and configured to perform a shifting back operation of the second frequency. The first frequency and the second frequency are different.

Disclosed herein are some examples of analog-to-digital converters (ADCs) that can perform auto-zeroing with amplifying a signal for improvement of a signal-to-noise ratio. The ADCs may produce a first digital code to represent an analog input signal and a second digital code based on a residue from the first digital code, and may combine the first digital code and the second digital code to produce a digital output code to represent the analog input signal. The ADC may utilize a first observation and a second observation of an analog residue value representing the residue to produce the second digital code.

The invention relates to an analog-to-digital converter with an auto-zero residual amplification circuit. Examples of an analog-to-digital converter (ADC) are disclosed herein to enable automatic zeroing to be performed by amplifying a signal to improve a signal-to-noise ratio. The ADC may generate a first digital code representing an analog input signal and a second digital code based on a residue from the first digital code, and may combine the first digital code and the second digital code to generate a digital output code representing the analog input signal. The ADC may generate the second digital code using a first observed value and a second observed value representing an analog residual value of the residual.