145 results about "Charge pump" patented technology

This application discloses an automatic calibration circuit and method for mismatch compensation current of a phase-locked loop (PLL) charge pump, relating to the field of integrated circuit technology. The calibration circuit includes: a frequency and phase detector, a charge pump, an XOR module, a filter capacitor, a digital-to-analog converter (DAC) module, and a digital logic state machine. The first output terminal of the frequency and phase detector is connected to the first input terminal of the charge pump and the first input terminal of the XOR module, respectively. The second output terminal of the frequency and phase detector is connected to the second input terminal of the charge pump and the second input terminal of the XOR module, respectively. The output terminal of the XOR module is connected to the first terminal of the filter capacitor and the input terminal of the DAC module, and the second terminal of the filter capacitor is grounded. The output terminal of the DAC module is connected to the input terminal of the digital logic state machine, and the output terminal of the digital logic state machine is connected to the third input terminal of the charge pump. The output terminal of the charge pump is used to connect to the input terminal of the low-pass filter in the PLL. This application can compensate for the mismatch current of the charge pump in real time.

This disclosure provides a DC-DC converter and chip, wherein the DC-DC converter includes a bootstrap boost circuit, a charge pump boost circuit, a high-side drive circuit, a low-side drive circuit, a high-side power transistor, and a low-side power transistor. The bootstrap boost circuit provides a first boost voltage to the high-side drive circuit. The high-side drive circuit outputs a first high-side drive voltage to the control electrode of the high-side power transistor based on the first boost voltage. The charge pump boost circuit generates a second boost voltage through a charge pump and outputs a second high-side drive voltage to the control electrode of the high-side power transistor based on the second boost voltage. The second boost voltage is greater than the first boost voltage. The first electrode of the high-side power transistor is coupled to the input voltage terminal, and the second electrode is coupled to the first electrode of the low-side power transistor via a switching node. The high-side power transistor is turned on or off according to the first and second high-side drive voltages. One end of the bootstrap boost circuit and one end of the charge pump boost circuit are respectively coupled to the switching node.

The utility model discloses a kind of low-loss high-end active diode, including active diode and charge pump, the active diode and charge pump constitute circuit, the active diode is composed of comparator and main tube, the main tube is NMOS tube or PMOS tube, the charge pump is used to boost drive NMOS tube or PMOS tube.The utility model has prevent the function of backflow, can protect front-stage circuit;With lower loss, static current loss is small;Use active diode and charge pump, circuit is simple, cost is very low, and practicality is strong.

The application discloses a low ripple charge pump circuit with adjustable output, wherein the negative plate of a first pump capacitor is connected to the output terminal of an operational amplifier and the ground through a third switch and a fourth switch respectively, and the positive plate is connected to the power supply and the output terminal through a first switch and a second switch respectively; the negative plate of a second pump capacitor is connected to the output terminal of the operational amplifier and the ground through a seventh switch and an eighth switch respectively, and the positive plate is connected to the power supply and the output terminal through a fifth switch and a sixth switch respectively; the positive plate of a filter capacitor is connected to the output terminal, and the negative plate is grounded; a first feedback resistor and a second feedback resistor are connected in series between the output terminal and the ground; the inverting input terminal of the operational amplifier is connected to the feedback voltage between the first feedback resistor and the second feedback resistor, and the non-inverting input terminal is connected to the reference voltage. The application has adjustable output voltage, and the output ripple is far smaller than that of a conventional charge pump.

We provide a multi-port interleaved charge pump bidirectional DC-DC converter that allows multiple ESSs to be connected to a DC microgrid system with a single bidirectional DC-DC converter. [Solution] The system comprises two two-phase interleaved charge pump bidirectional DC-DC converters, three charge pump capacitors, and a drive circuit that controls each switch of the DC-DC converters. The negative terminals of the two DC-DC converters are common-connected, the low-voltage sides of the two DC-DC converters are connected to two different low-voltage DC voltage sources, the high-voltage sides of the two DC-DC converters are multiple-connected, and the inductors that constitute the interleaved system but are not connected to the charge pumps are connected to the connection point via three charge pump capacitors and connected to one high-voltage DC voltage source.

This application provides a switching power supply, control method, and charger with a wide input / output voltage range, relating to the field of switching power supply technology. The switching power supply includes a transformer, a power transistor, a PWM IC chip, two auxiliary winding power supply circuits, and a protocol control chip. Each auxiliary winding power supply circuit includes a charge pump and an auxiliary winding. Each auxiliary winding is magnetically coupled to the primary winding of the transformer. One of the auxiliary winding power supply circuits also includes a voltage regulator, with its two ends connected to the two auxiliary windings via two charge pumps. The first end of the voltage regulator is connected to the power supply terminal of the PWM IC chip. The protocol control chip is configured to increase its power consumption when the input AC voltage meets a preset worst-case power supply stability condition. This application embodiment can improve the power supply stability of the PWM IC chip while maintaining the power consumption defined by the protocol standard under non-full load conditions, and has a simpler circuit structure.

This invention discloses a negative voltage generation circuit, PCB board, and controller, including a first N-type power transistor MDN1, a charging unit, a negative voltage output switching unit, a substrate modulation unit, and a timing control unit. The source of the first N-type power transistor MDN1 is grounded, and the drain of the first N-type power transistor MDN1 is connected to the output terminal of the charging unit and the input terminal of the negative voltage output switching unit. The gate and substrate of the first N-type power transistor MDN1 are respectively connected to the substrate modulation unit. The timing control unit is connected to the charging unit, the negative voltage output switching unit, and the substrate modulation unit. The substrate modulation unit is used to track and modulate the gate potential and substrate potential of the first N-type power transistor MDN1 to eliminate the potential difference between the gate potential and the substrate potential. By eliminating the back gate effect of the NMOS power transistor through bootstrap substrate modulation, the negative voltage conversion efficiency of the charge pump is greatly improved, which is suitable for low-power, high-performance, and high-efficiency negative voltage output scenarios.

A circuit of wireless charging and a method of charging a battery. The circuit includes: a wireless receiver, configured to receive a charging power transmitted by a wireless transmitter of a wireless charging apparatus through electromagnetic induction; a charge pump circuit configured to receive a boosted input voltage from the voltage output end, and step down the input voltage to an output voltage of the charge pump circuit, to charge a battery; a step-down converter circuit configured to perform the step-down charging on the battery at least in a case that a charging mode is in a constant voltage mode; and a controller configured to select one between the charge pump circuit and the step-down converter circuit as a charging path to charge the battery based on a voltage difference between the input voltage from the voltage output end of the wireless receiver and a charging voltage of the battery.

This application relates to a device and method for protecting high-voltage space radiation output from a charge pump. It includes a radiation-resistant reference and self-calibration module and a dual-mode overvoltage response module. The radiation-resistant reference and self-calibration module automatically verifies and maintains the stability of the generated reference voltage under radiation conditions by comparing the output signals of a buffer circuit and a redundant buffer circuit. The dual-mode overvoltage response module monitors the high voltage output from the charge pump using the reference voltage and automatically triggers two protection modes based on whether it exceeds a first-level threshold or a higher second-level threshold: when the first-level threshold is exceeded, a first protection mode is triggered, suppressing the clock pulse input to the charge pump and opening the leakage current to reduce the high voltage; when the second-level threshold is exceeded, a second protection mode is triggered, directly shutting off the clock pulse of the charge pump and opening the leakage current. This invention ensures the reliability of the judgment reference from the source and achieves highly reliable protection against overvoltage caused by space radiation through an adaptive dual-mode response mechanism.

This utility model discloses a charge pump circuit, a display chip, and a display device. After the charge pump circuit is started, it periodically alternates between a charging phase and a pumping phase. The charge pump circuit includes a pumping capacitor and a control circuit. The control circuit is used to control the second terminal of the pumping capacitor to selectively connect to at least one of the non-positive supply voltages during the charging phase, and to control the first terminal of the pumping capacitor to connect to at least two positive supply voltages in a time-sharing manner, thereby reducing the power consumption of the charge pump circuit.

An apparatus includes a capacitor, a first plurality of transistors, a transmission gate, and a second plurality of transistors. The first plurality of transistors is coupled in series with each other via the capacitor. The first plurality of transistors are coupled between a first supply voltage terminal and a ground terminal. The transmission gate is coupled to a second supply voltage terminal. The second plurality of transistors are coupled to the transmission gate via the capacitor. The second plurality of transistors are coupled to a data input terminal and an output terminal.

The utility model discloses a kind of under-voltage latching circuits with recovery time, including power supply voltage detection module and recovery time generation module;Power supply voltage detection module is composed of sampling circuit and first comparator circuit, and recovery time generation module is composed of charge pump circuit and second comparator circuit;The under-voltage latching circuit with recovery time further includes band gap reference circuit and logic circuit.The utility model can realize accurate recovery time.Through logic circuit, the voltage of first comparator and second comparator output is calculated, can avoid under-voltage latching during power-on process of power supply to generate false inversion signal.In addition, as the case shown in the preceding figure 3, recovery time generation module can effectively avoid the situation of power fluctuation, and more effectively protect the circuit.Recovery time can be adjusted by increasing charging current control circuit.Low cost, easy to design, easy to copy, smaller layout area, low cost.

A display substrate and a display device are provided. In the display substrate, the shift register unit includes a charge pump circuit, the charge pump circuit includes a first capacitor and a first transistor, and the charge pump circuit is electrically connected with a first input node and a first node, respectively; a first electrode plate of the first capacitor is connected with the first clock signal line, a second electrode plate of the first capacitor is connected with the first input node, a gate electrode of the first transistor is connected with a first electrode of the first transistor, a second electrode plate of the first capacitor is provided with a first portion, and the first portion of the second electrode plate of the first capacitor and the gate electrode of the first transistor have an integral structure.

The application discloses a charging control circuit and equipment. The circuit comprises a first parallel charging module, a second parallel charging module and a power management module connected with a power socket. The power management module is connected with a charge pump module through an NMOS tube N1, and the power management module is connected with a battery through an NMOS tube N2. The circuit further comprises a central processing unit for controlling the NMOS tube N1 and the NMOS tube N2, and a power identification module connected with the central processing unit. The design scheme of the two charging powers compatible with each other is realized, the cost is saved, the product function richness is increased, and the user demand that the extreme pursuit of the charging rate and the comprehensive control performance of the mobile phone temperature rise are balanced is solved.

This invention relates to the field of high-speed signal transmission technology, specifically to a differential multi-band voltage-domain cross-voltage-domain voltage-controlled oscillator (VCO) for suppressing power supply noise. It includes a frequency and phase detector, a charge pump, a low-pass filter, a VCO_BIAS module, and a voltage-controlled oscillator unit. The charge pump and low-pass filter generate a differential control voltage; the VCO_BIAS module receives the differential control voltage and converts it into a differential current; the voltage-controlled oscillator unit receives the differential current; the VCO_BIAS module integrates a bias structure to suppress power supply noise, reducing the sensitivity of the tail current transistor of the voltage-controlled oscillator unit to power supply noise due to channel length modulation effects, and improving the jitter of the phase-locked loop (PLL) output frequency. In this invention, by constructing a differential structure, a cross-voltage-domain design, and tunable bias and load, a wide frequency range output under low-voltage power supply is achieved, and clock jitter caused by power supply noise is effectively suppressed.

To provide a voltage supply circuit that can reduce the ripple in the output voltage of a charge pump circuit by suppressing the effect of changes in the power supply voltage on the voltage supplied to the charge pump circuit. [Solution] The voltage supply circuit according to the embodiment includes: a first LDO amplifier circuit that receives a power supply voltage from a power source and outputs a first control voltage from a first output unit according to a preset reference voltage; a second LDO amplifier circuit that receives a power supply voltage from a power source and outputs a second control voltage from a second output unit according to a reference voltage; an oscillation circuit; a first charge pump circuit that outputs a first output voltage generated from the first control voltage to a first output terminal; a second charge pump circuit that outputs a second output voltage generated from the second control voltage to a second output terminal; and a control circuit that controls the operation of the first LDO amplifier circuit and the second LDO amplifier circuit.

Circuits and methods that can rapidly detect voltage degradation in a positive charge pump output and discharge control node accumulated charge (CNAC), thereby forcing the positive charge pump into a high-power mode. Embodiments include circuitry configured to provide a load current to a positive charge pump, including a low-dropout regulator (LDO) having a pass device that includes a control input, and a rapid charge transfer circuit coupled to the control input of the pass device and configured to be coupled to a source of a trigger voltage, the rapid charge transfer circuit configured to transfer a charge to or from the control input of the pass device when the trigger voltage falls sufficiently below a specified level so as to rapidly place the pass device in a higher conduction state, and to automatically cease to provide the transfer the charge after a settable amount of time.

In one example, a system comprises a plurality of charge pump units connected in parallel to receive an input voltage and to generate an output voltage greater than the input voltage; and a pumping controller to provide a pumping signal to a first charge pump unit of the plurality of charge pump units and to provide sequentially delayed versions of the pumping signal to the other charge pump units of the plurality of charge pump units, the pumping controller comprising a plurality of circuit blocks, each of the plurality of circuit blocks comprising a delay circuit and a latch.

The application provides a phase-locked loop circuit and an image sensor, wherein the phase-locked loop circuit comprises a frequency discriminator, a charge pump circuit, a switching circuit, an inductive-capacitive voltage-controlled oscillator, an automatic frequency control circuit and a detection control circuit; in a calibration mode, the automatic frequency control circuit controls the switching circuit to output a voltage reference signal and a digital code signal, so as to change the capacitance size of the inductive-capacitive voltage-controlled oscillator, and further change the frequency size of an output signal of the phase-locked loop circuit; after the calibration is completed, the frequency discriminator and the charge pump circuit output a changed first voltage signal, the capacitance size of the inductive-capacitive voltage-controlled oscillator and the frequency size of the output signal of the phase-locked loop circuit are changed, the detection control circuit outputs a shutdown signal to shut down the automatic frequency control circuit, and the power consumption of an additional circuit is reduced; since the automatic frequency control circuit has been shut down, the digital code signal input into the inductive-capacitive voltage-controlled oscillator will not be changed, and the disturbance influence is eliminated.

The utility model discloses a kind of low-power single lithium battery boost circuit, including single lithium ion battery V1, resistance R1, capacitor C1, capacitor C2, capacitor C3, capacitor C4, capacitor C5, diode D1, diode D2, diode D3, diode D4, 555 chip U1, the utility model has adopted low-power 555 chip and constitutes minimalistic oscillation circuit, realize the square wave output of 50% duty cycle of micro-power consumption, output square wave is boosted to 9-10V by multistage charge pump, there is no inductive element in circuit, and work in low-frequency state, will not produce electromagnetic interference, it is adopted 555 chip of micro-power consumption, oscillation circuit and charge pump boost circuit are also micro-power consumption, overall power consumption is very small, less than 0.1mA, ensure that battery power consumption is also very small when long time storage, the cost of entire boost circuit is very low, only a few cents, with high cost performance.

The utility model provides a centralized oil purification system for sealing ring lubricating oil purification of internal mixer relates to lubricating oil essence technical field to solve the problem that traditional filter element is easy to block, is difficult to remove through the mode of filtration, influences normal operation of equipment, including charging tank, charging tank bottom discharge gate is connected with the import of charging pump through the pipeline, the discharge outlet of charging pump is connected with the import of oil storage tank through the pipeline, the heater is connected with vacuum gasification jar through valve A, the bottom of mesoporous adsorption filter is connected with supplementary filter, the oil storage tank is connected with degumming machine through degumming feed pump, the degumming transfer tank is connected with oil storage tank through degumming circulating gear pump. Waste lubricating oil is separated by degumming, vacuum gasification dehydration, mesoporous adsorption filtration, supplementary precision filtration and other procedures, more than 90% of particulate matter and colloidal impurities are removed, the amount of subsequent filter element is greatly reduced, and the viscosity, moisture and mechanical impurity indexes of lubricating oil completely meet the equipment operation requirements.

This invention discloses a charge pump circuit, a PCB board, and a controller. The sources of a first, second, third, and fourth field-effect transistor (FET) are connected to a power supply terminal. One end of a first capacitor is connected to a first clock signal terminal, and the other end is connected to the drain of the first FET, the gate of the second FET, and the gate of the third FET. One end of a second capacitor is connected to a second clock signal terminal, and the other end is connected to the gate of the first FET, the drain of the second FET, and the gate of the fourth FET. One end of a third capacitor is connected to a third clock signal terminal, and the other end is connected to the drain of the third FET and the input terminal of a signal suppression unit. One end of a fourth capacitor is connected to a fourth clock signal terminal, and the other end is connected to the drain of the fourth FET and the input terminal of a switching unit. The output terminal of the signal suppression unit is connected to the enable terminal of the switching unit, and the output terminal of the switching unit is connected to one end of a fifth capacitor, the other end of which is grounded. This circuit manages the charge transfer process in an orderly manner through the signal suppression unit, reducing output voltage ripple.

This invention relates to the field of wireless communication technology, and provides a positive charge pump reset circuit and an RF switch chip. The circuit includes a low-dropout linear regulator, a positive charge pump, and a first capacitor. The input terminal of the low-dropout linear regulator is connected to a power supply, and its output terminal outputs a power supply voltage to the input terminal of the positive charge pump. The output terminal of the positive charge pump is used to boost the power supply voltage to a preset value to output a positive voltage. The first terminal of the first capacitor is connected to the output terminal of the positive charge pump, and its second terminal is grounded. The positive charge pump reset circuit also includes a reset circuit, whose input terminal is connected to either the input terminal or the output terminal of the positive charge pump. The reset circuit is used to reset the positive charge pump voltage when the received output voltage is greater than the preset value. The positive charge pump reset circuit of this invention has a fast charge reset speed and high reliability.

The present disclosure relates to a semiconductor device and a method of operating a semiconductor device. The semiconductor device includes a charge pump circuit configured to generate an output voltage by pumping an input voltage according to a first master clock and a second master clock; a voltage detection circuit configured to generate a comparison signal by comparing the output voltage with a reference voltage; and a drive control circuit configured to: selectively invert the first external clock and the second external clock at a start time of an active period of the comparison signal to receive the inverted clocks as first internal clocks and second internal clocks; generate the first master clock and the second master clock according to the first internal clocks and the second internal clocks while controlling a transition order such that the second master clock transitions after the first master clock transitions during the active period of the comparison signal; and store logic levels of the first master clock and the second master clock as a first preliminary clock and a second preliminary clock, respectively, at an end time of the active period of the comparison signal.

The present disclosure relates to a charging control method and device, electronic equipment and storage medium. The method comprises: obtaining charging data of an electronic device, wherein a charge pump module of the electronic device supports at least two working modes of charging; and controlling the charge pump module to switch to a target working mode according to the charging data, the target working mode being a working mode in which charging loss power under the charging data meets a preset condition. In this embodiment, the working mode of the charge pump module is switched to reduce the charging loss of the electronic device, in particular the loss function of the charge pump module, thereby improving the charging efficiency of the electronic device.

This invention belongs to the field of mixed-signal circuits and relates to a modulator structure applied in a multi-charge pump phase-locked loop (PLL), specifically providing a method for implementing a modulator with fractional spurious emission suppression due to mismatch. In multi-charge pump PLLs, mismatches between different shunt charge pumps, such as current source mismatch and layout mismatch, can lead to integer boundary spurious emission. To alleviate the problem of integer boundary spurious emission degradation caused by mismatch in multi-charge pump PLLs, this invention proposes a method for implementing a modulator with fractional spurious emission suppression due to mismatch. This is achieved by making the net injected charge of long-range mismatch zero and filtering out the low-frequency components of the mismatch injected charge, thereby suppressing fractional spurious emission. Simulation results show that this invention can significantly suppress fractional spurious emission caused by mismatch.

The present invention increases the output voltage of a switching amplifier in the case of a limited supply voltage. The switching amplifier is provided with a first switch and a second switch which are turned on and off in a complementary manner, and a capacitor whose terminals are used as inputs of a power combiner. The terminals of the capacitor are connected to the output terminals of the first switch and the second switch. Depending on the operation of the first switch and the second switch, the capacitor receives a supply from the power supply. As a result, the load in the capacitor is used as a charge pump, which alternately steps up or steps down the output voltage via the operating frequency of the switching amplifier, thereby generating a rectangular voltage with a controlled wave height.

This invention discloses a bootstrap charge pump structure, comprising: a clock control logic circuit, a bootstrap switch array, a boost capacitor, and an input voltage buffer. The clock control logic circuit is connected to the bootstrap switch array and is used to generate a four-phase non-overlapping clock to control the orderly activation of the switches in the bootstrap switch array. The bootstrap switch array is connected to the boost capacitor, and the clock control logic circuit boosts the voltage of the boost capacitor. The input voltage buffer is connected to the bootstrap switch array and is used to provide an adjustable voltage input to the bootstrap switch array. This invention improves the charge transfer efficiency of the charge pump and reduces resistance, representing an efficient bootstrap charge pump structure.

The present invention proposes a charge pump circuit device (70) with enhanced efficiency. According to the present invention, the charge pump circuit device (70) includes: a plurality of capacitors (10, 12, 14, 16); a switch (20, 22, 24) that connects one of the capacitors (10, 12, 14, 16) to another of the capacitors (10, 12, 14, 16); each of the capacitors (10, 12, 14, 16) includes a semiconductor substrate (38), the semiconductor substrate (38) including a deep well doped region (42) of a first conductivity type and a well doped region (48) of a second conductivity type disposed adjacent to the deep well doped region (42) of the first conductivity type, a portion of the capacitors (10, 12, 14, 16) being disposed in the semiconductor substrate (38); each of the capacitors (10, 12, 14, 16) includes a top electrode connected to a gate electrode (50); wherein, for each of the capacitors (10, 12, 14, 16), its deep well doped region (42) is connected to its gate electrode (50).