861 results about "Charge pump" patented technology

The invention discloses a high-speed level conversion circuit, and belongs to the technical field of integrated circuit design, the circuit mainly comprises an input signal processing module, a voltage boosting module, a differential signal generation module, a signal amplification module and an output module, the input signal processing module converts a low-voltage input signal into a complementary logic signal pair; the voltage boosting module raises the voltage amplitude of the complementary logic signal by using a charge pump principle; the lifted signal drives a thick gate transistor in the differential signal generation module to generate a differential signal; the signal amplification module adopts a cross coupling structure to quickly amplify the differential signal; and finally, the output module outputs a high-voltage domain signal in an inverted manner. By introducing voltage bootstrap before gate driving, the overdrive voltage of a core switch tube is remarkably increased, so that the problem of low conversion speed of a traditional level conversion circuit is effectively solved on the premise of not increasing the device size and static power consumption, and high-speed and high-efficiency level conversion is realized.

A high-linearity grid voltage bootstrap circuit relates to the technical field of analog-to-digital conversion and comprises a first charge pump boosting unit, a second charge pump boosting unit and a grid voltage bootstrap unit, working states of a sampling switch are divided into a sampling state and a holding state, an input voltage VIN is boosted to a VG through the grid voltage bootstrap unit in a sampling stage, and the sampling switch is switched on; and the holding stage sampling switch is cut off, and charges are injected to the upper polar plates of the capacitors C3 and C4 of the gate voltage bootstrap unit through the first charge pump boosting unit and the second charge pump boosting unit respectively. According to the invention, the problem that the actual gate-source voltage is reduced due to the grid parasitic capacitance of the sampling switch is solved, and the layout area occupation is greatly reduced while the bootstrap voltage is improved; the proportion of the capacitor C3 and the capacitor C4 can be flexibly set to obtain the required bootstrap voltage; and the problem that the on-resistance of the sampling switch is increased due to the reduction of the gate-source voltage can be solved, and the linearity of the sampling switch is improved.

A dual path PLL provides excellent output phase stability over PVT variations, without implementing a high accuracy TDC. A digital integral path employs a binary phase detector, comparing the reference and feedback signals, and an integrator to generate an oscillator control input to lock the long-term output phase to the reference signal. An analog proportional path employs a linear (e.g., edge triggered) phase detector and a charge pump and filter to generate an oscillator control input to mitigate phase noise in the output signal. The feedback signal to the proportional path is delayed, which has the effect of increasing the width of phase error pulses, and moving the charge pump operating point away from the zero point where it generates both positive and negative currents, which are difficult to match. A second linear phase detector in the proportional path compensates for the increased phase error pulse width by comparing the delayed and non-delayed feedback signals, and generating pulses in the opposite direction.

The invention provides a dynamic residual amplification circuit based on charge sampling, and relates to the technical field of integrated circuits, the dynamic residual amplification circuit comprises an integrating circuit, a logic circuit, a charge pump and a zero-cross detection circuit, the integrating circuit is connected with the logic circuit and the zero-cross detection circuit, the integrating circuit converts a sampled input differential signal into a constant current, and the constant current is connected with the charge pump. The output node is continuously charged or discharged, so that the input differential signal is converted into a current integral quantity; the zero-cross detection circuit monitors the output voltage of the integrating circuit in real time, and when the output voltage is greater than or equal to the common mode voltage VCM, the moment when the output voltage is equal to the common mode voltage VCM is converted into a digital clock edge; the logic circuit is connected with the charge pump and outputs digital pulses to the charge pump according to the digital clock edge so as to control the reset time sequence of the whole dynamic residual amplification circuit; the charge pump is configured to output a residual voltage modulated by the digital pulse in response to the digital pulse. The application helps to improve the linearity of the residual signal.

This disclosure provides a charge pump circuit. The charge pump circuit according to this disclosure includes one or more cascaded boost units and output units having the same structure. Each boost unit has a dual-branch structure with top and bottom symmetry and connected to two sets of four-phase clock signals with opposite clock phases. By adjusting the phase relationship of the four-phase clocks, the rise time of the gate voltage of the transfer transistor can be delayed by advancing the falling edge of the driving clock of the secondary capacitor and delaying its rising edge. This ensures that the transfer transistor is in the off state at the moment of high-low phase switching, thereby avoiding the problem of reduced charge transfer efficiency caused by reverse charge flow between the input and output nodes of the boost unit.

A charge pump circuit of a semiconductor memory device, which may include a first pumping stage that includes a first pumping capacitor and a second pumping capacitor, a first transfer stage that transfers a voltage of the first pumping capacitor when a clock signal is at a high level or transfers a voltage of the second pumping capacitor when a inverse clock signal is at the high level, a second pumping stage that includes a third pumping capacitor and a fourth pumping capacitor, and a second transfer stage that transfers a voltage of the third pumping capacitor when the clock signal is at the high level or transfers a voltage of the fourth pumping capacitor when the inverse clock signal is at the high level. The second transfer stage may output multiple times of the input voltage.

The invention provides a charge pump circuit and a chip, in the charge pump circuit, a sampling circuit, a feedback circuit and a clock generation circuit are sequentially coupled and are coupled with a first charge pump and a second charge pump to form a loop, and in the initial stage of establishing the output of the charge pump circuit, the sampling circuit is used for carrying out primary charging on the output end of the charge pump circuit; when the input voltage rises to a corresponding value, the first charge pump and the second charge pump work at the same time, and when the voltage of the output end of the charge pump circuit reaches a target value, one of the first charge pump and the second charge pump stops working, so that the power consumption of the charge pump circuit in a steady state is effectively reduced; sectional charging and self-adaptive adjustment of a working mode are realized, and the vast majority of charging processes in an output establishment stage are completed by using an input voltage, so that the load pressure in the charge pump circuit is reduced. In addition, the sampling circuit also realizes parallel voltage sampling and ripple sampling, and the transient response capability of the charge pump circuit is enhanced.

One embodiment relates to A DC / DC converter for boosting an input voltage to a desired voltage and outputting same, comprising: a boost converter for boosting an input voltage to a first voltage; a voltage drop pump for reducing the input voltage to a second voltage; and a charge pump connected to the boost converter and the voltage drop pump, wherein the charge pump generates, as an output voltage, on the basis of the first voltage that is input from the boost converter and the second voltage that is input from the voltage drop pump, a third voltage boosted to be higher than the input voltage.

The invention relates to a circuit arrangement (12) for which an input voltage U is provided. E to a predetermined output voltage U A to increase. The circuit arrangement (12) comprises an electric charge pump, configured to alternately charge a first capacitor (16) with the input voltage U in a first operating step by means of a switching device (21) at a frequency f. E to charge and in a second step connect the first capacitor (16) to the input voltage U Eto connect in series. A microcontroller (20) is configured to control the switching device (21) and, within the first operating step, to set a capacitor charging time independent of the duration of the first operating step, wherein the capacitor charging time specifies a duty cycle T as the ratio of the capacitor charging time to one period of the frequency f, and the microcontroller (20) is configured to control the output voltage U A by varying the duty cycle T.

The invention belongs to the field of integrated circuits, and particularly relates to a charge pump circuit for a phase-locked loop, a charge pump module, the phase-locked loop and a communication chip. The charge pump circuit adopts a source switch single-end topology, and a numerical control current source DAC with an adaptive compensation circuit and two rail-to-rail operational amplifiers are applied. According to the source electrode switch single-end topology, the switch time sequence is dynamically optimized through a three-state working mode, and the charge injection effect and clock feed-through interference are remarkably reduced; the numerical control current source realizes multi-stage high-precision programmable current output according to a control code, responds to the change of output voltage in real time by utilizing a self-adaptive compensation mechanism, and maintains the stability of charging and discharging current; the rail-to-rail operational amplifier eliminates the common-mode constraint in a full-swing input range by connecting an NMOS-PMOS differential pair structure in parallel. The charge pump circuit overcomes the defects of a charge pump circuit adopted in an existing phase-locked loop in the aspects of output swing, stability and the like, static power consumption can be reduced to the microampere level, and the advantages are obvious.

In one example, a high voltage generation block comprises a temperature sensor to sense an operating temperature and output a temperature output, a trim circuit to receive a trim enable circuit and the temperature output and to generate oscillator trim bits, a charge pump oscillator to generate an oscillating signal in response to the oscillator trim bits and a feedback signal, a charge pump to receive the oscillating signal and to generate a pumped voltage, and a charge pump regulator to receive the pumped voltage and to generate the feedback signal and a high voltage output.

The invention relates to a charge pump circuit, a modulation method of the charge pump circuit and electronic equipment. The charge pump circuit comprises a charge pump module, a driving module, an obtaining module and a frequency adjusting module. The charge pump module is used for connecting a load and is configured to output a target voltage to the load in response to the adjusted target switching frequency based on the power supply voltage. And the driving module is connected with the charge pump module and is configured to respond to the adjusted target switching frequency to drive the charge pump module. The acquisition module is configured to acquire a pre-input signal corresponding to a load. And the frequency regulation module is connected with the acquisition module and the driving module, and is configured to regulate the magnitude of the target switching frequency in real time according to the pre-input signal. The switching frequency of the charge pump can be dynamically regulated and controlled, so that the output efficiency of the charge pump circuit is improved, and electromagnetic interference and switching loss are avoided.

The utility model provides a phase-locked loop circuit and an image sensor, and the phase-locked loop circuit comprises a phase frequency detector, a charge pump circuit, a switching circuit, an inductance capacitance voltage-controlled oscillator, an automatic frequency control circuit, and a detection control circuit. The automatic frequency control circuit controls the switching circuit to output a voltage reference signal and output a digital code signal, so that the capacitance in the inductance-capacitance voltage-controlled oscillator is changed, the frequency of an output signal of the phase-locked loop circuit is further changed, after calibration is finished, the phase frequency detector and the charge pump circuit output a changed first voltage signal, and the charge pump circuit outputs a second voltage signal. The capacitance of the inductance capacitance voltage-controlled oscillator and the frequency of an output signal of the phase-locked loop circuit are changed, and the detection control circuit outputs a closing signal to close the automatic frequency control circuit, so that additional circuit power consumption is reduced; digital code signals input by the inductance-capacitance voltage-controlled oscillator are not changed, and disturbance influence is eliminated.

The invention relates to the technical field of analog integrated circuits, and discloses a reference clock frequency multiplier circuit and a chip, and the reference clock frequency multiplier circuit comprises a phase discriminator, a charge pump, a loop filter, a voltage-controlled delay unit, a multiphase injection locked ring oscillator and an edge combiner. And the voltage-controlled delay unit, the phase discriminator, the charge pump and the loop filter form a multi-phase clock generator. The multi-phase injection clock signal is generated by adopting the voltage-controlled delay unit, and the multi-phase injection locking ring oscillator is further adopted as an input clock source of the edge combiner, so that the phase error of the multi-phase injection clock signal generated by the voltage-controlled delay unit is suppressed; therefore, a frequency multiplication clock signal with an accurate duty ratio and low noise is obtained.

The invention provides a charge pump control circuit, a chip and electronic equipment, and relates to the technical field of power management chips, and the circuit comprises a voltage division circuit, a reference voltage generation circuit, a comparison circuit and a charge pump circuit. The voltage division circuit comprises an input end, a first control end and a second control end, the input end is used for accessing auxiliary voltage, the first control end is used for accessing charge pump voltage, and the second control end is used for accessing power supply voltage; the voltage division circuit generates divided voltage; the reference voltage generation circuit generates a first reference voltage and a second reference voltage. The comparison circuit compares the divided voltage with the first reference voltage and the second reference voltage to obtain corresponding control signals; the charge pump circuit boosts based on the power supply voltage according to the control signal to obtain a charge pump voltage. The current required by the voltage division circuit is provided through the auxiliary voltage, and the charge pump voltage is only used for providing the control voltage signal of the voltage division circuit, so that the current load of the charge pump voltage is reduced, and the power consumption is reduced.

A high-frequency circuit includes a switch circuit having terminals and configured to switch between connection and disconnection between the terminals, and a charge pump circuit configured to supply a control voltage to the switch circuit, wherein the switch circuit includes an FET having a first gate, a first drain and a first source, where the first gate is supplied with a first control voltage from the charge pump circuit, the first drain is connected to the terminal, and the first source is connected to the other terminal, and an FET having a second gate, a second drain and a second source, where the second gate is supplied with a second control voltage from the charge pump circuit, the second drain and the second source are connected to a path connecting the terminal, the FET and the terminal, and the second drain and the second source are short-circuited.

The invention discloses a low-ripple closed-loop negative-voltage charge pump circuit in the technical field of analog integrated circuits, and the circuit comprises a charge pump closed-loop modulation circuit, the output end of the charge pump closed-loop modulation circuit is connected with the low-ripple negative-voltage charge pump circuit, and the low-ripple negative-voltage charge pump circuit is used for receiving positive power supply voltage input and outputting negative power supply voltage; the low-ripple negative-voltage charge pump circuit comprises a charge pump module, the first end of the charge pump module is connected with the first end of the positive power supply filter capacitor and the output end of the charge pump closed-loop modulation circuit, and the charge pump module outputs an output signal through the first end. By fixing the switching frequency of the low-ripple closed-loop negative-voltage charge pump circuit, the influence of switching noise on the system is reduced without repeatedly starting and stopping or changing the switching frequency of the charge pump, meanwhile, the size of a positive power supply is adjusted in a closed-loop mode through a negative feedback loop, and the voltage of the positive power supply of the charge pump is dynamically compensated. And the output voltage excursion of the traditional charge pump under large current is reduced.

The invention belongs to the technical field of electronic circuits, and provides a driving circuit for current regulation and control and a negative voltage charge pump circuit. The driving circuit comprises a soft start module, a control module, a driving module and a current mirror module. The control module is respectively connected with the soft start module, the driving module and a source electrode of a fourth power tube in the charge pump circuit, and the current mirror module is respectively connected with the soft start module and the driving module. The driving module is used for being connected with a grid electrode of a first power tube, a grid electrode of a second power tube, a grid electrode of a third power tube and a grid electrode of a fourth power tube in the charge pump circuit. The driving circuit provided by the invention can ensure that the current flowing through the third power tube in the initial stage of soft start is relatively small, so that the safety of the charge pump circuit is ensured; the current flowing through the third power tube is gradually increased, so that the output voltage of the charge pump circuit can be ensured to reach the target voltage after the soft start is finished, and the charge pump circuit can work normally.

The utility model relates to a novel battery active equalization circuit, and belongs to the technical field of battery equalization control. According to the novel battery active equalization circuit, the single battery with the highest voltage in the single batteries in the battery pack is determined through the voltage comparison module, and the voltage of the single battery is controlled to be conducted to be output to the boosting module; the charge pump structure is used for amplifying the received voltage according to the number value multiple of the single batteries so as to match the voltage specification of the battery pack, and transmitting the amplified voltage back to the battery pack to complete the equalization control of the battery pack. According to the utility model, in the process of amplifying the voltage of the single battery with the highest voltage, the charge pump, which is a boosting structure taking a capacitor as an energy transfer device, is particularly adopted, so that the use of an inductor / transformer which is large in size, high in cost and relatively low in energy conversion efficiency is avoided, and the size and the cost of the equalization circuit are effectively reduced; and the energy conversion efficiency is improved.

A charge pump control circuit, comprising an internal reference voltage generator configured to generate a programmable reference voltage ramp, and a control circuit coupled to the internal reference voltage generator. The control circuit configured to control current of a charge pump circuit driving a load by controlling a duty cycle of a transfer phase of the charge pump circuit during a gain-up stage according to a first comparison between the programmable reference voltage ramp and an output voltage across an output capacitor of the charge pump circuit, and a second comparison between a fly capacitor reference voltage and a fly capacitor voltage of a fly capacitor of the charge pump circuit.

According to an embodiment, a bootstrap drive circuit for driving a bootstrap switch in a DC-DC converter is proposed. The bootstrap drive circuit includes a non-overlapping circuit, a first and a second capacitor, and a first and a second n-channel transistor. The non-overlapping circuit is configured to receive an input signal, the input signal being a function of a pulse width modulated (PWM) signal, wherein the input signal and the PWM signal are characterized by a first logic level, generate a first control signal from the input signal at a first output terminal of the non-overlapping circuit, the first control signal having the first logic level, and generate a second control signal from the input signal at a second output terminal of the non-overlapping circuit, the second control signal being characterized by a second logic level different from the first logic level.

The invention discloses a phase synchronization circuit, an expanded phase-locked loop circuit and a delay phase-locked loop circuit. The phase synchronization circuit comprises a clock comparison unit, a biasing circuit, a charge pump circuit, a time / analog conversion circuit, a compensation charge pump circuit, a loop filter and a clock output unit. The clock comparison unit is connected with the clock output unit, the charge pump circuit and the time / analog conversion circuit; the biasing circuit is connected with the charge pump circuit and the time / analog conversion circuit; the time / analog conversion circuit is connected with the compensation charge pump circuit; the loop filter is connected with the charge pump circuit, the compensation charge pump circuit and the clock output unit. According to the phase synchronization circuit and the expansion structure thereof, time information can be directly converted into voltage for leakage current compensation, so that comparison action based on the voltage is not needed, and analog circuits such as an integrated operational amplifier and a voltage comparator are not needed. Therefore, it is possible to suppress an increase in the chip area of the compensation circuit and to reduce the phase error of the output clock.

The invention discloses a self-powered synchronous rectification active bridge, a control method thereof and a power supply system. An active bridge belongs to the technical field of power electronics and comprises a full-bridge rectifying circuit composed of four switching devices, a self-powered circuit taking electricity from an alternating current input end and a control circuit. And the control circuit detects an alternating current input phase, generates a driving signal with dead time, and controls the switching device to be alternately conducted in positive and negative half cycles to realize synchronous rectification. The self-powered circuit is preferably a charge pump, and an external auxiliary power supply is not needed. Through integration of synchronous rectification, self-power supply and intelligent control, the rectification efficiency and the power density are remarkably improved, a traditional rectifier bridge is conveniently and directly replaced through the modular design, and the high-power rectifier bridge can be widely applied to high-power scenes.

The present disclosure describes a charge pump circuit, comprising a first switch, a second switch and a flying capacitor. The first switch receives driving voltage when the clock signal is at the first level, while the second switch receives driving voltage at the second level. The flying capacitor charges via the first switch and discharges via the second switch to generate the output voltage. When the power supply voltage is lower than the preset output voltage, the driving voltage for the first switch is lower than that for the second switch. The present disclosure adaptively regulates the current-carrying capabilities of the first and second switches in accordance with the magnitude of the power supply voltage to ensure that the voltage difference across the flying capacitor is less affected by changes in the power supply voltage, thereby enhancing circuit stability.

The invention discloses a reconfigurable charge pump circuit applied to a radio frequency energy acquisition system. The reconfigurable charge pump circuit comprises a charge pump clock generation module, a multi-stage charge pump, a field effect transistor switch module, an intermediate node voltage detection module and an output voltage stabilization module, dC voltages of the radio frequency rectifier under different input power conditions are received, the DC voltages are boosted into output signals of the multi-stage charge pump through the multi-stage charge pump, and power is supplied to subsequent loads through the output voltage stabilization module; the intermediate node voltage detection module detects the node voltage between the first two stages of charge pumps and the second two stages of charge pumps, and generates different enable signals to control the field effect transistor switch module according to whether the node voltage exceeds a threshold value or not, so that switching of the charge pumps in different working stages is realized, and reconfiguration is realized. According to the invention, stable output voltage can be obtained under the conditions of low input voltage and high input voltage, good output performance is shown, and the circuit is very suitable for the condition of input power fluctuation of a radio frequency energy acquisition system.

The invention discloses a substrate selection circuit with a switching tube threshold voltage adjusting function based on an NMOS switching tube, and relates to the technical field of integrated circuit switches, the substrate selection circuit comprises the NMOS switching tube and a boost charge pump BOOST, the NMOS switching tube comprises an NMOS switching tube grid electrode, an NMOS switching tube drain electrode, an NMOS switching tube source electrode and an NMOS switching tube substrate, the input end of the NMOS switching tube is connected in parallel with a switch S0 and a switch S1, and the input end of the NMOS switching tube is connected in parallel with the switch S1. A substrate of the NMOS switch tube is connected to one end of the switch S3, a source electrode of the NMOS switch tube is connected with an input signal VIN, the substrate of the NMOS switch tube is connected with the switch S2 and the switch S3 in parallel, an input end of the boost charge pump BOOST is connected with the input signal VIN, and an output end of the boost charge pump BOOST is connected with one end of the switch S0; the NMOS switching tube is used as a switching tube, the on-resistance is reduced compared with the PMOS under the same condition, and the substrate is connected with the output end during conduction, so that the threshold voltage is further reduced, and the on-resistance is reduced.

This application discloses an automatic calibration circuit and method for mismatch compensation current of a phase-locked loop (PLL) charge pump, relating to the field of integrated circuit technology. The calibration circuit includes: a frequency and phase detector, a charge pump, an XOR module, a filter capacitor, a digital-to-analog converter (DAC) module, and a digital logic state machine. The first output terminal of the frequency and phase detector is connected to the first input terminal of the charge pump and the first input terminal of the XOR module, respectively. The second output terminal of the frequency and phase detector is connected to the second input terminal of the charge pump and the second input terminal of the XOR module, respectively. The output terminal of the XOR module is connected to the first terminal of the filter capacitor and the input terminal of the DAC module, and the second terminal of the filter capacitor is grounded. The output terminal of the DAC module is connected to the input terminal of the digital logic state machine, and the output terminal of the digital logic state machine is connected to the third input terminal of the charge pump. The output terminal of the charge pump is used to connect to the input terminal of the low-pass filter in the PLL. This application can compensate for the mismatch current of the charge pump in real time.

Provided in the present invention is a driver circuit for driving an input power transistor in a charge pump. The input power transistor of the charge pump is an NMOS transistor, which reduces the conduction loss, a source electrode of the input power transistor receives an input voltage, and a drain electrode of the input power transistor is coupled to a first end of a flying capacitor; a gate electrode of a high-side source-follower NMOS transistor of the driver circuit receives an adjustable reference voltage, a drain electrode of the high-side source-follower NMOS transistor is coupled to an output end of the charge pump, and a source electrode of the high-side source-follower NMOS transistor is coupled to a drain electrode of a low-side source-follower NMOS transistor; a source electrode of the low-side source-follower NMOS transistor is coupled to a drain electrode of a pull-down NMOS transistor, and a gate electrode of the low-side source-follower NMOS transistor is coupled to a gate electrode of the pull-down NMOS transistor; and the gate electrode of the pull-down NMOS transistor also receives an input power transistor control signal by means of a driver, a source electrode of the pull-down NMOS transistor is coupled to the first end of the flying capacitor, and the drain electrode of the pull-down NMOS transistor is also coupled to a gate electrode of the input power transistor. The present invention changes the output voltage of the charge pump by means of adjusting the voltage value of the adjustable reference voltage; and the driver circuit of the present invention directly receives the input voltage, thereby reducing the area of the charge pump.

This disclosure provides a DC-DC converter and chip, wherein the DC-DC converter includes a bootstrap boost circuit, a charge pump boost circuit, a high-side drive circuit, a low-side drive circuit, a high-side power transistor, and a low-side power transistor. The bootstrap boost circuit provides a first boost voltage to the high-side drive circuit. The high-side drive circuit outputs a first high-side drive voltage to the control electrode of the high-side power transistor based on the first boost voltage. The charge pump boost circuit generates a second boost voltage through a charge pump and outputs a second high-side drive voltage to the control electrode of the high-side power transistor based on the second boost voltage. The second boost voltage is greater than the first boost voltage. The first electrode of the high-side power transistor is coupled to the input voltage terminal, and the second electrode is coupled to the first electrode of the low-side power transistor via a switching node. The high-side power transistor is turned on or off according to the first and second high-side drive voltages. One end of the bootstrap boost circuit and one end of the charge pump boost circuit are respectively coupled to the switching node.

The invention provides a charging circuit, a charging method and electronic equipment, and relates to the technical field of charging. The charging circuit comprises a controller and a power output circuit connected with the controller. Wherein the power supply output circuit has a constant voltage output state and a constant current output state, and comprises a charge pump and an adjusting circuit; the input end of the charge pump is connected with an external power supply; the output end of the charge pump is connected with the adjusting circuit; the adjusting circuit is used for adjusting the output of the charge pump to be constant-voltage output or constant-current output; the controller is used for controlling the power output circuit to be switched between a constant voltage output state and a constant current output state. According to the charging circuit provided by the embodiment of the invention, the power supply output circuit can perform constant voltage output or constant current output to the outside through the adjusting circuit connected in series with the charge pump, so that the requirements on the charging circuit in different charging processes are met, and the size and the manufacturing cost of the charging circuit are remarkably reduced.