2134 results about "A d converter" patented technology

The invention relates to the technical field of power equipment state detection, in particular to an ultrahigh-frequency partial discharge online detection system, method and device and a medium, and the system comprises the steps: collecting an initial discharge signal in real time through an ultrahigh-frequency sensor array, and carrying out the preprocessing of the initial discharge signal, so as to obtain an ultrahigh-frequency discharge signal; carrying out peak detection on the ultrahigh-frequency discharge signal, and triggering a high-speed analog-to-digital converter to collect an original waveform when the amplitude exceeds a preset threshold value; performing multi-dimensional feature extraction on the original waveform by using a digital signal processor to obtain multiple groups of dimensional features; identifying and classifying the multiple groups of dimension features based on a random forest algorithm, generating discharge type labels and confidence coefficients, and storing the discharge type labels and the confidence coefficients in a dynamic database; carrying out spatial position calculation on the ultrahigh-frequency discharge signal by adopting a time difference method, and determining a three-dimensional coordinate of a discharge source; the dynamic database and the three-dimensional coordinates of the discharge source are subjected to space-time correlation and multi-dimensional analysis, a defect analysis result is generated, and high-precision online detection of the partial discharge defect of the high-voltage equipment is achieved.

The present disclosure involves a medical device. The medical device includes an elongate cable assembly having a distal connector, a proximal connector, and a cable body coupling the proximal and distal connectors. The distal connector is configured for coupling with a diagnostic medical device. The proximal connector is configured for coupling with a medical measurement system. An electronic component is located inside the distal connector or the associated cable housing. The electronic component includes an analog-to-digital converter (ADC) and a microprocessor. The ADC is configured to receive medical data gathered by the diagnostic medical device and convert the medical data into digital signals. The microprocessor is coupled to an output of the ADC and configured to process the digital signals into a format that is readable by the medical measurement system.

The invention provides a laser radar ranging method based on parallel detection, which relates to the technical field of laser radar ranging, and comprises the following steps: generating N lasers with different wavelengths, splitting beams by a beam splitter, separating optical channels with N independent wavelengths by a demultiplexer, performing frequency shift processing, combining N paths of optical signals after frequency shift through a beam combiner, and combining the N paths of optical signals after frequency shift through a beam splitter; generating a beam of composite reference light containing N wavelengths, wherein each wavelength has a specific frequency shift; signal light returned from a target and the composite reference light are jointly input into a coupler for frequency mixing so as to generate an optical beat frequency signal, and operation processing is performed to calculate the target distance and the target radial speed corresponding to each wavelength. According to the laser radar ranging method provided by the invention, parallel detection of the laser radar can be realized, beat frequency signals corresponding to a plurality of different wavelengths can be distinguished only by integrating a group of detectors, a cross-group amplifier and an analog-to-digital converter, the cost is greatly reduced, and the complexity of the system is reduced.

This invention relates to a system and method for calibrating energy meters, designed to enhance the accuracy of electrical power measurements. The system incorporates a computing device with specialized calibration software, interfaced with multiple energy meters via a network switch. Each energy meter is equipped with a CPU and DSP, facilitating precise phase angle measurements. A configurable three-phase reference source, connected via power cables, supplies standard calibration signals to the meters. The DSP measures phase angles based on calibration commands triggered by control signals received by the CPU. These measurements are then transmitted to the computing device, which calculates necessary offset corrections. The corrections are subsequently communicated back to the CPU for adjustment of the energy meters' analog-to-digital converter settings, thereby ensuring the meters' outputs are accurately aligned with calibrated standards. This system provides a robust framework for reliable, high-precision energy meter calibration.

The invention provides an infrared image sensor and a pixel-level reading circuit thereof, and relates to the field of infrared image sensors. The pixel-level reading circuit is integrated in a single pixel unit, and comprises a direct injection input-level circuit used for converting an infrared light-generated current generated by an infrared image sensor into an analog voltage signal; the pulse frequency modulation analog-to-digital converter is connected with the direct injection input stage circuit and is used for converting the analog voltage signal into a pulse signal; the SR latch is electrically connected with the pulse frequency modulation analog-to-digital converter and is used for carrying out accumulative counting on the pulse signals so as to form digital code words reflecting the infrared light intensity; and the digital logic control unit is electrically connected with the SR latch and is used for transmitting the digital code word to a reading bus of the infrared image sensor, so that the output of a digital signal is realized, and the reading rate of the image sensor is improved.

The invention provides an optical sensing measurement method based on closed-loop adjustment of LED driving, and relates to the technical field of optical sensing. The method comprises the following steps: initializing a system; the microcontroller reads a current value of the analog-to-digital converter and calculates an error; calculating a new set value of the driving current of the light emitting diode according to the error; the microcontroller outputs the new set value to the digital-to-analog converter, the digital-to-analog converter controls the driving circuit to adjust the driving current of the light emitting diode, and after a preset time period, the current value of the analog-to-digital converter is collected; repeating the steps, when the error absolute value is smaller than a preset threshold value, judging that closed-loop convergence occurs, and recording the driving current at the moment and the current value of the analog-to-digital converter as measurement results; and obtaining the sample concentration according to the calibration curve and the driving current in the measurement result. According to the scheme, the dynamic range and the low-concentration precision are remarkably improved, LED aging and temperature excursion are inhibited, the circuit is simplified, and multiple groups of current-limiting resistors and multi-gear change-over switches are not needed.

The invention provides a peak prediction method and system for fault current, and the method comprises the steps: obtaining a target current change rate of a power grid when the power grid breaks down, constructing a DC component and an AC component of the fault current based on the target current change rate and a preset trapezoidal integral algorithm, and carrying out the prediction of the peak value of the fault current; when the target current change rate meets the triggering condition of the all-phase composite triggering module, controlling the analog-to-digital converter to be switched from the first sampling frequency to a second sampling frequency, and collecting at least two pieces of sampling data based on the second sampling frequency; and performing parameter fitting processing on the at least two pieces of sampling data to obtain transient model parameters of the fault current, and performing peak prediction on the fault current by using the direct-current component, the alternating-current component and the transient model parameters to obtain a peak value of the fault current. Dynamic switching of the sampling frequency is realized through the all-phase composite trigger module, and a trapezoidal integral algorithm and a parameter fitting technology are combined, so that the transient response speed is effectively improved, a trigger blind area is eliminated, and the prediction precision is improved.

The invention provides a single-ended input successive approximation analog-to-digital converter and an optical module chip. In a sampling stage, upper electrode plates of a plurality of first capacitors are connected with an input voltage Vin, part of lower electrode plates are connected with the input voltage Vin, and part of the lower electrode plates are connected with a reference voltage Vref; the upper electrode plates of the plurality of second capacitors are connected with a reference voltage Vref, part of the lower electrode plates are connected with an input voltage Vin, and part of the lower electrode plates are connected with the reference voltage Vref; in the pre-switching stage, an upper pole plate switch is switched off, and lower pole plate voltages of the multiple first capacitors and the multiple second capacitors are switched according to a preset mode, so that the upper pole plate voltages of the multiple first capacitors are all changed into a first preset voltage Vp, and the upper pole plate voltages of the multiple second capacitors are all changed into a second preset voltage Vn; in the comparison stage, the first preset voltage Vp and the second preset voltage Vn are input into the comparator for first-stage comparison. Through preset switching logic, single-ended analog-to-digital converter input can be converted into differential comparator input.

The invention belongs to the field of storage, and discloses a high-energy-efficiency mixed-precision charge domain in-storage computing architecture and a working method thereof. Comprising a single-slope analog-to-digital converter, a sparsity perception input alignment module, a multi-bit input accumulation module, a controller and an accumulation module, wherein the single-slope analog-to-digital converter consists of an index calculation array, a mantissa calculation array, a shared ramp voltage generator and a bidirectional counter. According to the invention, serial input binary coding based on capacitor voltage is suitable for floating point and integer multiply-accumulate operation with flexible bit width; according to the invention, a shared single-slope analog-to-digital converter (SS-ADC) is introduced to realize maximum index search and index difference calculation; according to the method, a sparsity perception calculation scheme is provided, low-importance input-weight pairs are filtered out through an adjustable threshold value, and invalid power consumption is reduced; according to the method, a multi-bit input accumulation method is further combined, and an ADC redundancy optimization quantization and normalization process is utilized, so that the overall energy efficiency is improved.

The invention discloses an MEMS resonator low ripple error temperature measurement system based on voltage feedback compensation, and the system comprises a trans-impedance amplifier, an analog-to-digital converter, a frequency detection module, a PI controller, a variable gain amplifier, a Schmitt trigger, a first digital-to-analog converter, a biasing circuit, mode switches S1 and S2, and a voltage feedback compensation loop. The compensation loop comprises an amplitude detection module, a lookup table, a second digital-to-analog converter and an adder; the amplitude detection module receives the digital signal from the analog-to-digital converter and outputs a vibration amplitude signal in real time; the lookup table receives the vibration amplitude signal, inquires and outputs a corresponding digital compensation voltage, and converts the digital compensation voltage into an analog voltage through a second digital-to-analog converter; the adder adds the analog voltage and a fixed bias voltage to generate a dynamic bias voltage and applies the dynamic bias voltage to a drive electrode of the MEMS resonator. According to the system, an amplitude-driving end bias voltage feedback compensation loop is introduced, so that the periodic ripples of the resonant frequency are effectively suppressed.

Systems and methods for direct-to-RF (radio frequency) software-defined radio implementation of an active load-pull system are provided. A system may include a controller, a primary field-programmable gate array (FPGA) to control and collect waveform data from vector signal analyzers (VSAs), each comprising an analog-to-digital converter (ADC) connected to an ADC signal-conditioning circuit to directly capture RF measurements of an input signal at an RF fundamental frequency of test and harmonics, each ADC signal-conditioning circuit altering a signal amplitude and isolating a wanted RF frequency of measurement at either the RF fundamental frequency of test or a harmonic to be received by its ADC, first and second couplers generating each input signal by extracting forward and reverse traveling waves at RF from input and output ports of a device under test (DUT), the VSAs capturing the input signals directly at the RF fundamental frequency of test or a harmonic.

The invention relates to a clock delay circuit for reducing interleaving distortion of a time interleaving pipeline ADC, and belongs to the field of analog-to-digital converters. Comprising a four-channel time-interleaved sampling switched capacitor array, an allowance amplifier module and four groups of delay control circuits, the four-channel time-interleaved sampling switched capacitor array comprises four sampling switched capacitor arrays which are connected in parallel; the four sampling switch capacitor arrays connected in parallel are all communicated with the allowance amplifier module; each group of delay control circuits is correspondingly connected with one sampling switch capacitor array; the delay control circuit comprises a clock generation circuit and a programmable current source array; the programmable current source array is connected with the clock generation circuit; the output end of the clock generation circuit is connected with the corresponding sampling switch capacitor array; according to the invention, the effect of reducing interleaving distortion in the four-channel time-interleaving pipeline analog-to-digital converter is realized, and the performance of the whole analog-to-digital converter is further improved.

An error correction method for a successive approximation register analog-to-digital converter and a successive approximation register analog-to-digital converter (SAR ADC) are disclosed, which relate to integrated circuit technology. The successive approximation register analog-to-digital converter error correction method includes the following steps: a. detecting whether a comparator completes a data comparison within a specified time; if so, performing step b; if not, performing step c; b. after the comparator outputs data, starting a next data comparison cycle, and returning to step a; and c. interrupting the conversion, waiting for a signal to start a next conversion, starting the next data comparison cycle, and returning to step a. The method and SAR ADC can effectively prevent problems relating to (1) slow comparator speed caused by dead voltage and (2) burr interference.

The invention belongs to the technical field of nuclear power, and particularly relates to a nuclear power plant vibration measurement method and device based on a dynamic range technology. Comprising the following steps: sampling vibration signals after gain amplification by using a plurality of analog-to-digital converters with different measuring ranges to obtain an initial digital sequence; the initial digital sequence comprises a signal amplitude; performing amplitude region division on the initial digital sequence according to the magnitude of the signal amplitude to obtain a plurality of signal segments in different amplitude regions, and endowing the analog-to-digital converter with a target weight according to the saturation of the signal segments in the measuring range of each analog-to-digital converter; the saturation is the ratio of the signal amplitude to the upper limit of the measuring range of the analog-to-digital converter; the target weight comprises sub-weights respectively corresponding to a plurality of different signal segments of the analog-to-digital converter; and performing weighted fusion and splicing on the signal segments based on the sub-weights of the analog-to-digital converters in the different signal segments to obtain a target sampling signal.

The invention discloses a temperature sensor, a temperature acquisition device and electronic equipment, in the temperature sensor, a temperature sensing current generation module responds to target temperature change, and provides a first current signal with a positive temperature coefficient for a current conversion module; the current conversion module converts the first current signal into a first voltage signal with a negative temperature coefficient and generates and outputs a second voltage signal to the voltage regulation module according to the first voltage signal, and the voltage value of the second voltage signal is an integral multiple of the voltage value of the first voltage signal; the voltage regulation module receives the second voltage signal and outputs a third voltage signal to the analog-to-digital converter, and the voltage value of the third voltage signal is smaller than that of the second voltage signal; the analog-to-digital converter receives the third voltage signal and outputs a target digital signal, and the target digital signal is used for representing the temperature measured by the temperature sensing front-end circuit. According to the arrangement, the accuracy of temperature detection can be improved, and the temperature sensor is high in accuracy, small in size and low in power consumption.

The invention relates to the technical field of amplifiers, and discloses an analog-to-digital converter combination instrument amplifier which comprises a first-stage amplifier, the first-stage amplifier is in signal connection with a second-stage amplifier, the second-stage amplifier is in signal connection with a front-end low-pass filter (LPF), the front-end low-pass filter (LPF) is in signal connection with an analog-to-digital converter (ADC), and the analog-to-digital converter (ADC) is in signal connection with the analog-to-digital converter. And an unbalanced input-to-balanced differential circuit output module is arranged between the second-stage amplifier signal and a front-end low-pass filter (LPF). From the perspective of signal processing and conversion, a precise signal transition bridge is constructed by adding an unbalanced input-to-balanced differential circuit output module, unbalanced signals output by a second-stage amplifier are converted into double-end balanced differential signals, common-mode noise interference is effectively resisted through a differential transmission mode, the signal purity is guaranteed, and the signal quality is improved. The front-end low-pass filter and the analog-to-digital converter are adaptive to differential signals, so that the signal transmission is stable and anti-interference, and the analog-to-digital conversion is more accurate.

The invention relates to the technical field of switching power supply analog control, in particular to a control method and system for a small-duty-ratio BOOST module based on digital control, and the method comprises the following steps: S1, carrying out the sampling of the equal-proportion reduced output voltage of an operational amplifier through an ADC analog-to-digital converter, processing the sampled voltage value through a filtering algorithm to obtain an output voltage VO; and S2, carrying out calculation processing on the output voltage VO through a PID control algorithm, and obtaining an expected output voltage through a fixed-frequency adjustment duty ratio PWM and a fixed-duty ratio frequency modulation PFM. Efficient and stable voltage boosting is achieved through double-closed-loop digital control, dynamic response and anti-interference capacity are achieved, the core lies in collaborative design of power conversion and a control strategy, input direct-current voltage is boosted to higher stable output voltage, a double-closed-loop (voltage loop + current loop) control strategy is adopted, and the voltage boosting effect is achieved. And closed-loop adjustment is realized by combining PWM driving and ADC sampling.

The invention relates to the technical field of photoelectric detection, in particular to a global self-defined sampling method based on a germanium-silicon photoelectric detector array, which comprises the following steps of: S1, constructing the germanium-silicon photoelectric detector array with an n * t specification, receiving a target optical signal by using each detector unit as a pixel point, converting the target optical signal into an initial current signal, the signal is linearly amplified into a voltage signal through an external transimpedance amplifier; s2, digitalizing the voltage signal into a binary discrete digital signal through a high-speed analog-to-digital converter at the output end of the trans-impedance amplifier; and S3, performing global synchronous sampling to obtain a first group of data, performing repeated sampling in the same mode to obtain multiple groups of data, performing pixel-by-pixel superposition to generate fused data, and performing user-defined setting on the repeated sampling frequency within 1-1024 times. By customizing the number of repeated sampling times and data superposition, adapting to different light intensities and expanding the detection dynamic range, the problems of strong light overexposure and weak light underexposure are solved, the data consistency is guaranteed in combination with global synchronous sampling, and the detection precision and the environmental adaptability are improved.

The invention provides a high-precision low-delay successive approximation analog-to-digital converter based on sampling noise elimination, and the analog-to-digital converter comprises a main capacitor group which generates an original combined signal according to an original sampling signal and primary sampling noise in a secondary sampling stage; the pre-quantization capacitor bank is used for driving a bottom plate switch of the pre-quantization capacitor bank according to the detection control signal, switching a capacitor weight through a weight control signal to execute pre-quantization operation on the original combined signal and outputting a swing suppression signal; the novel sampling noise elimination module is used for receiving the swing suppression signal, performing gain amplification, generating a purification amplification signal, detecting the differential swing of the original combined signal in real time, and generating a detection control signal and a pre-quantization code according to the differential swing; the successive approximation quantization module is used for generating a main quantization code and a weight control signal according to the purification and amplification signal in a quantization stage; and the digital processing module is used for fusing the pre-quantized code and the main quantized code to obtain a final digital code. And the energy efficiency and the conversion precision of analog signal conversion are obviously improved.

The invention discloses a logarithmic pixel signal quantization method and module based on gain dynamic adjustment, and an image sensor. The logarithmic pixel signal quantization method comprises the following steps of: converting light current into logarithmic voltage by logarithmic amplification by using a logarithmic response unit; the voltage type comparator compares the logarithmic voltage with a threshold voltage, outputs a gain regulation and control signal for gain configuration of the programmable gain amplifier and input reference voltage switching, enables the programmable gain amplifier to work in different gain modes, and inputs a flag bit to the N-bit analog-to-digital converter; based on the current gain mode, the programmable gain amplifier amplifies the logarithmic voltage and translates the logarithmic voltage into the quantization range of the N-bit analog-to-digital converter to be output; the N-bit analog-to-digital converter samples an output voltage signal of the programmable gain amplifier, combines the output voltage signal with a flag bit, and outputs an N + 1-bit equivalent digital code value signal. According to the invention, high-sensitivity quantization of low-light-intensity signals and high-precision conversion of high-light-intensity signals are realized at the same time.

The present invention relates to techniques for detection of depression cues in EEG signals using power spectral density-based features for deep learning. In an embodiment, a system for detecting depression in a person may comprise an Electroencephalogram (EEG) electrode array attached to the person, the EEG electrode array comprising at least ten electrodes adapted to read EEG signals, an amplifier, a filter, and an Analog to Digital Convert to digitize the read EEG signals, and computing circuitry comprising a processor, memory accessible by the processor, and computer program instructions stored in the memory and executable by the processor to perform: processing on the digitized read EEG signals to detect signal patterns indicative of depression in the person, and outputting a prediction indicating a likelihood of depression in the person based on the deep learning processing.

An analog-to-digital converter, ADC, is provided. The ADC comprises multiple time-interleaved sub-ADCs, a detection circuit, and a calibration circuit. The sub-ADCs are configured to, when the ADC is in a calibration mode, generate a first signal by sampling a calibration signal based on a first clock signal and at least a second clock signal. The first clock signal comprises a phase shift relative to the second clock signal. The calibration circuit is configured to determine a first mismatch between the phase shift and a phase shift threshold based on the first signal. The detection circuit is configured to, when the ADC is in an operation mode, generate a second signal by sampling one of a biased signal to be received by the sub-ADCs or a second calibration signal based on at least one of the first clock signal and the second clock signal. The calibration circuit is configured to determine a second mismatch between the phase shift and the phase shift threshold based on the second signal and calibrate the ADC based on the first and the second mismatch.

The present disclosure generally relates to a test and / or measurement instrument and a method for determining a power of an input signal. The test and / or measurement instrument includes at least one input for receiving an input signal, at least one acquisition circuit, and at least one analysis circuit. The at least one acquisition circuit includes at least one analog-to-digital converter configured to provide a digital signal comprising multiple samples. The at least one analysis circuit is configured to separate different samples of the digital signal into at least two partitions, to transform signal portions of the at least two partitions into frequency domain, to determine for the different transformed signal portions an average part and a variance part, and to determine a constant part of the digital signal by compensating the average part with the variance part.

The invention relates to the technical field of analog and digital-analog hybrid integrated circuits, and discloses a bootstrap sampling switch circuit with a pre-charging function and an analog-to-digital converter. The circuit comprises a sampling switch module and a time sequence control module. The sampling switch module sequentially works at a holding phase, a pre-charging phase and a tracking phase under the control of a multi-phase clock signal generated by the time sequence control module, the pre-charging phase is added before the tracking phase, the grid voltage of a sampling switch is pre-boosted, and the pre-charging time is dynamically controlled by using an adjustable clock circuit, so that the pre-charging time of the sampling switch is dynamically controlled. Therefore, the charge sharing effect caused by the gate parasitic capacitance is effectively suppressed. The analog-to-digital converter comprises the sampling switch circuit. The linearity and the conduction characteristic of the sampling switch are remarkably improved, and the sampling switch has excellent time sequence configurability and is suitable for a high-speed and high-precision analog-to-digital conversion system.

The invention relates to the technical field of power system monitoring, discloses an anti-harmonic PT current monitoring system and method, and aims to solve the problem of secondary side current signal distortion of a voltage transformer caused by power grid harmonic pollution in the prior art. The method comprises the steps of electrifying and initializing a system, starting a high-speed analog-to-digital converter to acquire a voltage signal, executing fast Fourier transform to identify dominant harmonic waves, calculating and configuring a capacitance value of a tunable LC trap unit to suppress specific harmonic waves, and finally outputting a high-fidelity analog voltage signal in direct proportion to fundamental current. The system comprises a current-voltage conversion module, a tunable LC notch filter array, a high-speed analog-to-digital converter, a digital signal processing unit and a microcontroller. According to the technical scheme, dynamic self-adaptive suppression and precise selective harmonic wave blocking of power grid harmonic waves can be realized, low delay and high fidelity characteristics are guaranteed, and the engineering practicability and reliability of the system are improved.

Certain aspects of the present disclosure provide techniques and apparatus for digital-to-analog conversion. An example apparatus generally includes a digital-to-analog converter (DAC), an incremental analog-to-digital converter (IADC) having a first input coupled to a first output of the DAC, and a controller coupled to the DAC and the IADC. The controller is configured to determine a direct current (DC) offset associated with the DAC using the IADC and control a mission-mode digital input signal of the DAC based on the DC offset.

The invention provides an electroencephalogram collecting system which comprises a plurality of electroencephalogram electrodes connected to the brain of a living body to detect electroencephalogram signals. The acquisition module is correspondingly connected with the electroencephalogram electrodes so as to acquire electroencephalogram signals and preprocess the electroencephalogram signals; the acquisition module comprises at least one electroencephalogram acquisition sub-module, and the electroencephalogram acquisition sub-module is integrated with an amplifier, a multiplexer and an analog-to-digital converter; the main control module is used for carrying out secondary processing on the electroencephalogram signals and comprises a logic control unit and a processing unit; the logic control unit is connected with the acquisition module; and the processing unit is connected with a management terminal so as to configure parameters of the logic control unit and send the electroencephalogram signals subjected to secondary processing to the management terminal. According to the electroencephalogram acquisition system, the acquisition module and the main control module are integrated, so that electroencephalogram acquisition can be realized without a sickbed, and the portability and the flexibility of the electroencephalogram acquisition system are improved.

The utility model discloses a dynamic signal acquisition circuit based on an FPGA kernel, and belongs to the technical field of signal acquisition. Comprising a field programmable gate array (FPGA) which is connected with a first synchronous dynamic random access memory (SDRAM), an ARM processor and a plurality of analog-to-digital converters (ADC). The input end of the analog-to-digital converter ADC is connected with the output end of the signal conditioning board; the input end of the signal conditioning board is connected with the dynamic acceleration sensor, the strain sensor and the displacement sensor and receives signals output by the sensors; the ARM processor is connected with a nonvolatile storage device FLASH and a second synchronous dynamic random access memory SDRAM; and the field programmable gate array FPGA is used for filtering and converting the acquired data and transmitting the data to the ARM processor. According to the utility model, synchronous acquisition, synchronous processing, synchronous analysis and synchronous transmission can be realized; the signal conditioning circuit adopts a modular design and can be compatible with sensors of various dynamic signals.

The invention relates to the technical field of digital filters, and discloses a quantization sensing wide linear minimum error mode adaptive filter, which performs non-uniform low-bit quantization on an input signal and an expected signal by using a quantization parameter to obtain a corresponding quantization value; constructing a linear factor based on the quantization parameter; based on the non-roundness of the input signal, constructing a normalized correlation matrix of the input signal and the linearized error signal, and constructing a compensation matrix in combination with a linear factor; obtaining input signal quantized values at a current moment and a historical moment, constructing an augmented input signal vector, calculating a product of the augmented input signal vector and the compensation matrix, and constructing a corrected input vector; performing wide linear filtering on the corrected input vector to obtain an output signal, and calculating an error signal in combination with an expected signal quantized value; and updating the weight vector at the next moment by using the corrected input vector and the error signal. According to the invention, by introducing a non-uniform low-bit quantization and deviation compensation mechanism, the cost and energy consumption of the analog-to-digital converter are remarkably reduced, and a relatively low steady-state error is kept.

The present disclosure relates to an NFC device configured for wireless power transfer, the NFC device comprising an antenna, a frontend circuit coupled to the antenna, a microcontroller coupled to the frontend circuit, the microcontroller comprising an analog-to-digital converter. The analog-to-digital converter is configured to receive an analog amplitude and / or phase signal from the frontend circuit, and to convert the analog signal into a digital signal. The microcontroller is configured to process the digital signal in order to detect a variation in the amplitude and / or phase of the analog signal, so as to detect a change of impedance within the field of the NFC device.