1042results about How to "Improve storage density" patented technology

A disk drive is disclosed that utilizes multi-tiered solid state memory for caching data received from a host. Data can be stored in a memory tier that can provide the required performance at a low cost. For example, multi-level cell (MLC) memory can be used to store data that is frequently read but infrequently written. As another example, single-level cell (SLC) memory can be used to store data that is frequently written. Improved performance, reduced costs, and improved power consumption can thereby be attained.

An inventory control and prescription management and dispensing system including a dispensing vault for storing and dispensing prescriptions, the dispensing vault in communication with a central computer system that, in turn, communicates with prescription providers, insurance companies, and other third parties; the dispensing vault including robotic means for randomly accessing pre-filled prescriptions within the vault, with the vault further including RFID, bar code, and other means for verifying the content and internal location of pre-filled prescriptions; a customer interface that uses customer biometrics to ID a customer to ensure that prescriptions are only dispensed to the correct person; a patient registration system in communication with the central computer system for collecting insurance, doctor, biometric, and other information to facilitate transactions; a labeling system for labeling pre-filled prescriptions with customer specific information upon dispensing; transport container that integrate into the dispensing vault and provide secure transportation from a pharmaceutical manufacturer or repackager to the dispensing vault, security provided through RFID tags which communicate with the central computer to verify that the transport container contains the correct formulary and that the integrity of the container (temperature range, time in transit, tampering) has not been compromised; a payment system integral to the dispensing vault that is in communication with third party banks and pharmacy billing management systems, credit agencies and the central computer; a verification system for ensuring that pre-filled bottles received from the manufacturer (before they are placed into the storage locations inside the vault) have not had their integrity compromised, with this system evaluating each container's weight, size, moisture content, shape, velocity change, color, pattern, and physical integrity (all comparisons made against standards stored in the central computer).

A chalcogenide phase change memory cell has a substrate with a conductor line. The conductor line has a contact end. An insulating layer is located over the substrate and conductor line. An aperture is located in the insulating layer. The aperture extends to the substrate. A memory material is conformally located within the aperture. The memory material is in electrical contact with the contact end. A conductive layer is located over the memory material in the aperture.

Multi-gate NOR flash thin-film transistor (TFT) string arrays (“multi-gate NOR string arrays”) are organized as stacks of horizontal active strips running parallel to the surface of a silicon substrate, with the TFTs in each stack being controlled by vertical local word-lines provided along one or both sidewalls of the stack of active strips. Each active strip includes at least a channel layer formed between two shared source or drain layers. Data storage in the TFTs of an active strip is provided by charge-storage elements provided between the active strip and the control gates provided by the adjacent local word-lines. Each active strip may provide TFTs that belong to one or two NOR strings, depending on whether one or both sides of the active strip are used.

An optical storage system suitable for optical storage and retrieval of information using a storage medium comprising a substrate, an active layer for retention of the data, and an overlying optical layer, or layers for double-sided. The optical layer serves to produce an evanescent field in or adjacent to the active layer in response to an incident beam of radiation. The evanescent field is frustrated or attenuated by the data in the active layer and produces a signal.

In the 3-D integrated memory (3DiM) the 3-D memory and conventional readable/writable memory and/or data processor are integrated on a chip. As compared with standalone 3D-M its global property (for example speed, finished product rate, programmability and data safety, etc.) is more excellent. Said invented 3-D integrated memory can be used in the integrated circuit test and others.

The invention relates to a circuit (20, 50) for voltage stabilization in an onboard power supply (10), particularly for motor vehicles, which is electrically connected between the onboard power supply (10) to be stabilized and a first energy store (E1). The circuit (20, 50) comprises a diode element (24) which contains a plurality of semiconductor switches (34) connected in parallel, a pilot and control circuit (33) which determines the level of a current flowing through the diode element (24) and controls the semiconductor switches (34) of the diode element (24) on the basis of the determined current level, and a second energy store (E2) which is electrically connected to the diode element (24) and to the onboard power supply (10).

A cable storage cartridge and assembly for storing an excess length of cable. The cartridge includes a rectangular carriage frame and a spool rotatably disposed inside the carriage frame. The spool is comprised of a first spool member having a radius protection loop channel on its top surface and a second spool member. Together the first spool member and second spool member define a storage chamber. The storage chamber lies in a different plane than the loop channel of the first spool member. The first spool member defines transition openings for allowing the cable to pass from the loop channel to the storage chamber. Carriage frame includes detent and catch tabs for retaining the cartridge inside a cartridge housing.

The invention discloses a transmission line malfunction early-warning method and a system based on big data driving. The transmission line malfunction early-warning method comprises the following steps: acquiring related information of a power transmission line, wherein the related information of the power transmission line comprises electricity quantity, meteorological data, malfunction even sequence information and power grid topological data; extracting characteristics of the related information of the power transmission line, and furthermore establishing a malfunction factor mining databank and a malfunction judgment characteristic bank; based on a Naive Bayes algorithm, performing malfunction factor index mining on data in a current malfunction factor mining databank, and furthermore performing abnormal state tracking on an abnormal malfunction factor; transmitting the malfunction factor index of the abnormal malfunction factor to the malfunction judgment characteristic bank, matching an early-warning information time sequence generated in real time inside the malfunction judgment characteristic bank with a preset malfunction standard time sequence on the basis of a time sequence similarity malfunction matching method, outputting early-warning information corresponding to the matched early-warning information time sequences, and performing early-warning of malfunctions.

The invention discloses a method for realizing energy-saving storing of a hybrid main storage. The method comprises the following steps: constructing the hybrid main storage taking a phase change storage as a main storage and a dynamic random storage as a buffer storage, designing a read-write policy adapting to the structure of the main storage, and reading and writing data in a disc and the phase change storage according to the read-write policy. The invention ensures that the structure of the original main storage is improved, and fully utilizes the advantages of high capacity and low power consumption of the phase change storage and the characteristic of low time delay of the dynamic random storage, so that the hybrid main storage acquires higher capacity on the premise that the power consumption and the time delay are not increased, thereby reducing the times of accessing the disc and realizing energy saving in storing.

The invention relates to a semiconductor memory having a multiplicity of fins made of semiconductor material which are spaced apart from one another, a multiplicity of channel regions and contact regions being formed in each of the fins, a multiplicity of word lines, a multiplicity of storage layers, at least one of the storage layers being arranged between each of the channel regions and the word line, and a multiplicity of bit lines, the longitudinal axes of first bit line portions running parallel to a first bit line direction and the longitudinal axes of second bit line portions running parallel to a second bit line direction, the second bit line direction being rotated relative to the first bit line direction, each of the bit lines being electrically connected to a multiplicity of the contact regions, wherein, between two contact regions of the same fin that are connected to one of the bit lines, a contact region is not connected to the respective bit line.

A high density memory device is fabricated three dimensionally in layers. To keep points of failure low, address decoding circuits are included within each layer so that, in addition to power and data lines, only the address signal lines need be interconnected between the layers.

A data storage device includes a memory die including a plurality of storage elements arranged in a three dimensional (3D) memory configuration and a controller die coupled to the memory die via a bus including a plurality of electrical contacts between adjacent surfaces of the memory die and the controller die. A method performed at the data storage device includes receiving, at the controller die, data to be stored at the memory die and generating a codeword representing the data. The codeword includes a particular number of bits. The method also includes sending signals from the controller die to the memory die via the plurality of electrical contacts. The plurality of electrical contacts includes at least as many electrical contacts as the particular number of bits of the codeword, and the signals representing the codeword are sent from the controller die to the memory die in parallel.