9results about How to "Lower read latency" patented technology

The invention belongs to the technical field of cloud storage, and particularly relates to an enterprise service management cloud storage system which comprises a system initialization module, a distributed data storage module, a data encryption module, an authority control module, a multi-level cache module, a data backup and recovery module, a log monitoring module and a task scheduling and dynamic extension module. The distributed data storage module is responsible for dividing data in enterprise service management into a plurality of data blocks; the data encryption module is used for encrypting the enterprise service data stored in the cloud; the authority control module is responsible for managing the access authority of the user to the data; the multi-level cache module accelerates data access by configuring a local cache and a global cache; the data backup and recovery module is responsible for backing up the stored data regularly; the log monitoring module records various operation logs of the system; and the task scheduling and dynamic extension module is used for dynamically distributing calculation and storage resources according to the priority of the task and the utilization rate of the system resources.

The invention discloses a retransmission cache structure based on UCIE, and relates to the technical field of data caching. Comprising a data receiving module, a mapping module, a pointer management module, a direct writing buffer module and a data transmission and storage module, an efficient retransmission cache structure is achieved through the UCIE adaptation layer, transmission and storage of data Flit of 68B and 256B different sizes are compatible, delay of a storage matrix is effectively reduced through the introduced buffer write-through function, read delay is reduced, the data transmission efficiency is improved, meanwhile, the resource utilization rate is improved through the structure, and the data transmission efficiency is improved. The problems that a traditional cache structure is not specific, resource utilization is insufficient and data transmission is delayed are solved. By means of the data receiving module and the token bucket algorithm, data flow is controlled, network congestion is avoided, and it is ensured that the transmission rate of data packets is reasonable.

The invention provides a key value storage system. The key value storage system comprises a data pre-reading module, a cache management module and an index adjustment module. And the data pre-reading module is used for predicting the data blocks which can be accessed in the preset time period and loading the data blocks to the cache in advance so as to reduce reading delay and disk I / O (Input / Output) operation, so that the reading efficiency is improved. The cache management module is used for monitoring the running state of the key value storage system in real time and dynamically adjusting the cache space based on the running state, it is ensured that the cache meets the high hit rate, memory use can be reasonably controlled, resource waste is avoided, and the reading performance and the response speed are further improved. The index adjusting module is used for dynamically adjusting an index structure according to the access frequency of the key value pair, reducing disk I / O operation during reading, improving the searching speed and reducing the searching cost. Therefore, according to the key value storage system, the negative influence caused by read amplification can be reduced, the response speed of the system is improved, and faster and more efficient data access experience is provided for a user.

The invention discloses a low-loss anti-aging orbital angular momentum RFID (Radio Frequency Identification Device) array antenna which sequentially comprises N array units, a first dielectric substrate, a metal grounding plate, a second dielectric substrate and a feed network from top to bottom, the N array units are in central symmetry and are distributed on the upper surface of the first layer of dielectric substrate at equal angular intervals along the circumference, the feeding amplitudes of the array units are the same, and the phase difference between two adjacent array units in the clockwise direction meets # imgabs0 #, l is an orbital angular momentum mode required by a radiation beam, and the number of the array units meets the condition that-N / 2 < l < N / 2; each array unit is of a circular structure, one or more strip-shaped gaps are additionally formed in each array unit, and the center position of each strip-shaped gap is located at the center position of the array unit; the metal grounding plate is provided with strip-shaped gaps corresponding to the center positions of the array units, the feed network feeds through the gaps in the metal grounding plate, the feed amplitudes of the array units are the same, and vortex electromagnetic waves are generated.

The invention provides a data redundancy system of a cpu heterogeneous cluster. The data redundancy system comprises data objects, virtual nodes, a copy placement mapping table, data nodes and a data distribution strategy system. The data object is mapped to the virtual nodes through the hash function, the hash function performs modular operation with the total number of the virtual nodes through the object identifier, and the virtual node to which the data object belongs is determined; the virtual nodes are mapped to the data nodes through the generated copy placement mapping table, and the virtual nodes can be copied on the multiple data nodes for multiple times; the data distribution strategy system comprises a distribution decision-making agent and a migration decision-making agent; the distribution decision-making agent and the migration decision-making agent adopt a Transform-XL model based on a DQN algorithm; the distribution decision agent is responsible for selecting data nodes and adding a mapping relation into the copy placement mapping table; and the migration decision agent is used for adding nodes or manually triggering data migration.

A system and method for analyzing a CXL microchip at a read bypass detection logic (115) to identify a bypass memory read request (108), and transmitting the identified bypass memory read request (108) directly to a transaction / application layer (135) of a CXL memory controller (100) via a read request bypass path (120), wherein the read request bypass path (120) excludes an arbitration / multiplexing layer (125) and a link layer (130) of the CXL memory controller (100), thereby reducing latency inherent in the CXL memory controller (100).

The application provides a PLC programmable cement pole intelligent automatic demolding control method, which comprises collecting mold stress, vibration frequency, servo motor torque and pole surface temperature multi-source data, mapping the vibration frequency and the mold stress into high-dimensional features by relying on a temperature-driven thermal perception sparse coding dictionary, fusing the torque and the temperature to construct a real-time data frame; reconstructing the memory layout by predicting the state transition entropy, continuously storing the high-correlation data frame to form a main operation data area, establishing an independent emergency disposal data partition to store safety control parameters; correcting the state transition matrix in real time by means of the stress and the torque, performing predictive access on the pre-fetch data cluster, and solving the optimal control sequence; the PLC issues a demolding control instruction according to the optimal sequence, calculates a normalized torque margin to implement hierarchical control: when the margin is in the early warning interval, the emergency data retrieval priority is improved and a fine tuning instruction is output, and when the margin is out of limit, emergency braking is performed to ensure the safety of the demolding operation equipment and components.

This invention relates to the field of storage system IO performance optimization technology, and provides a method and device for redirecting data aggregation, comprising: identifying random small IO data from written IO requests, aggregating and writing to backend storage objects, and constructing a storage mapping relationship in an index table; traversing backend storage objects storing random small IO data, and allocating data originating from the same logical address space to the same target backend storage object using a hash algorithm; sequentially writing the data allocated to the same target backend storage object into the contiguous physical space of the target backend storage object, and updating the mapping relationship in the index table; repeating steps S2 and S3 before reaching a preset termination trigger condition, using a different hash algorithm each time step S2 is repeated; when reading data, retrieving the storage mapping relationship from the index table, and aggregating the read requests corresponding to data located in the same backend storage object before reading them all at once.

The application discloses a memory operation system compliant with DDR memory access timing, and belongs to the field of memory and scientific calculation, comprising: a row-level parallelism driven timing termination mechanism, which utilizes row nonlinear charging characteristics to reduce tail delay of tRCD and tRP; and a row block interleaving, row-column collaborative vector-matrix multiplication (VMM) access mechanism, which reduces tRAS and overlaps CL timing parameters without increasing peripheral column ADC precision overhead, and reduces cross-point RAM internal core delay; the proposed row access and column access collaborative optimization memory hardware design can enable VMM operation compliant with DDR memory access timing in a memory-centric manner, so as to realize efficient hardware execution of low-delay, high-bit-width data-intensive scientific calculation (computational physics) loads.