693 results about "Solid-state drive" patented technology

The invention provides a solid state disk testing method and device, equipment and a medium, and relates to the technical field of hard disk detection. The test method comprises the following steps: in a process of writing data into physical areas of a to-be-tested solid state disk according to a physical address in sequence, randomly selecting at least part of areas from the physical areas written with the data at a preset time interval to perform reset operation until the physical areas reach a target area state, the target area state comprises a target filling state and a target fragmentation state; executing a read-write test on the physical region in the target region state to obtain test data; and generating a test report based on the test data.

The invention relates to the technical field of solid state disk security protection, in particular to a security protection detection method and system for a solid state disk, and the method comprises the following steps: obtaining a historical security monitoring log of the solid state disk, carrying out normalized fluctuation rule mining and reference behavior evolution, and constructing a normalized reference behavior model; identifying real-time access behavior data of the solid state disk; analyzing access modes of behavior storage units one by one according to the real-time access behavior data, and identifying real-time access behavior characteristics to generate real-time access behavior characteristics; and performing reference access deviation detection on the real-time access behavior characteristics according to the normalized reference behavior model, tracing an access position, and positioning a malicious access storage unit. Through a multi-layer and all-around intelligent protection system, the overall safety and stability of the solid state disk are improved.

A controller, of a solid state drive (SSD), may perform, on one or more blocks of a non-volatile memory device of the SSD, read operations using pre-determined threshold voltages associated with two overlapped charge states. The read operations may be performed after a power-on condition following a power-off condition on the non-volatile memory device. The controller may determine, using a machine learning model, a change in threshold voltages associated with the two overlapped charge states, after the power-off condition. The machine learning model may determine the change in threshold voltages using bit error rates associated with the read operations. The machine learning model may be trained to determine changes in threshold voltages for the two overlapped charge states, after power-off conditions. The controller may determine adjusted threshold voltages associated with the two overlapped charge states based on the change in threshold voltages.

A storage device includes a substrate, at least one data storage element, a case, and at least one sensing pin. The substrate includes at least one security pad. The data storage element is mounted on the substrate. The case surrounds the substrate and the data storage element, and includes at least one contact structure for an electrical connection with the security pad. The sensing pin receives an electrical signal. A level of the electrical signal varies by detecting a change in a resistance according to whether the security pad is electrically connected to the contact structure. When at least a part of the case is removed, a level change of the electrical signal is detected, and a secure erase process for data stored in the data storage element is performed.

A system for dynamic sequence alignment and causal analysis in business mining, consisting of a data acquisition unit configured to capture real-time event logs from multiple enterprise systems via communication interfaces, wherein the data acquisition unit includes a variety of communication interfaces, including Ethernet ports, fiber optic interfaces, and wireless transceivers, enabling data acquisition from both local and remote enterprise systems, and wherein the unit is capable of processing multiple data streams simultaneously via parallel data acquisition channels; a preprocessing unit configured to normalize and transform the captured event logs using signal processors and real-time data converters; a sequence alignment processing unit configured with a central processing unit (CPU), a graphics processing unit (GPU) and a field-programmable gate array (FPGA) to dynamically align sequences of business events using machine learning; a causal inference processing unit configured with multiple central processing units (CPUs) and neural network accelerators to analyze the aligned sequences and infer causal relationships between business events; a visualization unit configured to display the aligned sequences and results of the causal analysis on user interface devices; and a data storage unit configured with solid-state drives (SSDs) and a redundant array of independent disks (RAID) to store event logs, aligned sequences, and causal analysis data.

Methods and systems for solid state drives are provided, including assigning a first namespace to a first instance of a storage operating system and a second instance of the storage operating system for enabling read access to a first portion of a flash storage system by the first instance, and read and write access to the second instance; allocating a second namespace to the first instance for exclusive read and write access within a second portion of the flash storage system; generating, by the first instance, a request for the second instance to transfer a data object from the second portion owned by the first instance to the first portion; storing, by the second instance, the data object at the first portion; and updating metadata of the data object at the second portion, the metadata indicating a storage location at the second portion where the data object is stored.

The invention relates to the technical field of storage, and discloses a threshold voltage processing method of a solid state disk, a data reading method and related equipment. The threshold voltage processing method comprises the following steps: selecting a crystal grain in a frequent rereading state in a solid state disk as a target crystal grain; obtaining the optimal threshold voltage of the target crystal grain; and setting the optimal threshold voltage as the threshold voltage of all the blocks in the closed state in the target crystal grain. According to the method, the threshold voltage deviation problem of the solid state disk can be compensated, the read-write performance of the solid state disk under the scenes of data retention, read interference, cross temperature and the like is effectively stabilized, performance reduction and stability fluctuation caused by repeated rereading are reduced, the data reading efficiency is remarkably improved, the maintenance cost is reduced, and the service life of the solid state disk is prolonged. Reliability of the solid state disk is further improved, and service life of the disk is prolonged.

A data writing method and apparatus, a solid state drive, an electronic device, and a non-transitory readable storage medium are provided. The method includes: receiving a data writing request sent by a target object to acquire data to be written; preprocessing original data blocks in the data to be written to obtain a plurality of preprocessed data blocks of the data to be written; mirroring the plurality of preprocessed data blocks to a first partition of a target solid state drive; sending, according to a mirroring result, response information corresponding to the data to be written to the target object, where the response information includes writing state information; and writing the plurality of preprocessed data blocks to a second partition of the target solid state drive from the first partition.

A rack-mountable data storage system includes: a chassis including one or more switchboards; a midplane interfacing with the one or more switchboards; and one or more data storage devices removably coupled to the midplane using a connector. At least one data storage device of the one or more data storage devices include a logic device to interface with the midplane. The logic device provides a device-specific interface of a corresponding data storage device with the midplane. The at least one data storage device is configured using the logic device according to a first protocol based on a signal on a pin of the connector, and the at least one data storage device is reconfigurable according to a second protocol based on a change of the signal on the pin of the connector using the logic device.

The invention discloses a preheating system of a solid state disk, and relates to the technical field of storage, and the system comprises the solid state disk which is used for sending a first instruction to a power supply device when it is detected that the initial temperature value of each target area in at least one target area is smaller than or equal to the corresponding minimum working temperature value. And the power supply device is used for heating each target area according to a full-power heating mode. The solid state disk is also used for predicting a target temperature value of each target area after a preset time period; and when the difference between the target temperature value of each target area and the corresponding minimum working temperature value is smaller than the preset temperature difference value, a second instruction is sent to the power supply device. And the power supply device is used for heating each target area according to a pulse heating mode and stopping heating until the real-time temperature value of each target area is greater than the corresponding minimum working temperature value. The problems of high power consumption, high time delay, slow response and low working efficiency of the solid state disk caused by the low-temperature problem can be solved.

To allow attachment of electrolytic capacitors and other relatively large electrical circuit devices to a PCB while meeting size limitations, The PCB can include a full-through opening within which the device can be located. Along one edge of the opening, the PCB includes half-through cuts with a conductive lining extending from the opening, where the pins of the capacitor or other device can rest and form electrical connections. In addition to pins extending radially from one end of the capacitor or other device, the device includes a notch extending from the opposing end. Along the edge of the PCB opening opposing the half-through cuts for the pins, the PCB includes a half-though cut for the device's notch to rest, thereby providing mounting stability.

A module identifier and a request address associated with an access request are received at a host memory buffer (HMB) access module in a solid-state drive (SSD) system. A translated address is determined based at least in part on the module identifier and the request address, including by accessing at least one translation table that stores address mappings between (1) a plurality of processors in the SSD system and (2) a host memory buffer; each processor in the plurality of processors has a non-overlapping memory space in the host memory buffer. The access request is performed at a host interface, including by accessing the host memory buffer using the translated address, wherein the host memory buffer is located in host memory that is external to the SSD system.

The present disclosure provides a method of operating a memory system, a memory controller, a memory system, and a storage medium, and relates to the technical field of semiconductor chips. The method includes: obtaining an erase count and a hot id of each virtual block, determining a first virtual block from which data is moved and a second virtual block into which the data is moved according to the erase count and the hot id of each virtual block, and moving data stored in the first virtual block to the second virtual block. The method of operating a memory system provided by the present disclosure is intended to improve the problem that the service life of a solid state drive is shorten due to the movement of newly-written data.

The invention provides an intelligent accelerated data reading method and system for a solid state disk, and the method comprises the steps: reading basic information of each data block in the solid state disk when a data reading request is received, and constructing an information fingerprint of each data block based on the basic information; constructing an information fingerprint of request data based on the data reading request, and eliminating unmatched data blocks by adopting a Bloom filter; performing similarity calculation on the information fingerprints of the request data and the information fingerprints of the excluded data blocks by using a locality sensitive hash algorithm, and positioning the data block most similar to the request data; and reading the request data from the solid state disk according to a positioning result. According to the method and the device, unmatched data blocks are eliminated by adopting a Bloom filter; similarity calculation is carried out on the information fingerprints of the request data and the information fingerprints of the excluded data blocks, the data block most similar to the request data is positioned, and the defects of long time consumption and system resource waste during current data reading are overcome.

The invention relates to optimized garbage collection. A method of writing data to a solid state drive (SSD) configured to store data in a plurality of memory dies, each memory die comprising a plurality of memory blocks. The plurality of memory blocks are logically organized into a plurality of super blocks. The method is performed by a controller in communication with a plurality of memory dies. The method includes associating a superblock of a plurality of superblocks with a data stream of a plurality of data streams received by a write command from a host interface. The method also includes writing each data stream to a memory block of a respective superblock. The method also includes identifying the super block as a bad super block if the data stream of the memory block written to the super block does not meet the predetermined criteria. Further, the method includes performing garbage collection only on the memory blocks of the bad superblock.

An information handling system housing includes an interior frame that integrates removeable slot adapters and a garage to hold the slot adapters once separate from the frame. In one example embodiment, a slot adapter has plural support structures and screw openings with an offset bottom surface alignment pin so that insertion into openings in different device slots will support different types of devices, such as solid state drives (SSDs) and wireless network interface controllers.

This design product is used to store electronic data, and the suction cups on its surface can fix it on objects.

A solid state drive determines address mapping information based on a first flash translation layer (FTL) algorithm during a time period. The address mapping information indicates a correspondence between a logical address and a physical address of the solid state drive when processing a read / write task during the time period. Afterward, the solid state drive determines a second FTL algorithm from a plurality of FTL algorithms, and enables the target address mapping information that is determined based on the second FTL algorithm. The read / write task processed by the solid state drive during the time period are generally of a same type, and the performance of processing the read / write task during the time period based on the second FTL algorithm is higher than the performance of processing the read / write task during the time period based on the first FTL algorithm, thereby enhancing read / write performance of the solid state drive.

The utility model relates to the field of solid state disk production testing equipment, and discloses solid state disk testing equipment, which comprises a solid state disk testing machine provided with a plurality of testing ports, a testing substrate, a solid state disk limiting mechanism, a plugging driving mechanism and a plurality of testing plugging heads, the test substrate is used for fixing the solid state disk limiting mechanism and the plug-in driving mechanism, and the solid state disk limiting mechanism is located on one side of the plug-in driving mechanism and can limit a plurality of stacked solid state disks so that sockets of the solid state disks can correspond to the plug-in driving mechanism. The plurality of test plugs are horizontally and fixedly arranged on the plug driving mechanism in an independently detachable manner and are respectively connected with a plurality of test ports on the solid state disk test machine, and the plurality of test plugs are correspondingly arranged up and down and are driven by the plug driving mechanism to perform plug operation with the solid state disk limited in the solid state disk limiting mechanism. A plurality of solid state disks can be subjected to loading test or unloading at one time, the operation is simple and rapid, the efficiency is high, and the test stability is high.

The invention relates to the technical field of data storage, and discloses a method for verifying average fault-free time of a solid state disk, which comprises the following steps of: initializing a test environment of the solid state disk; a dynamic comprehensive stress model is constructed, acceleration factors are calculated based on self-adaptive parameters of reliability, in the testing process, the acceleration factors are added, different read-write load combinations are circularly switched according to set time slices, and testing of the solid state disk is accelerated; judging whether the test reaches a preset duration or a trigger fault condition; if yes, analyzing solid state disk fault diagnosis and data analysis, and if not, returning to continue accelerated testing of the solid state disk. According to the method, the dynamic comprehensive stress model is constructed, and the temperature stress, the voltage stress, the read-write load stress and other multi-dimensional stress are combined, so that the limitation that only single static high-temperature stress is applied in a traditional test method is broken through, comprehensive stress test on the solid state disk is realized, and the test comprehensiveness and accuracy are improved.

Instead of an arbitration over the link not considering bursts, a smart scheduler in a solid state drive (SSD) host interface is burst aware. The scheduler considers the type of transactions that are going to be sent over the interface. The scheduler sends the transactions in the most efficient way while maximizing the efficiency over the host DRAM. The schedulers may be calibrated from time to time on-the-fly to find the optimal configurations adapted to the current workload. The scheduler will organize the packets selected by the arbitration module so that the data transfers are sent in a burst of a predetermined sized to the host for optimum performance. For further optimization other packet types are sent in bursts as well.

A solid state drive (SSD) includes an NAND memory and an SSD controller. The SSD controller includes an interface coupled to a host machine, a nonvolatile memory controller coupled to the interface, and a processor coupled to the nonvolatile memory controller. The SSD controller is configured to: receive, via the interface, a write command from the host machine; process, by the nonvolatile memory controller, the write command; transmit, from the nonvolatile memory controller to the processor, a system message; process, by the processor according to Zoned Namespaces (ZNS) protocol, the system message; obtain, by the nonvolatile memory controller via the interface, host data for storage from the host machine; and write the host data to the NAND memory based on a result of processing the system message. Processing the system message by the processor and obtaining the host data by the nonvolatile memory controller are executed in parallel.

The invention provides a data storage reliability testing method and system based on a solid state disk. The method comprises the following steps: executing a data storage reliability test on a target solid state disk, and extracting reliability index data; processing according to the reliability index data to obtain a reliability standard degree coefficient; acquiring environment characteristic data of the test region, and processing to obtain an environment interference coefficient; processing according to the reliability standard degree coefficient in combination with an environment interference coefficient to obtain a corrected reliability standard degree coefficient, and judging whether the data storage reliability reaches the standard or not; and if the data storage reliability of the target solid state disk does not reach the standard, executing an optimization measure on the target solid state disk, thereby realizing a data storage reliability test technology based on the solid state disk.

Methods and systems for a storage environment are provided. One method includes copying a data unit from a first temporary storage location corresponding to each zoned solid-state drive (ZNS SSD) of a first ZNS SSD set of a storage system to a first XOR module, while determining a first partial horizontal parity using the data unit stored in the first temporary storage location; and determining a vertical parity for each ZNS SSD of the first ZNS SSD set using the data unit provided to the first XOR module in a current cycle and vertical parity determined from a previous cycle.

This disclosure provides for host-controller cooperation in managing NAND flash memory. The controller maintains information for each erase unit which tracks memory usage. This information assists the host in making decisions about specific operations, for example, initiating garbage collection, space reclamation, wear leveling or other operations. For example, metadata can be provided to the host identifying whether each page of an erase unit has been released, and the host can specifically then command each of consolidation and erase using direct addressing. By redefining host-controller responsibilities in this manner, much of the overhead association with FTL functions can be substantially removed from the memory controller, with the host directly specifying physical addresses. This reduces performance unpredictability and overhead, thereby facilitating integration of solid state drives (SSDs) with other forms of storage. The disclosed techniques are especially useful for direct-attached and / or network-attached storage.

Disclosed herein is a backplate assembly for mounting a component (such as a compression attached memory module (CAMM)) and a co-located component (such as a solid state drive (SSD)) to a printed circuit board (PCB). The backplate assembly includes a backplate mounted on a first face of the PCB and attached to the component on a second face of the PCB that is opposite to the first face. The backplate includes a cutout to receive the co-located component and a perimeter portion that includes a flange extending away from the backplate and the printed circuit board. The backplate assembly also includes a plate cap configured to engage with the flange to attach the plate cap to the backplate and to at least partially cover the co-located component.

An information processing apparatus includes: a solid state drive (SSD) configured with a multi-bit cell for storing multi-bit data in one memory cell and configured to include an electrically rewritable non-volatile storage unit; and a main control unit configured to execute processing based on data stored in the SSD. The SSD includes a storage control unit, which is a storage control unit configured to control access to the non-volatile storage unit, and configured to, when the multi-bit data is stored in the multi-bit cell, store the multi-bit data with a high-quality storage mode in which a variation width of a threshold voltage is narrower than in a normal storage mode when a number of rewrites executed in the multi-bit cell is equal to or greater than a threshold number of rewrites.

1. Name of the designed product: solid state disk. 2. Use of the designed product: for electronic data storage. 3. Design points of the designed product: in the shape of the product. 4. Picture or photo best indicating the design points: perspective view 1.

1. The name of this design product: Portable Solid State Drive (XY20250121C). 2. Purpose of this design product: used for storing data. 3. The key design feature of this product is its shape. 4. The picture or photo that best illustrates the key points of the design: main view.

The invention relates to a sorting machine for testing electronic components. According to the sorting machine for testing the electronic components, if a moving hand moves the electronic components to a shelving device by taking the shelving device capable of shelving the electronic components as a medium, a testing hand moves the electronic components from the shelving device to a tester side, and then the electronic components and the tester are electrically connected. To this end, the present invention is characterized in a stacker section for supplying and recovering electronic components. According to the present invention, large electronic components such as a solid state drive can be automatically and electrically connected to a tester, and particularly, electronic components of various specifications can be processed, thereby having an effect of minimizing construction costs for testing electronic components.