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400 results about "Internal memory" patented technology

Techniques for optimizing bootstrapping execution of a fully homomorphic encryption

A method and system of the device may include obtaining hardware constraints of an FHE accelerator configured to execute the FHE program. In addition, the device may include selecting an optimal bootstrapping configuration that corresponds to the hardware constraints. The device may include identifying repetitive data patterns in the auxiliary data to be used in the bootstrapping process. Moreover, the device may include reducing the auxiliary data by applying at least one auxiliary data optimization technique based on the repetitive data patterns. Also, the device may include modifying the FHE program to include an instruction to load at least a portion of the reduced auxiliary data into an internal memory of the FHE accelerator, where the at least a portion of the reduced auxiliary data is loaded to the internal memory once prior to the execution of the plurality of bootstrapping processes.
Owner:CHAIN REACTION LTD

A method of optimizing linear transformation

A method and system for optimizing compute runtime and memory footprint of a linear transformation process are provided. The method includes determining a set of optimal rotation parameters, wherein the optimal rotation parameters provide an optimal tradeoff between runtime compute resources and a memory footprint for a runtime execution of the linear transformation process; initializing the linear transformation process to run a boosting technique with the determined set of optimal rotation parameters, wherein the boosting technique, when executed at runtime as part of the linear transformation process, performs at least one iteration that yields rotated ciphertexts, and wherein the at least one iteration is based on the determined set optimal rotation parameters and at least one key switching key (KSK); and loading the initialized linear transformation process to an internal memory of a hardware accelerator.
Owner:CHAIN REACTION LTD

Near proximity search-based few-sample visual defect detection method

The invention discloses a few-sample visual defect detection method based on approximate proximity search, and belongs to the technical field of industrial intellectualization. The system mainly comprises an image acquisition module, a feature extraction module, a memory bank construction module, a feature compression module, an approximate nearest neighbor search module and an anomaly detection and result output module. The feature extraction module is used for performing feature extraction on the collected image; the feature compression module is used for reducing the feature data volume and reducing the internal memory and calculation burden; the memory bank construction module is mainly operated during system initialization or model training and is used for constructing a feature memory bank of normal samples; the approximate nearest neighbor search module is responsible for quickly finding normal sample features closest to the input features in the memory bank; and the anomaly detection and result output module is used for converting distance information obtained by neighbor search into anomaly. According to the few-sample visual defect detection method based on the approximate proximity search, the effect of few-sample anomaly detection is achieved.
Owner:上海仰羿自动化工程有限公司 +1

Data transmission method and computer equipment

The invention discloses a data transmission method and computer equipment, and relates to the technical field of data transmission. The method comprises the following steps: acquiring a sending work request containing a local sending queue pair number and a work queue element; querying target sending information by taking a local sending queue number as an index; storing the working queue elements and the target sending information as operation contexts into an internal memory of a network card of a request end, and recording corresponding indexes; assembling a target data packet based on the target sending information and the memory index; receiving a feedback data packet of the target data packet and extracting a memory index and a serial number carried by the feedback data packet; if the feedback data packet is a correct confirmation data packet, judging that the sending of the work request is completed and releasing the context; and if the feedback data packet is a confirmation failure data packet, calculating a retransmission data initial address and organizing retransmission. The technical problem that the effective connection number of network cards is limited by hardware resources in the prior art is solved, and the technical effect of supporting large-scale network parallel communication is achieved.
Owner:INSPUR SUZHOU INTELLIGENT TECH CO LTD

Internal memory reclaiming method, computer device, medium, and program product

An internal memory reclaiming method, performed by a computer device that comprises at least two groups of SWAP devices, comprising: determining page access frequency information of an internal memory page to be reclaimed based on receiving an internal memory reclaiming instruction; determining a target SWAP device from the at least two groups of SWAP devices based on the page access frequency information; and transferring content data stored in the internal memory page to the target SWAP device.
Owner:TENCENT TECHNOLOGY (SHENZHEN) CO LTD

Internal memory, chip and related electronic equipment

The embodiment of the invention discloses an internal memory, a chip and related electronic equipment. A target computing unit of the internal memory comprises a plurality of groups of primary multipliers, a plurality of adder trees and a plurality of secondary multipliers, one group of first-level multipliers is connected with one second-level multiplier through one adder tree; the group of first-level multipliers comprises a plurality of pairs of first multipliers, and each adder tree comprises a first adder, a second adder and a third adder; each pair of first multipliers respectively receive data to perform multiplication operation, and respectively input output results into the first adder to perform addition operation; each second adder receives the output results of the plurality of first adders or the second adder at the upper level to carry out addition operation, and respectively inputs the output results to the second adder at the lower level or the third adder; and each third adder receives the output results of the plurality of second adders to carry out addition operation, and inputs the output results to the secondary multiplier to carry out multiplication operation. By implementing the embodiment of the invention, the memory computing capability can be improved.
Owner:HUAWEI TECH CO LTD

A system and method for measuring real-time meteorological and oceanographic data using a buoyage network

PCT designated stage expiredWO2025115027A1BreakwatersWaterborne vesselsInternal memoryMooring system
The present invention provides a system for measuring real-time meteorological and oceanographic data using a buoyage network for smart ports and harbours. It consists of a moored floating station or moored buoy, or network of buoy-based measurement stations (A) moored at the port or harbour waters with the marine navigation and land-based measuring station (B) mounted at jetty or wharf or quay wall of port and harbours. The buoy-based system (A) is equipped with a cylindrical steel buoy structure featuring a mast (7) and is secured using a two-point mooring system. The present system comprises of an integrated monitoring and data transmission system that collects the real-time meteorological and oceanographic data from the sensors and processes the acquired data based on calibration, enabling accurate and reliable measurements. The processed data is then stored in the system's internal memory for analysis and transmitted to a remote-control station.
Owner:INDIAN INST OF TECH MADRAS

Data processing method and device

A data processing method is applied to the field of artificial intelligence and comprises the steps of generating second data through a first network according to first data; generating third data through a second network according to the first data; wherein the first network comprises a first network layer, the second network comprises a second network layer, and the first network layer is a partial network of the second network layer; and verifying the second data according to the third data. According to the method and the device, the network (the second network) for performing the data verification process is multiplexed for generating the data network (a part of the first network), so that the additional reasoning deployment overhead can be reduced, the internal memory of the second network can reuse the reasoning result of the first network when the second network is verified, additional time delay is not needed, and the calculation overhead is reduced.
Owner:HUAWEI TECH CO LTD

Mode switching method and electronic equipment

The invention provides a mode switching method and electronic equipment, the mode switching method is applied to the electronic equipment, the electronic equipment comprises a main processor, a coprocessor and an internal memory, operation modes of the electronic equipment comprise a power-saving mode and a working mode, the coprocessor works in the power-saving mode, the main processor does not work, and the internal memory does not work in the working mode. In the working mode, the main processor and the coprocessor work, and the method comprises the steps that first operation is received, and the first operation is used for switching the operation mode of the electronic equipment from the power-saving mode to the working mode; controlling the main processor to be powered on; and obtaining first data from the internal memory, wherein the first data is business data of the main processor stored when the operation mode of the electronic equipment is switched from the working mode to the power saving mode. By adopting the method and the device, the running mode of the electronic equipment can provide due function effects, and the function availability is improved, so that the user experience is improved.
Owner:HUAWEI TECH CO LTD

Systems and methods to support certificates and data protection for components without a root of trust

Methods and system are provided for virtualizing root of trust (ROT) to serve devices that do not have built-in ROT functionality. A component of a computer system may provide root of trust functionality for the computer system generally. That component may also provide virtualized ROT functionality for a non-ROT component by generating a symmetric encryption key and an asymmetric encryption key pair using a unique identifier of the non-ROT component. The virtual ROT functionality may handle storage of the encryption keys as well as an ID certificate for the non-ROT component. Furthermore, the virtual ROT functionality may be configured to write encrypted data to an internal memory of the non-ROT component, read and decrypt that data, and write back further encrypted data.
Owner:DELL PROD LP

Computing system, multi-round session inference method, apparatus and computing device cluster

The present application belongs to the technical field of cloud computing and provides a computing system, a multi-round session inference method, an apparatus and a computing device cluster. In the system, an external storage device stores a historical key value cache of a completed session. As the capacity of the external storage device is far greater than the capacity of an HBM in an accelerator, the hit rate of the historical key value cache can be increased, thereby avoiding recomputing the key value cache. In addition, when the accelerator processes a session, a host can preload a historical key value cache of a session to be processed in a task queue from the external storage device to an internal memory of the host; when performing i-th layer computing on the session, the accelerator can preload from the internal memory of the host the historical key value cache required for the (i+1)-th layer computing. As the computing process and the data loading process are synchronously performed, the computing process does not need to wait for the completion of data loading, such that the time overheads of the accelerator accessing the external storage device can be hidden, improving the efficiency of multi-round session inference.
Owner:HUAWEI CLOUD COMPUTING TECHNOLOGIES CO LTD

Information processing apparatus, information processing system, and information processing method

An information processing apparatus includes: an internal storage configured to store one or more programs; a controller configured to execute the one or more programs; and an interface configured to receive information from an external storage containing a whitelist. The whitelist includes determination information indicating whether to allow the controller to execute each of the one or more programs. The controller is configured to acquire the whitelist from the external storage through the interface, verify an integrity of the acquired whitelist, and in response to a determination that the acquired whitelist is complete, store the acquired whitelist in the internal storage as an active whitelist to be used for determining whether to allow the controller to execute each of the one or more programs stored in the internal storage.
Owner:TOSHIBA TEC KK

Heterogeneous computing method, device and equipment and computer readable storage medium

The invention provides a heterogeneous computing method, a heterogeneous computing device, heterogeneous computing equipment and a computer readable storage medium, and is applied to the technical field of data processing. The method comprises the following steps: when a heterogeneous computing power card accesses data, a central processing unit firstly determines whether a target object accessed this time exists in a video memory or not; and under the condition that the target object does not exist in the video memory, the central processing unit reads the target object from the memory and stores the target object in the video memory. Further, the central processing unit can provide the target object loaded into the video memory for the heterogeneous computing power card. In the scheme provided by the embodiment of the invention, the heterogeneous computing data meeting the preset condition is transferred from the video memory to the memory, and the data written into the memory is subjected to a realistic copying strategy, so that the storage space of the heterogeneous computing data can be expanded, and the utilization rate of the video memory space can be improved, thereby realizing video memory oversell, and improving the user experience. And thus, high-performance calculation of the heterogeneous computing power card can be guaranteed.
Owner:TENCENT TECHNOLOGY (SHENZHEN) CO LTD

Memory address caching for neural networks

A request to provide an application with direct memory access to data stored at an external memory address of an external memory is received. Responsive to determining that the external memory address is not registered in a cache, the data is copied from the external memory address to a first internal memory address within the internal memory. A first cache line, within the cache, associated with the external memory address is updated to include a reference to the first internal memory address. The data is provided from the internal memory to the application.
Owner:MIPS HLDG INC

Multifunctional Outdoor Solar Stake Light and Electrical Projector System

An outdoor lighting and projection system that includes a light fixture device and a projector device is disclosed. The light fixture device comprises a display device integrated with a yard stake and a solar panel for absorbing solar power (i.e., solar energy) to illuminate the display. The projector device features a projector system pivotally coupled to a first arm and a second arm via hinge (i.e., pivotal) brackets, enabling for tilting, panning, and ground installation. An internal memory includes premade slides and messages for display by the display device and projection by the projector system. The system includes a wireless module for remote control via a mobile application and an AC to DC adaptor for external power supply. The system is configured for remote operation and provides different projection and illumination.
Owner:PATTERSON VIOLET

Data processing method and device of processor, equipment, medium and program product

The invention provides a data processing method and device of a processor, equipment, a medium and a program product. The method comprises the steps of loading an mth data block in a first matrix to a first cache position of an internal memory through a first thread in a thread group of a processor, and loading an nth data block in a second matrix to a second cache position of the internal memory; loading the (n + 1) th data block in the second matrix from the external memory to a third cache position of the internal memory through the first thread, and performing multiplication operation on the data blocks in the first cache position and the data blocks in the second cache position through the second thread; and loading the (n + 1) th data block in the second matrix from the internal memory to a second cache position of the internal memory through the first thread, and performing multiplication operation on the data block in the first cache position and the data block in the third cache position through the second thread. According to the invention, the calculation speed of multiplication in the processor can be improved.
Owner:SHANGHAI ORIENTAL COMPUTER TECHNOLOGY CO LTD

Anti-irradiation system based on dynamic memory refreshing

The invention discloses an anti-radiation system based on dynamic memory refreshing, which comprises an FPGA (Field Programmable Gate Array), a Flash storage module and a CRC (Cyclic Redundancy Check) module, the FPGA is provided with an internal storage pool and a lookup table updating unit, and the lookup table updating unit periodically reads lookup table data which is stored in the Flash and dynamically updated and stores the lookup table data in the internal storage pool; and replacing expired data or data damaged by single event upset. According to the anti-radiation system based on dynamic memory refreshing, a dynamic memory refreshing mechanism is added on the basis of a plug-in refreshing chip and triple modular redundancy, and an FPGA can dynamically refresh an internal memory pool by reading lookup table data in a plug-in FLASH memory. According to the key technical scheme, a single event upset event in an internal memory pool of the FPGA is rapidly and efficiently processed by combining lookup table cyclic refreshing and CRC verification, the anti-irradiation capacity of a system is improved, and stable operation of the system in an extreme environment is ensured.
Owner:SHANGHAI FUDAN COMM

Data processing method and device, computer equipment and storage medium

The invention relates to a data processing method and device, computer equipment and a storage medium. The data processing method comprises the steps of obtaining display compensation data of a target screen body and a brightness non-uniform region distribution direction in a display picture of the target screen body; determining a target differential mode according to the distribution direction of the brightness non-uniform region; performing differential processing on the display compensation data of the brightness non-uniform region based on a target differential mode to obtain intermediate data; and performing compression processing on the intermediate data to obtain target compression compensation data. According to the method and the device, the differential mode is adaptively determined based on the distribution direction of the brightness non-uniform region, and the display compensation data is subjected to differential processing and then is compressed, so that an error of the decompressed compensation data can be reduced, and meanwhile, an internal memory with an overlarge storage space is prevented from being occupied.
Owner:BEIJING VISIONOX TECHNOLOGY CO LTD

Method for validating radio frequency identification number

Methods for producing and validating RFID transponders (e.g., ISO 11784 / 11785 compliant transponders) with identification number authentication capabilities. A signature indicator and a partial-signature trailer are introduced to the ISO telegram. An encrypted signature or partial signature is introduced to the internal memory of ISO compliant transponders. The encrypted signature can prevent fraudulent duplications of ISO 11784 / 11785 transponders by allowing users to securely validate the transponders' authenticity.
Owner:AVID IDENTIFICATION SYSTEMS INC

Diagnostic reasoning RAG system for resisting retrieval noise based on self-generated knowledge base

The invention discloses a diagnostic reasoning RAG system for resisting retrieval noise based on a self-generated knowledge base, and the system comprises a knowledge retrieval module which carries out the retrieval from an external knowledge base according to a user question to obtain a plurality of target text blocks; the evaluation generation module is used for independently evaluating each target text block through an evaluation model so as to identify retrieval noise, generating a correlation judgment result and a noise degree judgment result of each target text block, and generating internal memory information as a self-generated knowledge base based on a user question; and the diagnosis reasoning module is used for integrating the user question, each target text block, the corresponding correlation judgment result, the noise degree judgment result and the internal memory information into enhanced prompt information and inputting the enhanced prompt information into a large language model to generate a diagnosis reasoning answer. According to the method, retrieval noise interference can be effectively resisted, model knowledge support is strengthened by means of the self-generated knowledge base, the precision and timeliness of medical diagnosis reasoning are improved, and the requirements of the medical field for high-precision and strong-timeliness clinical decision making are met.
Owner:DIGITAL HEALTH CHINA TECHNOLOGIES CO LTD

Data storage device and method for delaying execution of a host write command to perform an internal memory operation

A data storage device and method for delaying execution of a host write command to perform an internal memory operation. In one embodiment, a data storage device is provided comprising a memory with single-level cell (SLC) blocks and multi-level cell (MLC) blocks, as well as a controller. The controller is configured to store, in a queue, a plurality of write commands received from a host, wherein each write command is associated with a timeout window; determine how long each of the plurality of write commands has been pending in the queue; and for each write command, delay execution of the write command within the write command's timeout window until the write command has been pending in the queue for a specified amount of time, wherein delaying execution of each write command provides the controller with time to perform a memory operation to increase an amount of available SLC blocks in the memory. Other embodiments are provided.
Owner:SANDISK TECHNOLOGIES LLC

Software upgrading method and device, equipment and storage medium

The invention relates to a software upgrading method and device, equipment and a storage medium. According to the main technical scheme, the method comprises the steps that in response to a differential package of to-be-upgraded software received by an electronic controller, the differential package is stored in an external memory, the upgrading mode of the to-be-upgraded software is determined according to an activated partition and the software type of the to-be-upgraded software in the external memory, and the software type comprises the current version of software; when the upgrading mode of the to-be-upgraded software is differential upgrading, generating latest version software in the external memory according to the differential package and the current version software, switching the latest version software in the external memory from the inactive partition to the active partition based on the boot file of the internal memory, and upgrading the to-be-upgraded software according to the running state of the latest version software in the active partition. According to the method and the device, the software types in the external memory and the activated partition are determined, so that the non-activated partition can provide rollback guarantee for the activated partition while the differential upgrading process can be carried out in a non-inductive manner, and the user experience of remote upgrading is improved.
Owner:ZHEJIANG ZEEKR INTELLIGENT TECH CO LTD +1

Apparatus for processing log data, method of operating same, and system including same

A log processing apparatus for processing log data, an operating method thereof, and a system including the log processing apparatus are presented. The log processing apparatus includes an internal memory for storing log data and an internal processor for processing the log data. The operation method for processing log data includes: receiving log data from at least one storage device; storing the received log data; generating fault analysis data by performing fault analysis on the log data; and transmitting the fault analysis data to the host device.
Owner:SAMSUNG ELECTRONICS CO LTD

Computer system comprising a microcontroller using an external memory

A microcontroller includes: a processor, a communication interface configured to enable communication between the processor and an external memory, and an internal memory. The internal memory stores: at least one driver for controlling the communication interface when it the driver is executed by the processor, and a management software module for controlling the external memory by using the at least one driver and at least one communication parameter associated with the external memory when the driver is executed by the processor.
Owner:STMICROELECTRONICS (GRAND OUEST) SAS +1

Self-coiling light structure

A self-coiling light structure is designed to expand and retract in a controlled manner to prevent tangling and facilitate compact storage. The structure comprises a flexible coil made of wire, rope, plastic, or a combination thereof, incorporating a power-conducting element and LED lights positioned at intervals. The coil is configured to retain a predetermined shape through an internal memory material, allowing it to automatically retract into a compact form when not in use. The structure further includes securement features such as loops or clips for attachment to external structures, as well as male and female power connectors for interconnection with additional sections. Various embodiments provide for different configurations of the coil in excited and unexcited states, ensuring ease of deployment and retraction.
Owner:BARANOFF SERGEI CONSTANTINE

Modem chip capable of performing cyclic redundancy check using internal memory and system on chip including the modem chip

A modem chip receives a codeword including a transport block composed of a plurality of code blocks, and includes a hybrid automatic repeat request (HARQ) processing circuit configured to perform a HARQ-based processing operation with respect to the codeword, and an internal memory configured to store data generated by the HARQ processing circuit. The HARQ processing circuit includes a code block processing circuit configured to decode the plurality of code blocks in units of code blocks and perform a first cyclic redundancy check on each of the decoded plurality of code blocks, and a codeword processing circuit configured to perform a second cyclic redundancy check on a decoded transport block.
Owner:SAMSUNG ELECTRONICS CO LTD

Write combine buffer (WCB) for deep neural network (DNN) accelerator

A compute tile includes a WCB that receives a workload of writing an output tensor of a convolution into a local memory of the compute tile. The local memory may be a SRAM. The WCB receives write transactions. A write transaction includes a data block, which is a part of the output tensor, and metadata describing one or more attributes of the data block. The WCB may store write transactions in its internal buffers. The WCB may determine whether to combine two write transactions, e.g., based on an operation mode or metadata in the write transactions. In embodiments where the WCB determines to combine the two write transactions, the WCB may combine the two write transactions into a new write transaction and write the new write transaction into the local memory or an internal memory of the WCB. The total number of write transactions for the workload can be reduced.
Owner:INTEL CORP

Internal memory, chip and related electronic device

Disclosed in the embodiments of the present application are an internal memory, a chip and a related electronic device. A target processing unit (202) of an internal memory (102) comprises a plurality of groups of primary multipliers, a plurality of adder trees and a plurality of secondary multipliers, wherein one group of primary multipliers is connected to one secondary multiplier by means of one adder tree; one group of primary multipliers comprises a plurality of pairs of first multipliers; each adder tree comprises a first adder, a second adder and a third adder; each pair of first multipliers separately receives data to perform multiplication operations, and separately inputs output results into one first adder for addition operations; each second adder receives output results of a plurality of first adders or the upper-level second adder, so as to perform addition operations, and separately inputs the output results into the lower-level second adder or one third adder; and each third adder receives output results of a plurality of second adders to perform addition operations, and inputs the output results into one secondary multiplier for multiplication operations. Implementing the embodiments of the present application can improve the processing capability of the internal memory.
Owner:HUAWEI TECH CO LTD

Serializer-deserializer sensor system configurations

Aspects of the present disclosure include a serializer, a method, and / or a non-transitory computer readable medium for receiving an indication indicating the sensor circuit is connected to a controller circuit, identifying a sensor identifier associated with the sensor circuit from an internal memory of the serializer, transmitting the sensor identifier from the serializer to the controller circuit to a deserializer to identify and load a sensor circuit driver associated with the sensor identifier, transmitting sensor calibration data from the memory circuit on the sensor circuit to the controller circuit, and transmitting sensor data to the deserializer.
Owner:ANALOG DEVICES INC

Method for constructing equipment temperature custom sorting table under new energy configuration and related device

The invention discloses a construction method of an equipment temperature custom sorting table under new energy configuration and a related device. The construction method comprises the following steps: editing a configuration file; reading the configuration file, extracting the width, the height and the segmentation number of the table, and storing the mapping relation between the component name and the measuring point into a memory cache; reading the temperature value of each measuring point; the temperature values of all the measuring points are sorted, a sorting table is constructed according to the sorting result, the width and height of the table, segmentation data and the mapping relation between the component names and the measuring points, and the method and the related device can meet the quick response requirement of new energy equipment for temperature anomaly.
Owner:YANCHI ZHONGYING CHUANGNENG NEW ENERGY CO LTD +2