8877results about "Electrical connection printed elements" patented technology

The invention relates to the technical field of printed embedded PCBs, and discloses an embedded PCB and a manufacturing method thereof.The embedded PCB comprises a daughter board, a first dielectric layer and a first circuit layer which are sequentially arranged in a stacked mode in the first direction, a device is embedded in the daughter board, the device is located on the side, close to the first dielectric layer, of the daughter board, and the first dielectric layer is located on the first circuit layer. One side, close to the first dielectric layer, of the device is provided with a first part, and the first part is provided with a first protection part; a first connection hole is formed in the first dielectric layer, a first conductive part is filled in the first connection hole, the first protection part is connected and electrically conducted with the first conductive part, and the first conductive part is connected and electrically conducted with the first circuit layer. The embedded PCB and the manufacturing method thereof provided by the invention are used for improving the problem of poor hole filling in the electroplating hole filling process in the related technology.

Disclosed in the present invention is a packaging structure of a half-bridge power module. The packaging structure comprises an insulating and thermal conductive plate, a multi-layer circuit board, a plastic package body and a bridge arm switch. Further disclosed in the present invention is the use of a packaging structure of a half-bridge power module in an OBC power source converter, a DCDC isolated converter, a non-isolated power source converter, a cardiac arrest awakening apparatus, and a circuit module formed by means of combining multiple half bridges such as ANPC, TNPC and Heric. Further disclosed in the present invention is a manufacturing method for a packaging structure of a half-bridge power module. The method comprises: performing assembling; providing an overflow region; and synchronously performing filling and grinding to remove the overflow region. In the present invention, a minimum size and a low impedance are achieved by means of DBC, flexible pin leading-out and welding are realized by means of a PCB, the reliability, safety and heat dissipation of modules are supported by means of a plastic packaging body, and the extension of a temperature monitoring unit and a decoupling capacitor is supported.

An electronic device has a substrate, a signal wiring and a heat radiating wiring. The substrate has one surface and the other surface opposite to the one surface. The signal wiring is formed on an insulating layer of the substrate. The heat radiating wiring is formed on the insulating layer and thermally connected to the signal wiring on a same plane as the signal wiring.

A network of Intermediate Device Structure (IDS) members communicatively coupled, mounted to elevated structure / s within urban settings, each configured to operate by a processor / controller with resident code, and in real time receive sensed environmental inputs from each IDS' vicinity, remote data / instruction / s processing the inputs with resident code parameters generating outputs that are configured to mitigate / avert intermittent environmental events harmful / hazardous to humans. The IDS's include a launch and charging pad that hosts a UAV, which patrols an area within communication range of at least one of the IDSs so the UAV, perhaps with AI-engine assistance, can detect events in the area patrolled by the UAV.

A semiconductor device has a first interconnect structure. A first bridge die is disposed over the first interconnect structure. An encapsulant is deposited over the first bridge die. A second interconnect structure is formed over the first bridge die and encapsulant. A second bridge die is disposed over the second interconnect structure.

A printed circuit board includes a substrate with first through-portion; a magnetic layer disposed in at least a portion of the first through-portion and having a second through-portion; an electronic component having at least a portion disposed in the second through-portion; a first wiring pattern disposed on an upper surface of the magnetic layer; a second wiring pattern disposed on a lower surface of the magnetic layer; and a first through-via having at least a portion surrounded by the magnetic layer, and including a first via pattern connecting the first and second wiring patterns to each other.

The invention discloses a stamp hole and LGA combined board card, and relates to the technical field of embedding. Comprising a core board and a bottom board, the bottom board is provided with a bonding pad corresponding to the core board in position, and the bonding pad is used for welding the core board and the bottom board; the core board comprises a board card body, and the board card body is provided with a plurality of stamp holes, a plurality of LGA packaging pads, a plurality of LGA special pads, a positioning hole and a shielding cover welding module. The mode of combining the stamp hole and the LGA is used as the connection mode of the core board, and the advantages of the stamp hole and LGA packaging are achieved at the same time.

An electronic device and method are disclosed. The electronic device includes a first and second housing movable relative to each other. The second housing supports a flexible display which may be at least partially exposed to an exterior, and at least partially stowed within the first housing based on the movement of the housings. A processor implements the method including detecting movement of the housings such that a visible display area of the display is changed, detecting whether the resizing meets a predetermined condition, and if resizing does not meet the predetermined condition, executing image processing on a portion of the resized visible display area.

An electronic device having a central area and a peripheral area surrounding the central area is provided. The electronic device includes a substrate, a through hole, a buffer layer, a first circuit structure, an electronic component and a first pad. The substrate has a first surface and a second surface opposite to the first surface. The through hole penetrates through the substrate and has a first through hole and a second through hole. The buffer layer covers the first surface, the second surface, an inner wall of the first through hole and an inner wall of the second through hole. The first circuit structure is disposed on the first surface. The first through hole corresponds to the central area, the second through hole corresponds to the peripheral area, and a width of the second through hole is greater than a width of the first through hole.

The present disclosure relates to a printed circuit board including: a first insulating layer; a first wiring layer disposed on the first insulating layer; a second wiring layer disposed on the first insulating layer; a second insulating layer disposed on the first insulating layer; a third wiring layer disposed on the second insulating layer; a first cavity penetrating through at least a portion of the first insulating layer; and a second cavity penetrating through at least a portion of the second insulating layer and connected to the first cavity. The first and second cavities have different wall surface inclinations, and a depth of the first cavity is smaller than a thickness of the first insulating layer and is greater than a thickness of each of the first and second wiring layers.

The invention relates to the technical field of thermal simulation, in particular to a thermal simulation method and system of a circuit board and the circuit board. The method comprises the following steps: acquiring circuit board design data and modeling to obtain a circuit board three-dimensional structure model; performing precision estimation according to the circuit board design data to obtain circuit board thermal simulation precision data; dividing the circuit board three-dimensional structure model according to the circuit board thermal simulation precision data to obtain circuit board assembly grid data; performing physical attribute assignment on the circuit board assembly grid data according to the circuit board design data to obtain physical grid unit data; performing circuit board thermal simulation according to the physical grid unit data to obtain circuit board thermal simulation data; and visualizing the thermal simulation data of the circuit board to obtain a thermal stress distribution diagram, and performing circuit board assembly design optimization on the three-dimensional structure model of the circuit board according to the thermal stress distribution diagram to obtain an optimized three-dimensional structure model of the circuit board. The heat management capability of the circuit board can be effectively improved.

A method for electrically connecting a first electronic component of a battery system with a second electronic component of the battery system is provided. The first electronic component includes a flexible printed circuit (FPC) including: a pin formed by folding a connection portion of the FPC; and a conductive strip on an outer surface of the folded connection portion. The second electronic component includes a printed circuit board (PCB) having a through-hole configured to receive the pin of the FPC and includes an electrically conductive plating adjacent to the through-hole. The method includes: attaching the FPC to a first side of the PCB such that the pin of the FPC is received in the through-hole in the PCB; and soldering the pin of the FPC to the conductive plating on the PCB to electrically interconnect the FPC and the PCB.

The invention discloses a double-sided semi-embedded packaging substrate and a processing method thereof, and the processing method comprises the steps: carrying out the N times of double-sided circuit manufacturing and the N-1 times of double-sided layer adding of a multi-layer substrate alternately, and obtaining an operation board with two groups of symmetrical circuit structures; the circuit structure is provided with an outer circuit layer and (N-1) inner circuit layers which are communicated with each other, and the inner circuit layer located on the innermost side is provided with a bonding pad. Performing laser groove burning on the working board, and processing a blind groove which is provided with an opening at the outer circuit layer and takes the other inner circuit layer adjacent to the innermost inner circuit layer as the groove bottom locally on each group of circuit structure; removing the copper foil on the bottom of the blind groove; the bonding pads are completely exposed in the blind grooves corresponding to the bonding pads, the blind grooves in the two sets of circuit structures are communicated, and a through groove structure is obtained; and cleaning the surface of the bonding pad to obtain the double-sided semi-embedded packaging substrate. The processing method is simple and reasonable, the processing cost is low, the processing efficiency is high, and the reliability of the obtained double-sided semi-embedded packaging substrate is very high.

A heat sink component can include a body including a thermally conductive material that is electrically non-conductive, a lower conductive layer formed over a bottom surface of the body and electrically connected with the ground plane layer, and an upper conductive layer formed over a top surface of the body. The heat sink component can have a length in an X-direction that is parallel with the top surface of the body and a thickness in a direction perpendicular to the top surface. A ratio of the length to the thickness can be greater than about 7.

The invention provides a millimeter wave regular modular sparse active phased-array antenna which comprises a comprehensive mother board which is provided with a radio frequency power synthesis / distribution network, a component control network and a component power supply network. The plurality of sparse antenna modules are arranged above the comprehensive mother board; the chip assembly is arranged below the comprehensive mother board; the digital and power supply unit is arranged on the side, away from the comprehensive mother board, of the chip assembly and comprises a phased array wave control module and a power supply module, and the phased array wave control module is connected with the system master control and assembly control network; the power supply module is connected with a system power supply and a power supply network; the sparse antenna module and the comprehensive mother board are vertically stacked, and vertical interconnection is realized through a plurality of layers of PCBs; the integrated mother board is vertically connected with the digital and power supply unit through a plug-in low-frequency connector. According to the invention, decoupling of the integrated antenna can be realized; the sparse antenna module adopts sparse active feed, so that the number of array active channels and the heat flux density can be effectively reduced, and the system cost is effectively reduced.

An earphone device includes a housing subassembly, an inner casing subassembly, an audio processor, and a force sensor patch. The inner casing subassembly is disposed in the housing subassembly and integrated with a printed circuit board having specific electrode(s). The audio processor is disposed on the printed circuit board. The force sensor patch is pasted onto specific electrode(s) of the printed circuit board to be coupled to the audio processor through specific electrode(s). The force sensor patch is disposed between a part of the housing subassembly and a part of the inner casing subassembly and arranged to detect a user's pressure applied onto the part of the housing subassembly.

A memory module has pads on the top and bottom surfaces of a module printed circuit board (PCB). The pads match the pin layout of one or more memory devices to be mounted on the memory module. The pads on one surface of the PCB electrically interconnect to the memory device(s), and the pads on the other surface electrically interconnect to pads on a system board, such as a motherboard. With the pad layout on the memory module, the pad layout of the system board can be the same for a memory-down implementation and for a removable memory module. The pad layout provides good signal-to-noise performance and can enable a memory module for low power double data rate (LPDDR) memory, double data rate (DDR) memory, and graphics double data rate (GDDR) memory.

Disclosed herein are microelectronic assemblies including direct bonding, as well as related structures and techniques. For example, in some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region, wherein the direct bonding region includes a first subregion and a second subregion, and the first subregion has a greater metal density than the second subregion. In some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region, wherein the direct bonding region includes a first metal contact and a second metal contact, the first metal contact has a larger area than the second metal contact, and the first metal contact is electrically coupled to a power / ground plane of the first microelectronic component.

Disclosed is a printed circuit board and a manufacturing method for manufacturing the same, the printed circuit board including: a first insulating layer; a through-hole penetrating through the first insulating layer; a via conductor layer disposed in the through-hole, and having first and second groove portions recessed inwardly of the through-hole from an upper surface and a lower surface of the first insulating layer, respectively; a cavity penetrating through at least a portion of the first insulating layer; an electronic component disposed in the cavity; and a second insulating layer covering at least a portion of the first insulating layer, and disposed in at least a portion of each of the through-hole and the cavity.

Disclosed herein are a package substrate, a chip package, and method for fabricating the same. The package substrate includes a package core comprising vias; a plurality of build-up layers disposed on an upper surface of the package core, the plurality of build-up layers comprising metal traces connected with the vias; and a magnetic core inductor disposed in a cavity of the package core. The magnetic core inductor includes a magnetic inlay, and a first metal layer disposed in the cavity on the magnetic inlay below the plurality of build-up layers. A second metal layer may be further disposed between the first metal layer and the metal traces. Both the first and second metal layers may be floating or grounded. The first and second metal layers are configured to shield other electronic components from being interfered by the magnetic field generated by the magnetic core inductor.

A circuit carrier includes a substrate, a first build-up circuit structure, a second build-up circuit structure, a fine redistribution structure and at least one conductive through hole. The substrate has a top surface and a bottom surface opposite to each other. The first build-up circuit structure is disposed on the top surface of the substrate and electrically connected to the substrate. The second build-up circuit structure is disposed on the bottom surface of the substrate and electrically connected to the substrate. The fine redistribution structure is directly attached on the first build-up circuit structure, wherein a line width and a line spacing of the fine redistribution structure are smaller than those of the first build-up circuit structure. The conductive through hole penetrates the fine redistribution structure and a portion of the first build-up circuit structure and is electrically connected to the fine redistribution structure and the first build-up circuit structure.

The invention provides a preparation process of a circuit board with an embedded copper core aluminum nitride ceramic high-heat-dissipation module. The preparation process comprises the following steps: carrying out first milling and cutting treatment on a plurality of first core plates; pre-stacking the plurality of first core boards, the plurality of second core boards, the plurality of first PP resin layers, the plurality of second PP resin layers and the third PP resin layers to obtain a multi-layer core board group; after the embedded copper core aluminum nitride ceramic high-heat-dissipation module is embedded into the semi-buried groove, the multi-layer core plate set is subjected to pressing treatment; drilling the laminated multi-layer core board group to form a conductive through hole in the multi-layer core board group; carrying out metallization treatment on the multi-layer core board group after the drilling treatment; and performing line manufacturing processing on the multi-layer core board group after metallization processing to obtain the circuit board embedded with the copper core aluminum nitride ceramic high-heat-dissipation module.

A printed circuit board according to an embodiment includes a first insulating layer, a second insulating layer disposed on the first insulating layer and including a cavity; and a pad disposed on the first insulating layer and having an upper surface exposed through the cavity; wherein the cavity includes a first part including a first inner wall; and a second part including a second inner wall under the first part; and wherein an inclination angle of the first inner wall is different from an inclination angle of the second inner wall.

The invention discloses a high-stretching FPC (Flexible Printed Circuit) and a preparation method thereof, and the method comprises the steps: coating conductive silver paste on a flexible substrate film in a printing, dispensing or coating mode on the back of the flexible substrate film, and forming a metal circuit layer through low-temperature curing; the printing thickness of the conductive silver paste is controlled to be 8-20 [mu] m; pasting a protective layer on the metal circuit layer, and pressing; after the supporting film is torn off, shape punching is conducted, and the product is obtained. The initial paste of the conductive silver paste comprises the following components: 50 wt%-70 wt% of mixed silver powder, 10 wt%-15 wt% of acrylic resin, 10 wt%-15 wt% of dimethyl glutarate, 5 wt%-10 wt% of dimethyl adipate and 5 wt%-10 wt% of dimethyl succinate. The high-stretching FPC and the preparation process thereof have the characteristics of high efficiency and low cost, and large-scale production can be realized. And on the other hand, the operability is high, and the operability problems that flexible base materials such as TPU are prone to displacement in the silk-screen printing process, and printing is poor are solved.

A display device includes a display panel, a flexible circuit board, and a driving chip. The display panel includes a display area and a non-display area bent to the back of the display area. The driving chip is bonded and connected to the display panel in the non-display area. The flexible circuit board includes a bonding area bonded to the non-display area, and a first flat area, a bending area, and a second flat area arranged in sequence in a direction away from the bonding area. The flexible circuit board is at the back of the display area. The second flat area is between the first flat area and the display area. A first electromagnetic shielding layer is provided on at least a portion of the surface, close to the display area, of the second flat area.

A method of manufacturing an electronic device includes providing a substrate with a predetermined first-hole region, a first surface, and a second surface. The second surface is opposite the first surface. The method includes laser processing the predetermined first-hole region from the first surface to form a first laser track and laser processing the predetermined first-hole region from the first surface to form a second laser track. The first laser track does not overlap the second laser track. The method further includes etching the predetermined first-hole region to form a first-hole.

A flexible wiring board includes a plurality of signal lines, a shielding layer disposed to overlap with the plurality of signal lines in a planar view, and an insulating member disposed on a side opposite to a side where the shielding layer for the plurality of signal lines is disposed. The shielding layer is provided with openings. The shielding layer includes a first region having an opening ratio higher than a predetermined value and a second region having an opening ratio lower than the opening ratio of the first region. The second region is disposed at a position where the second region overlaps with the insulating member and the plurality of signal lines in a planar view. A boundary between the first region and the second region is disposed via a space to the insulating member in a planar view.

The invention discloses a broadband multi-level three-dimensional vertical interconnection structure based on an HTCC technology, and belongs to the field of radio frequency front-end system integration. The structure comprises a PCB mother board, a ball grid array and an SiP module which are sequentially arranged from bottom to top, in the SiP module, the chips are distributed among different levels, and a connection mode of the chips among the different levels is set; a radio frequency signal is transmitted upwards through the PCB mother board, and after flowing through the lower-layer bare chip, the radio frequency signal is orderly transmitted upwards through the strip line and the signal via hole in the HTCC and finally transmitted to the surface-layer chip, so that a complete and efficient vertical interconnection signal transmission system is formed. According to the invention, the layout flexibility of interconnection lines among the chips is improved, the wiring crosstalk among the chips is reduced, the three-dimensional integration scene of bare chips in the HTCC is greatly widened, high-density SiP packaging is realized, and the strict technical requirements on radio frequency signal transmission, processing and chip interconnection under a complex circuit architecture can be met.

A wiring module is to be attached to a battery cell stacked body in which a plurality of battery cells having an electrode terminal and being elongated in a front-rear direction are arranged in a horizontal direction, and is electrically connected to the battery cells, the wiring module including: a bus bar that is connected to the electrode lead; an FPC that is connected to the bus bar and extends in the front-rear direction; and a protector that holds the bus bar and the FPC, wherein the FPC includes: a plurality of extension parts that extend in the front-rear direction; an intersection part that extends in the horizontal direction; and a bending part, the extension parts are respectively coupled to two end portions of the intersection part in the horizontal direction, one of the extension parts includes the bending part in the vicinity of the intersection part.

The invention relates to an embedded rolling bearing with a source end parameter acquisition system and a manufacturing method of the embedded rolling bearing. The embedded rolling bearing comprises a bearing body, and a containing groove is formed in the peripheral face of the bearing body; the thin film sensor assembly is formed in the accommodating groove, and comprises a PDC-ITO (Poly (Propylene Diene Monomer-Indium Tin Oxide)) strain element, a PDC-Pt (Poly (Propylene Diene Monomer)-Pt) temperature element, a PDC-PZT (Poly (Poly (Propylene Diene Monomer)-PZT) piezoelectric thin film and a plurality of bonding pads which are respectively matched with the PDC-ITO strain element, the PDC-Pt temperature element and the PDC-PZT piezoelectric thin film; the acquisition microstructure is arranged in the accommodating groove and comprises a PCB (Printed Circuit Board) and a functional chip which is formed on the PCB and is electrically connected with the plurality of bonding pads through a plurality of electrical interconnection sockets; the heat insulation pouring sealant is poured into the accommodating groove; and a metal cover. Normal installation of the bearing is achieved to the maximum extent, and the defect that the appearance and the size of a traditional external sensor and a traditional collector are limited is overcome.