562 results about "Memory architecture" patented technology

Memory architecture provides capabilities for high performance content search. The architecture creates an innovative memory that can be programmed with content search rules which are used by the memory to evaluate presented content for matching with the programmed rules. When the content being searched matches any of the rules programmed in the Programmable Intelligent Search Memory (PRISM) action(s) associated with the matched rule(s) are taken. Content search rules comprise of regular expressions which are converted to finite state automata and then programmed in PRISM for evaluating content with the search rules. The PRISM memory provides features for complex regular expression symbols like range detection, complement control, bit masking and the like and enables complex symbols and compact regular expression representation.

A system and technique for detecting data errors in a memory device. More specifically, data errors in a memory device are detected by initiating an internal READ command or cleansing operation from a set of logic which is internal to the memory system in which the memory devices reside. Rather than relying on a READ command to be issued from an external device, via a host controller, the cleansing logic initiates a cleansing routine in response to an event such as an operator instruction or a periodic schedule. By implementing the cleansing operation, the system does not rely on external READ commands to verify data integrity. Further, a monitoring device is coupled between the cleansing logic and a memory scheduler. The monitoring device provides a feed back mechanism from which to vary the frequency of certain memory requests such as the cleansing and scrubbing operations. The cleansing routine may rely on typical ECC error logging mechanisms and may be used in a RAID memory architecture. Further, the cleansing routine may be used in conjunction with other error logging and correction logic, as well as scrubbing logic.