94 results about "Charge retention" patented technology

An energy storage device includes a charge storage assembly, an auxiliary storage element, and a charge control circuit. The charge storage assembly includes an array of supercapacitors coupled in series, a plurality of batteries, and a charge retention circuit. Each of the plurality of batteries is electrically coupled to a corresponding supercapacitor in the array of supercapacitors. The charge retention circuit is configured to maintain a charge state of at least one supercapacitor in the array of supercapacitors when the at least one supercapacitor is in an idle state. A charge control circuit is configured to selectively transfer charge between the at least one supercapacitor in the array of supercapacitors and the auxiliary storage element.

An imaging element of one embodiment of the present disclosure includes: a first semiconductor substrate having first and second surfaces opposed to each other and including a plurality of pixels, a plurality of projections on the first surface with respect to each of the plurality of pixels; a plurality of photoelectric converters embedded in the first semiconductor substrate with respect to each pixel; a plurality of charge holding units on respective upper surfaces of the plurality of projections and holds electric; a second semiconductor substrate stacked on the side of the first surface of the first semiconductor substrate with one or more pixel circuits that generate a pixel signal based on an electric charge generated by each of the plurality of photoelectric converters; and a gate of a transfer transistor that is provided around the plurality of projections and transfers the electric charges held in the charge holding units to the pixel circuits.

Electronic device comprising a rechargeable battery and a voltage- or current-controlled power converter (150) for charging the battery, wherein the power converter (150) is designed to provide electrical power at an output voltage V out to charge the battery at an output of the power converter (150) from electrical power at an input voltage V into be derived at an input of the power converter (150), wherein the power converter (150) comprises an inductor (L), a first sub-converter (110) with several first switches (S1, S2, S3, S4) and a first capacitor cell (C1), and a second sub-converter (120) with several second switches (S5, S6, S7, S8) and a second capacitor cell (C2); wherein the power converter (150) comprises only a single inductor for the first sub-converter and for the second sub-converter, and a controller; wherein the controller is configured to control the several first and the several second switches such that the first and the second sub-converter are operated in a nested manner, and wherein a commutation cycle of the power converter comprises: - a first phase, during which the first capacitor cell and the inductor are connected in series between the input and the output of the power converter (150), and during which the second capacitor cell and the inductor are connected in series in parallel with the output of the power converter (150); - a second phase, during which the first capacitor cell and the inductor are connected in series in parallel with the output of the power converter (150), and during which the second capacitor cell and the inductor are connected in series between the input and the output of the power converter (150); and - a third phase, during which the first and second capacitor cells are decoupled from the output of the power converter (150), during which the charge of the first and second capacitor cells remains unchanged, and during which the inductor is arranged between the input and the output of the power converter (150) or is connected in parallel to the output of the power converter (150), wherein the controller is designed to control the multiple first and second switches in such a way that the power converter is operated in the third phase following the first phase and / or following the second phase within one commutation cycle, and wherein The controller is designed to do the following: - Determining an output current I out at the end of the first phase and / or at the end of the second phase; - Control the several first and second switches during the third phase such that the inductor is then arranged between the input and the output of the power converter (150) when the output current I out at the end of the first phase and / or at the end of the second phase less than a reference current I ref is; and - Control the several first and second switches during the third phase such that the inductor is then connected in parallel to the output of the power converter (150) when the output current I out at the end of the first phase and / or at the end of the second phase greater than the reference current I ref is.

The charge transfer characteristic is improved. The light detection device includes: a semiconductor layer; and a photoelectric conversion region provided in the semiconductor layer to be separated by the separation region. The photoelectric conversion region includes: a photoelectric conversion portion including a first semiconductor region of a first conductivity type, and provided in the semiconductor layer; a second semiconductor region of a second conductivity type provided between the partition region and the first semiconductor region; a charge holding section of a first conductivity type provided adjacent to the partition region in plan view and overlapping the second semiconductor region on the first surface side of the semiconductor layer; and a transfer transistor provided on the first surface side of the semiconductor layer, and transferring the signal charge photoelectrically converted by the photoelectric conversion portion to the charge holding portion. The separation region includes a fixed charge film having a positive fixed charge. In an interface between the semiconductor layer and the separation region, the fixed charge film is provided closer to the second surface side than at least the charge holding portion.

An imaging element includes a plurality of pixels each having a photoelectric conversion unit and a charge holding unit configured to accumulate charges generated in the photoelectric conversion unit, a voltage holding unit configured to hold a voltage signal according to the charges of the charge holding unit, a source follower unit configured to transfer the voltage signal to the voltage holding unit, a current source configured to drive the source follower unit, and a current source control unit configured to control the current source, wherein the current source control unit transfers the charges generated in the photoelectric conversion unit to the charge holding unit all at once, and the source follower unit and the current source are sequentially connected to sequentially transfer the voltage signal according to the charges accumulated in the charge holding unit to the voltage holding unit.

The present invention provides a solid-state image sensor that can achieve imaging using a global electronic shutter, obtain a focus detection signal, and increase the aperture ratio, as well as an imaging device using the same. [Solution] The solid-state image sensor comprises a plurality of pixels PX, each of which is provided with a plurality of photoelectric conversion units PDa, PDb that generate and store charge in accordance with incident light; a first charge holding unit CH to which the charge is transferred and held; a plurality of first switches TXa1, TXb1 that electrically connect and disconnect each of the plurality of photoelectric conversion units PDa, PDb to the first charge holding unit CH; a second charge holding unit FD to which the charge is transferred and held from the first charge holding unit CH; a second switch TX2 that electrically connects and disconnects the first charge holding unit CH to the second charge holding unit FD; and an amplification unit AMP that outputs a signal corresponding to the charge held in the second charge holding unit FD.

An imaging device with a semiconductor substrate, a photoelectric converter, an electric charge holder, and a first light-blocking section. The semiconductor substrate includes a pixel array section of unit pixels. The first light-blocking section includes a first horizontal light-blocking part and a first vertical light-blocking part that is orthogonal to the first horizontal light-blocking part. The first vertical light-blocking part includes a first row light-blocking part and a first column light-blocking part. The first vertical light-blocking part is provided for each of the unit pixels positioned every other column and in a 45-degree oblique direction. The first horizontal light-blocking part has, in plan view, an end at or in the vicinity of a position connecting one and another of intersections of the first row light-blocking parts and the first column light-blocking parts that are provided for the respective unit pixels positioned every other column and in the 45-degree oblique direction.

To facilitate connection between a gate electrode of a charge transfer section and wiring. The semiconductor apparatus includes a connection region, a photoelectric conversion section, a charge holding section, and a charge transfer section. The connection region is on the surface of the semiconductor substrate and to which wiring is connected. The photoelectric conversion section and the charge holding section are in the semiconductor substrate. The charge transfer section includes a MOS transistor including a gate electrode including a vertical electrode section disposed in the semiconductor substrate and a flat plate electrode section embedded in a surface of the semiconductor substrate and having a size in a plane direction of the semiconductor substrate different from that of the vertical electrode section and having wiring connected to an upper surface, and transfers a charge of the photoelectric conversion section to the charge holding section.

An image sensor includes: a photoelectric conversion unit that photoelectrically converts light to generate an electric charge; a holding unit that holds the electric charge generated by the photoelectric conversion unit; an accumulation unit that accumulates the electric charge generated by the photoelectric conversion unit; a first transfer path that transfers the electric charge generated by the photoelectric conversion unit to the accumulation unit; and a second transfer path that transfers the electric charge generated by the photoelectric conversion unit to the accumulation unit via the holding unit.

The present disclosure relates to an organic light emitting diode and an organic light emitting device having the diode. An organic light emitting diode including a plurality of delayed fluorescent materials with specific energy levels and an organic light emitting device including the diode is disclosed. When the plurality of delayed fluorescent materials with specific energy levels are applied in an emitting material layer, it is possible to minimize the energy loss or exciton quenching during luminescent process, to prevent the diode from reducing lifetime caused by the exciton quenching, and to make charges being injected into the emitting material layer in balance. When the emitting material layer includes other luminous material having a narrow FWHM, the organic light emitting diode can enhance its color purity.

An imaging system includes a plurality of pixels, each pixel including: a photoelectric conversion unit; two or more charge holding units; a transfer unit for transferring the electric charge from the photoelectric conversion unit to the charge holding units; a charge discharge unit for discharging the electric charge in the photoelectric conversion unit; and a read unit for reading a signal, and further includes a control unit for performing batch drive control of simultaneously driving at least one of the transfer units and the charge discharge units for the plurality of pixels, and performing the photoelectric conversion during two or more different exposure periods in one frame period and controlling one of times for reading signals in accordance with electric charges accumulated in each exposure period not to overlap the timing for the batch drive control.

The present disclosure relates to a liquid crystal compound, a preparation method therefor, and a use thereof. The liquid crystal compound provided by the present disclosure has relatively large negative dielectric anisotropy and the characteristics of high clearing point, relatively high optical anisotropy, moderate rotational viscosity, and liquid crystal miscibility, exhibits excellent low-temperature working effect, and shows good properties such as thermal stability, chemical stability, optical stability, and mechanical properties. Therefore, the driving voltage of a liquid crystal display device in which the liquid crystal compound is used can be effectively reduced, the response speed of the liquid crystal display device is increased, and the liquid crystal display device has the characteristics of moderate optical anisotropy numerical value, high charge retention rate, etc.

The purpose of the present invention is to improve the signal charge transfer capability. A light detection device includes: a semiconductor layer having a first face portion and a second face portion on opposite sides to each other; a photoelectric conversion unit that is provided in the semiconductor layer and performs photoelectric conversion on light incident from the second surface side of the semiconductor layer; a charge holding portion provided in the semiconductor layer and holding a signal charge obtained by photoelectric conversion in the photoelectric conversion portion; and a transfer transistor including a gate electrode and transferring a signal charge obtained by photoelectric conversion in the photoelectric conversion portion to the charge holding portion. The gate electrode includes a first electrode portion extending from a first face portion side to a second face portion side of the semiconductor layer, and a second electrode portion provided in the first electrode portion separately from the first face portion of the semiconductor layer and having an outer shape expanded more in plan view than the first electrode portion.

The invention discloses a storage-like enhanced GaN-based HEMT (High Electron Mobility Transistor) based on an in-situ oxidation gradient barrier and a preparation method thereof, which combines an optimized AlGaN barrier layer design of a gradient Al component and an in-situ oxidation technology, realizes a novel charge storage structure and well retains heterojunction characteristics at the same time. Specifically, a charge storage medium lamination layer is formed through self-saturation in-situ oxidation, an Al-rich component barrier is oxidized to form an AlON charge tunneling layer, a Ga-rich component barrier is oxidized to form a GaON charge storage layer, and part of the high Al component barrier is reserved to maintain higher two-dimensional electron gas concentration, so that the process complexity is reduced, and the efficiency is improved. The problems of migration rate reduction and two-dimensional electron gas concentration reduction caused by etching damage are avoided, a high-quality medium interface is formed through in-situ oxidation, and the threshold stability of the device is improved; the Al2O3 charge blocking layer prevents stored electrons from leaking to the grid electrode, and better charge retention characteristics can be obtained.

The invention provides an indoor logistics transportation robot based on electrostatic repulsion and a control method, and the structure of the robot comprises a stator unit array which is laid on the indoor ground and is formed by arranging a plurality of annular electrode units with the same structure in a matrix; the rotor aircraft is used for bearing articles, and a main body of the rotor aircraft is an electret film which is subjected to polarization treatment and has charge retention capability; and the control system is electrically connected with the stator unit array and is used for providing modulated high-voltage electric signals for the annular electrode units. Pure electric field driving is adopted, no mechanical contact exists between the stator and the rotor, and the zero-noise and zero-abrasion transportation process is achieved; a traditional voltage regulator voltage regulation mode is abandoned, a square wave duty ratio modulation technology is adopted, the response speed is high, and the control precision is high; and in combination with four-quadrant partition control, flexible planar omnidirectional movement and path planning are realized.

The application relates to the technical field of data storage, and discloses a data storage integrity verification method and system for a solid-state memory. The method comprises the following steps: collecting read-write instructions, programming and erasing cycle times, and charge retention times; performing voltage drift analysis based on the read-write instructions to obtain drift grouping data, and counting flip frequency distribution; performing storage block degradation analysis by combining the flip frequency distribution, the programming and erasing cycle times, and the charge retention times, to obtain a high-risk area; extracting a risk voltage drift amount, counting read-write interference amounts, and combining the risk voltage drift amount and the read-write interference amounts into an error feature vector; identifying a hard error type through a support vector machine model; performing reliability determination based on the hard error type and the flip frequency distribution, generating a check trigger signal, and positioning an accurate bit flip address; combining a data importance degree library to evaluate a repair priority sequence; performing data repair, periodically checking a repaired successful area, and obtaining an integrity verification report. The method improves the reliability of a storage system.

The invention provides a preparation method of a non-volatile memory ONO structure with low chlorine element content. The method comprises the following steps: growing an oxide layer on the surface of a substrate by using an in-situ water vapor generation process; nitriding the oxide layer by using a plasma nitriding process to form a composite structure of a tunneling oxide layer and a step layer; the composite structure is subjected to annealing treatment after nitriding; and sequentially forming a charge trapping layer and a barrier insulating layer on the composite structure by using a deposition process. According to the invention, a novel combined process is used for replacing a traditional low-pressure furnace tube process to grow the underlying medium, so that the chlorine content in an ONO structure, especially in a tunneling layer and a step layer, is remarkably reduced, and the defect level is reduced, thereby effectively improving the charge retention capability, durability and reliability of the nonvolatile memory.

An imaging apparatus includes a semiconductor substrate, a photoelectric conversion unit in the semiconductor substrate and generates charge corresponding to the amount of received light by photoelectric conversion, a charge holding unit on a side closer to a first surface of the semiconductor substrate than to the photoelectric conversion unit, and holds the charge transferred from the photoelectric conversion unit, a charge transfer unit which transfers the charge from the photoelectric conversion unit to the charge holding unit, a vertical electrode in a depth direction of the semiconductor substrate, the vertical electrode transmitting the charge generated by the photoelectric conversion unit to the charge transfer unit, and a first light control member at a position overlapping the vertical electrode when the semiconductor substrate is seen in a plan view from a normal direction of the first surface, and in a pixel region without straddling a boundary between pixels.

Dynamic range expansion in a solid-state imaging element using a global shutter is disclosed. In one example, a solid-state imaging element includes a first transfer transistor, a second transfer transistor, and an overflow gate. The first transfer transistor transfers a charge from a photoelectric conversion element to a charge holding section. The second transfer transistor transfers a charge from one of the charge holding section and the photoelectric conversion element to a first floating diffusion layer. The overflow gate causes a second floating diffusion layer to hold a charge having overflowed from the photoelectric conversion element.

The invention relates to the technical field of batteries, and discloses a nickel-zinc battery gel electrolyte capable of improving high-temperature performance and a battery preparation method, which comprises the following steps: mixing a monomer mixed solution containing potassium acrylate, polyethylene glycol methyl ether methacrylate, a cross-linking agent and an initiator with a mixed alkali solution system to prepare a pre-polymerized solution; assembling the positive plate, the negative plate and the diaphragm, and injecting the prepolymerization liquid; and heating to initiate in-situ polymerization to form the gel electrolyte. The functional monomer PMEM is introduced to construct a three-dimensional polymer network with a flexible polyether side chain together with KAA, the network structure effectively binds water molecules, and side reactions such as positive electrode material structure collapse, oxygen evolution and zinc negative electrode corrosion caused by too high activity of the water molecules at high temperature are inhibited; meanwhile, PMEM ether oxygen atoms slow down diffusion and dissolution of the zinc negative electrode in the storage process; according to the prepared nickel-zinc battery, the high-temperature cycle life, the high-temperature floating charge life and the high-temperature charge retention rate are improved, and the problem that an existing nickel-zinc battery is poor in high-temperature performance is solved.

Embodiments of the present disclosure relate to devices and methods for staggering the timing of skip refresh operations on a memory. Memory cells of a memory can need to periodically perform refresh operations. In some cases, when the charge retention characteristics of the memory cells of the memory exceed the auto-refresh frequency, the auto-refresh operation can be periodically skipped. To reduce peak current consumption during refresh operations, the skip refresh operations can be staggered across different portions of the memory. In one example, the skip refresh operations can be staggered in time among memory dies of the memory to limit the number of memory dies performing auto-refresh operations to a maximum number. In another example, the skip refresh operations can be staggered in time among memory banks of a single memory array to limit the number of memory banks performing auto-refresh operations to a maximum number.

To reduce the size of a light detection element. The light detection element includes: a pixel including: a photoelectric conversion portion disposed on a semiconductor substrate and configured to generate a charge by performing photoelectric conversion of incident light; a first charge holding portion configured to hold a charge; a charge transfer portion configured to transfer charge to the first charge holding portion; a signal generating section configured to generate a signal corresponding to the charge held in the first charge holding section; and a second charge holding portion formed of a capacitor element formed in an insulating layer, the insulating layer being included in a wiring region adjacent to the semiconductor substrate, the second charge holding portion being coupled to the first charge holding portion. The capacitance element includes a lower electrode disposed adjacent to an inner wall of an opening formed in a capacitance element insulating layer in which the capacitance element is formed, an insulating film formed in a shape covering the lower electrode, and an upper electrode formed in a shape facing the lower electrode within the opening across the insulating film therebetween. The lower electrode is connected to a lower layer wiring disposed in a lower layer of the wiring area. The upper electrode is connected to an upper layer wiring disposed in an upper layer of the wiring region.

According to the invention, the image quality performance is improved. The photodetection device includes: a semiconductor layer having a first surface portion and a second surface portion on opposite sides to each other in one direction; a photoelectric conversion region provided in the semiconductor layer adjacent to the isolation region in plan view, the photoelectric conversion region having a rectangular planar shape; a photoelectric conversion unit provided in the photoelectric conversion region; and a transfer transistor that is provided in the photoelectric conversion region and transfers the signal charge obtained by photoelectric conversion by the photoelectric conversion unit to a charge holding unit. The charge holding portion is provided in the isolation region so as to span a center line that is orthogonal to an outer peripheral edge portion connecting both corner portions of the photoelectric conversion region in a plan view and passes through a center portion of the photoelectric conversion region.

There is provided a light detection device, including: a first pixel, including: a first photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a first charge holding unit that holds the signal charges accumulated by the first photoelectric conversion device and noise charges caused by parasitic light intensity, and a first discharge transistor; a second pixel, including: a second photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a second charge holding unit that holds the noise charges without holding the signal charges accumulated by the second photoelectric conversion device, and a second discharge transistor; and a wire connecting a gate of the first transistor to a gate of the second transistor.

To prevent a decrease in a saturation charge when a phase difference signal is generated. A pixel includes a plurality of photoelectric conversion sections that is formed on a semiconductor substrate and performs photoelectric conversion of incident light from a subject to generate a charge. An intra-pixel separator separates the plurality of photoelectric conversion sections. An overflow path in the intra-pixel separator transfers charges overflowed in the plurality of photoelectric conversion sections to each other. An overflow gate in the pixel and adjusts a potential of the overflow path. A pixel separator is disposed at a boundary between the pixels. A charge holding section holds the generated charge. A charge transfer section is disposed one-by-one for the plurality of photoelectric conversion sections and transfers the generated charge to the charge holding section. An image signal generating section generates an image signal on the basis of the generated charge.

To provide an electronic circuit capable of outputting stored data when an input of a control pulse is started, a drive circuit, and a control system.SOLUTION: An electronic circuit includes: a shift register circuit including a plurality of charge holding circuits; a counter circuit that counts the number of control pulses generated based on a control signal and input to the shift register circuit; and a selector circuit that selects any one of outputs of the plurality of charge holding circuits based on the control signal and a count value of the counter circuit.SELECTED DRAWING: Figure 6

Provided are an imaging control device, an imaging device, an imaging control method, and an imaging control program.　The imaging control device comprises a processor that controls an imaging element including a plurality of pixels. Each of the pixels include a photoelectric conversion unit, a charge holding unit that holds a charge sent from the photoelectric conversion unit, and a conversion unit that converts the charge into a signal. The processor: performs a first control for sending to the conversion unit a charge held in the charge holding unit of each pixel in a first region among the plurality of pixels; performs a second control for sending to the conversion unit a charge held in the charge holding unit of each pixel in a second region among the plurality of pixels; performs, between the first control and the second control, a third control for sending to the conversion unit a charge held in the charge holding unit of each pixel in the first region; and performs a detection process for detecting, on the basis of a signal obtained from the conversion unit by means of the third control, noise occurring in the charge holding unit.

To provide an imaging device capable of further suppressing noise in a pixel signal. An imaging device includes: a semiconductor substrate (30) that includes a photoelectric conversion portion (31) configured to photoelectrically convert incident light, or a charge holding portion (32) configured to hold charge photoelectrically converted by the photoelectric conversion portion; a field effect transistor provided on the photoelectric conversion portion, or on the semiconductor substrate near the charge holding portion; a contact plug (26) that extends in a direction normal to one main surface of the semiconductor substrate from a gate electrode (25) of the field effect transistor; and a projecting portion (27) that extends in an in-plane direction of the one main surface of the semiconductor substrate from the contact plug.

[Object] To provide a solid-state imaging element and an imaging device that can enlarge the dynamic range and convert even a small amount of photoelectrically-converted electric charges into an image signal. [Solving Means] According to the present disclosure, provided is a solid-state imaging element including a photoelectric conversion unit that generates electric charges according to an amount of received light, a first electric charge holding unit that is connected to the photoelectric conversion unit via a first node, a comparator that outputs a first signal when a potential of the first node and a predetermined potential coincide with each other, a reset unit that sets the first node to a reset potential according to the first signal, and a counting unit that counts and outputs the first signal, and in a first mode, the reset potential applied to the first node changes in time series.

This invention relates to the field of lithium manganese iron phosphate (LFP) cathode materials, specifically to a high-performance LFP cathode material and its preparation method. This method addresses the limitations of existing LFP cathode materials in terms of cycle charge retention and voltage decay. The preparation method uses lithium, iron, manganese, phosphorus, doped metal compounds, carbon, and 3,4-ethylenedioxythiophene as raw materials. Through the synergistic effect of magnesium doping and 3,4-ethylenedioxythiophene coating, the electronic conductivity and ion diffusion coefficient of LFP are significantly improved, thus enhancing the rate performance of the material. Furthermore, the cycle stability and overall performance of the material are greatly improved.