An
integrated circuit barrier structure disposed between high
dielectric constant
metal oxide and Cu or Al electrodes, for preventing
diffusion of species such as
oxygen,
bismuth, or lead from the high
dielectric constant
metal oxide into the Cu or Al electrodes. Such barrier structure also protects the Cu or Al electrodes against oxidization during deposition of the high
dielectric constant
metal oxide. The barrier structure can be formed as (1) a single layer of Pt, Ir, IrO2, Ir2O3, Ru, RuO2, CuO, Cu2O, Al2O3, or a binary or ternary metal
nitride, e.g., TaN, NbN, HfN, ZrN, WN, W2N,
TiN, TiSiN, TiAlN, TaSiN, or NbAlN, or (2) double or triple
layers of such materials, e.g., Pt / TiAlN, Pt / IrO2, Pt / Ir, Ir / TiAlN, Ir / IrO2, IrO2 / TiAlN, IrO2 / Ir, or IrO2 / Ir2O3 / Ir. Such barrier structures enable Cu or Al electrodes to be used in combination with high dielectric constant metal oxides in microelectronic structures such as ferroelectric stack and trench capacitors, non-volatile ferroelectric memory cells, and
dynamic random access memory (
DRAM) cells.