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991 results about "Anisotropic conductive film" patented technology

Anisotropic conductive film (ACF), is a lead-free and environmentally friendly adhesive interconnect system that is commonly used in liquid crystal display manufacturing to make the electrical and mechanical connections from the driver electronics to the glass substrates of the LCD. The material is also available in a paste form referred to as anisotropic conductive paste (ACP), and both are grouped together as anisotropic conductive adhesives (ACAs). ACAs have more recently been used to perform the flex-to-board or flex-to-flex connections used in handheld electronic devices such as mobile phones, MP3 players, or in the assembly of CMOS camera modules.

Build-up structures with multi-angle vias for chip to chip interconnects and optical bussing

A build-up structure for chip to chip interconnects and System-In-Package utilizing multi-angle vias for electrical and optical routing or bussing of electronic information and controlled CTE dielectrics including mesocomposites to achieve optimum electrical and optical performance of monolithic structures. Die, multiple die, Microelectromechanical Machines (MEMs) and / or other active or passive components such as transducers or capacitors can be accurately positioned on a substrate such as a copper heatsink and multi-angle stud bumps can be placed on the active sites of the components. A first dielectric layer is preferably placed on the components, thereby embedding the components in the structure. Through various processes of photolithography, laser machining, soft lithography or anisotropic conductive film bonding, escape routing and circuitry is formed on the first metal layer. Additional dielectric layers and metal circuitry are formed utilizing multi-angle vias to form escape routing from tight pitch bond pads on the die to other active and passive components. Multi-angle vias can carry electrical or optical information in the form of digital or analog electromagnetic current, or in the form of visible or non-visible optical bussing and interconnections.
Owner:CAPITALSOURCE FINANCE

Build-up structures with multi-angle vias for chip to chip interconnects and optical bussing

A build-up structure for chip to chip interconnects and System-In-Package utilizing multi-angle vias for electrical and optical routing or bussing of electronic information and controlled CTE dielectrics including mesocomposites to achieve optimum electrical and optical performance of monolithic structures. Die, multiple die, Microelectromechanical Machines (MEMs) and/or other active or passive components such as transducers or capacitors can be accurately positioned on a substrate such as a copper heatsink and multi-angle stud bumps can be placed on the active sites of the components. A first dielectric layer is preferably placed on the components, thereby embedding the components in the structure. Through various processes of photolithography, laser machining, soft lithography or anisotropic conductive film bonding, escape routing and circuitry is formed on the first metal layer. Additional dielectric layers and metal circuitry are formed utilizing multi-angle vias to form escape routing from tight pitch bond pads on the die to other active and passive components. Multi-angle vias can carry electrical or optical information in the form of digital or analog electromagnetic current, or in the form of visible or non-visible optical bussing and interconnections.
Owner:CAPITALSOURCE FINANCE

Build-up structures with multi-angle vias for chip to chip interconnects and optical bussing

A build-up structure for chip to chip interconnects and System-In-Package utilizing multi-angle vias for electrical and optical routing or bussing of electronic information and controlled CTE dielectrics including mesocomposites to achieve optimum electrical and optical performance of monolithic structures. Die, multiple die, Microelectromechanical Machines (MEMs) and / or other active or passive components such as transducers or capacitors can be accurately positioned on a substrate such as a copper heatsink and multi-angle stud bumps can be placed on the active sites of the components. A first dielectric layer is preferably placed on the components, thereby embedding the components in the structure. Through various processes of photolithography, laser machining, soft lithography or anisotropic conductive film bonding, escape routing and circuitry is formed on the first metal layer. Additional dielectric layers and metal circuitry are formed utilizing multi-angle vias to form escape routing from tight pitch bond pads on the die to other active and passive components. Multi-angle vias can carry electrical or optical information in the form of digital or analog electromagnetic current, or in the form of visible or non-visible optical bussing and interconnections.
Owner:CAPITALSOURCE FINANCE

Electroconductive particle placement sheet and anisotropic elctroconductive film

This invention provides an electroconductive particle placement sheet comprising electroconductive particles and an insulating resin sheet. The thickness of the insulating resin sheet is smaller than the average particle diameter of the electroconductive particles. Electroconductive particles are protruded from the reference plane (P1) on at least one side of the insulating resin sheet. The electroconductive particle in is part protruded from the reference plane (P1) is covered with a layer formed of the same resin as in the insulating resin sheet. The electroconductive particle placement sheet is characterized by satisfying a relationship of h1 > h2 wherein h1 represents an average protrusion height, which is the average of distance between the reference plane (P1) and a tangential line (L1), which is a tangential line parallel to the reference plane (P1) of the electroconductive particle and is in contact with the part protruded from the reference plane (P1), and h2 represents an average protrusion height which is the average of distance between the reference plane (P2) and a tangential line (L2), which is a tangential line parallel to the reference plane (P2) of the electroconductive particle and is on the side opposite to the tangential line (L1), provided that, when the tangential line (L2) is within the insulating resin sheet, h2 < 0; when the tangential line (L2) is on the reference plane (P2), h2 = 0; and when the tangential line (L2) is outside the insulating resin sheet, h2 > 0.
Owner:DEXERIALS CORP
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