58 results about "Flip chip" patented technology

The present application provides a flip chip light emitting diode and a manufacturing method thereof. The flip chip light emitting diode comprises a transparent substrate, an epitaxial composite layer, a first conductive type electrode pad, a second conductive type electrode pad and a wafer bonding composite layer. The epitaxial composite layer is disposed on the transparent substrate. The first conductive type electrode pad is disposed on the transparent substrate and electrically connected to the epitaxial composite layer. The second conductive type electrode pad is disposed on the epitaxial composite layer and electrically connected to the epitaxial composite layer, and is located on the same horizontal plane as the first conductive type electrode pad on the same side of the transparent substrate. The wafer bonding composite layer comprises at least one titanium dioxide (TiO2) layer and at least one silicon dioxide (SiO2) layer, and is interposed between the epitaxial composite layer and the transparent substrate.

A light emitting diode (LED) structure that includes a stent substrate; and a circuit having a plurality of contact pads arranged along a length of the stent substrate. The structure further includes a plurality of light emitting diode (LED) chips, wherein each light emitting diode chip in the plurality of chips is engaged to a set of contact pads along the length of the metal stent substrate. A continuous phosphor layer is present overlying the plurality of light emitting diode (LED) chips, the continuous phosphor layer including first portions that are in direct contact with at least a light transmission surface of the light emitting diode (LED) chips and second portions that bridge across the space separating adjacently positioned light emitting diode. An encapsulant present over the continuous phosphor layer that is covering at least the light emitting diode chips.

The utility model discloses an embodiment of backlight module and display module, this backlight module includes backboard, light guide plate, lamp plate and electronic component, and backboard includes bottom plate and side plate, and bottom plate and side plate form accommodating space, light guide plate is located bottom plate one side in accommodating space, and lamp plate is located light guide plate far from bottom plate one side, and lamp plate is fixedly connected with light guide plate, and lamp plate is provided with luminous element to light guide plate one side, and electronic component sets up on lamp plate, the technical scheme provided by the utility model embodiment, through with the integral design of lamp strip and circuit board as lamp plate, thereby save the connector for connecting lamp strip and circuit board, and through with lamp plate and light guide plate assembly together, and make lamp plate flip chip in light guide plate's light -admitting side, make backboard not use again make for the lug of bearing circuit board, and lamp plate also need not use screw lock on the lug of backboard, be favorable to simplifying backplate, save assembly work hours.

A packaged electronic device (100) includes a multilayer substrate (106) including a first side (103), a first layer (110) having a first plurality of conductive structures (112, 114, 116) along the first side (103), and a second layer (120) having a second plurality of conductive structures (122, 124, 126); a semiconductor die (101) soldered to a first set of conductive structures (112, 114); a conductive clip (108) directly connected to one of the conductive structures (116, 136) of the first layer (110) and directly connected to a second side (105) of the semiconductor die (101); and a package structure (140) surrounding a portion of the conductive clip (108) and the semiconductor die (101).

This invention discloses a simulation method, apparatus, medium, and device for flip chip underfill, relating to the field of flip chip underfill simulation technology. The invention simulates the flip chip underfill process within a computational domain divided into two meshes in a flow plane perpendicular to the depth direction using a color gradient lattice Boltzmann model. A color function clearly distinguishes between the wetting phase (filler adhesive) and the non-wetting phase (air) to dynamically track the two-phase interface. When simulating the flow field changes during the self-absorption process of flip chip underfill, the average curvature of the interface in the depth direction and the average frictional force of the upper and lower solid walls of the flip chip are introduced to determine the force applied at the two-phase fluid interface, thus reflecting three-dimensional physical effects. While maintaining near-two-dimensional computational costs, this invention significantly improves the accuracy of flip chip underfill simulation and can quickly predict the entire flip chip underfill process at a lower cost.

The utility model belongs to the production technology field of the thin film, especially relates to a guide pulley for the production of the thin film convenient to adjust, include: guide pulley, the both ends of guide pulley are fixedly installed with baffle, is seted up in the guide pulley sliding slot, sliding slot is slidably installed with moving link, and the top and bottom of moving link are equipped with lug, and the lug is seted up with the clamping slot, and the top and bottom of moving link are fixedly installed with the clamping block in two clamping slots respectively; Two fixed components, two fixed components are located in two lugs respectively, and are used for fixing two lugs respectively, threaded rod, threaded rod rotatory installation in sliding slot, the utility model can be convenient for personnel to adjust the position of two lugs, guarantee to be able to adjust two lugs to non-product area, thereby reduce the loss of product, and lug can be convenient for personnel to replace lug when wearing seriously, guarantee that lug will not cause the influence to the production line of product.

The utility model discloses a kind of three-dimensional interconnection structures based on wafer bump and gradient CTE transition, it is related to semiconductor packaging technical field, including hard board and chip, the trapezoidal cavity is formed by laser etching process to the hard board, and the bottom of shape cavity is formed by etching processing exhaust hole through hard board;The bottom of the chip is provided with flexible board, and the top of flexible board is formed with copper column bump by electroplating, the chip is connected with flexible board by copper column bump, the top of trapezoidal cavity is formed copper pad array by electroplating process;The utility model is etched cavity structure on hard board, chip flip chip is welded on copper bump array of flexible board, chip is embedded cavity after folding flexible board, it is applicable to Chiplet heterogenous integration, 2.5D / 3D packaging, high-frequency millimeter wave device etc. Scene, solve high-density wiring, thermal mechanical reliability and high-frequency signal transmission collaborative optimization problem of soft and hard board interconnection in semiconductor packaging.

The application relates to the field of keyboard manufacturing methods, in particular to a keyboard backlight module manufacturing method based on pre-packaged light-emitting chips. The method comprises the following steps: S1, pre-packaging light-emitting chips to form light-emitting units; S2, attaching the light-emitting units to a circuit board; S3, welding and fixing the pins of the light-emitting units to first pads on the circuit board through reflow soldering; and S4, performing secondary packaging coating on the top, side, bottom soldering point connection area and the peripheral circuit board area of the light-emitting units after welding. By adopting the pre-packaged flip chip light-emitting unit without a support and gold wire, the body volume and height of the light source part are greatly reduced. Meanwhile, a lamp groove is directly arranged on a light guide sheet to accommodate the light-emitting unit, so that the light source can be embedded in the light guide sheet, the overall structure is extremely compact, and the ultrathinning of the keyboard backlight module is finally realized, thereby meeting the pursuit of extreme thinness of modern electronic equipment.

The application discloses a FCCSP packaging structure and a manufacturing method thereof and electronic equipment, and belongs to the technical field of semiconductors, and comprises a substrate, a flip chip arranged on the surface of the substrate, a heat-conducting layer arranged on the surface of the flip chip, a heat sink bonded with the heat-conducting layer, and a plastic sealing layer covering the sidewall of the flip chip, the sidewall of the heat-conducting layer and the sidewall of the heat sink, wherein at least part of the heat sink is exposed to the plastic sealing layer. Compared with the prior art, the application combines the heat sink and the flip chip through the heat-conducting layer first, then performs overall plastic sealing and exposes the heat sink, thereby omitting the difficult step of etching and cutting the thick heat sink, so that the process is simplified and the overall profile height of the package is controlled under the premise that the heat sink has sufficient thickness to improve the heat dissipation efficiency.

The application discloses a highly integrated MEMS sensor packaging structure and a packaging method thereof, and the packaging structure comprises a cavity surrounded by several substrates, several chips and / or electronic components are arranged in the cavity, and a gas hole is arranged on the cavity, and the air pressure inside and outside the cavity is the same. In the application, the packaging structure is obtained by adopting a three-layer substrate pressing process, and flip chip mounting of the FCCSP chip is performed in the packaging structure, so that the functions of the MEMS sensor chip are realized, the FCCSP chip can also be used as a control chip, the area of the packaging structure is effectively reduced, and the cost is reduced; the gas hole on the packaging structure can meet the functional requirements of the MEMS sensor such as acoustics and air pressure, can reduce the collision of the FCCSP chip in reflow soldering, and the air pressure inside and outside the packaging structure is balanced due to the existence of the gas hole, so that the reliability and high heat dissipation requirements are met; the structure of the application is highly integrated and small in size, and provides a new idea for the development of the MEMS sensor.

The present disclosure relates to an electronic device (12) for a camera module (1) having a housing (2) forming a light entrance opening (4), the electronic device comprising: a substrate (14) having a first side (18) and a second side (20), the first side being arranged in the housing (2) to face the light entrance opening (4) and the second side being opposite the first side (18); and an image sensor (16) having a photosensitive portion, designed as a flip-chip, and mounted to the second side (20). The substrate (14) is formed to be translucent at least in the region of the photosensitive portion of the image sensor (16). The disclosure further relates to a camera module (1) comprising the electronic device and a method for manufacturing the electronic device (12).

The application provides a quality detection method, device, equipment and medium for FC flip-chip assembly after welding, comprising the following steps: synchronously collecting multi-modal data of the FC flip-chip assembly after welding in real time, generating to-be-fused multi-modal data after pre-processing the multi-modal data; extracting high-precision features from the to-be-fused multi-modal data, normalizing feature vectors of different modes, and splicing to generate to-be-recognized image data according to a dynamic weight distribution rule; inputting the to-be-recognized image data into a pre-constructed defect recognition model based on deep learning to perform defect recognition, and outputting a defect recognition result based on a defect type, a defect position coordinate and a defect severity; inputting the defect recognition result into a constructed welding process parameter optimization strategy network to output a real-time adjustment strategy result, which is used for adaptive adjustment of welding process parameters; and the application effectively improves the production quality and reliability of the chip assembly.

This invention provides an integrated structure for flip-chip photodiodes and a method for manufacturing the same. The integrated structure includes a first flip-chip photodiode unit, a second flip-chip photodiode unit, a first shared electrode, and a second shared electrode. The first flip-chip photodiode unit includes a first substrate; the second flip-chip photodiode unit includes a second substrate, wherein the second flip-chip photodiode unit is disposed adjacent to the first flip-chip photodiode unit, and the first mounting surface of the first substrate and the second mounting surface of the second substrate are coplanar; the first shared electrode is disposed at least on the first mounting surface; the second shared electrode is disposed at least on the second mounting surface, wherein the first and second flip-chip photodiode units operate independently and simultaneously by electrically connecting the first and second shared electrodes.

The utility model relates to the field of fixed crystal production discloses a kind of fixed crystal machine rocker plate structure and its application's fixed crystal machine, the rocker plate structure includes vibration disc, conveying track, material blocking piece, electric slide rail and pusher, conveying track includes receiving track, vertical oblique track and horizontal straight track, material blocking piece includes fixed seat and material blocking head, electric slide rail is located below horizontal straight track, pusher includes sliding seat and pusher head, sliding seat is driven to slip by electric slide rail, material blocking piece blocks wafer material flow to make conveying track be covered with single wafer, when pusher head pushes wafer material flow on horizontal straight track to move to straight track end, material blocking head needs to be separated from working condition, the cooperation of pusher and material blocking piece realizes the quantitative wafer material flow conveying of horizontal straight track end, improves feeding efficiency while reducing the control complexity of carrier disc cooperation operation, and wafer material flow feeding is more stable and reliable by pusher.

The potential for thinner mobile devices depends on the dimensions of the camera module. [Solution] This disclosure relates to an electronic device (12) for a camera module (1) having a housing (2) forming a light-incident aperture, the electronic device (12) comprising a substrate (14) having a first surface (18) positioned within the housing (2) facing a light-incident aperture (4), and a second surface (20) opposite to the first surface (18), and an image sensor (16) having a photosensitive portion, designed as a flip chip, and mounted on the second surface (20). The substrate (14) is formed to be translucent in at least the area of ​​the photosensitive portion of the image sensor (16). This disclosure further relates to a camera module (1) comprising the electronic device, and a method for manufacturing the electronic device (12).

A thin film flip chip package structure includes a flexible substrate, a plurality of pins, and a chip. The flexible substrate has a chip bonding region. The plurality of pins is disposed on the flexible substrate and each pin has an inner pin portion extending into the chip bonding region, wherein the plurality of pins includes a first pin, and a first inner pin portion of the first pin has an opening. The chip is disposed in the chip bonding region, wherein the chip has a plurality of bumps corresponding to the inner pin portions of the plurality of pins respectively and each having an inner pin bonding region overlapping with the inner pin portion. The plurality of bumps includes a first bump corresponding to the first inner pin portion and having a first inner pin bonding region, and a normal projection of the opening on the first bump is located in the first inner pin bonding region.

In a described example, an apparatus includes: a package substrate having a die mount surface; semiconductor die flip chip mounted to the package substrate on the die mount surface, the semiconductor die having post connects having proximate ends on bond pads on an active surface of the semiconductor die, and extending to distal ends away from the active surface of the semiconductor die and connected to the package substrate by solder joints; a thermal interposer comprising a thermally conductive material positioned over and in thermal contact with a backside surface of the semiconductor die; and mold compound covering a portion of the package substrate, a portion of the thermal interposer, the semiconductor die, and the post connects, the thermal interposer having a surface exposed from the mold compound.

The application provides a preparation method of a local cross section of a rotating chip welding point, and comprises the following steps: S1, positioning the rotating chip; S2, sticking the positioned rotating chip on the inner wall of a disposable mold according to the angle of the chip inclination through an adhesive; S3, configuring a sample embedding adhesive, pouring the sample embedding adhesive into the inclined disposable mold to obtain a sample through rotating chip sample embedding and solidification; S4, sequentially polishing, polishing and cleaning the sample to obtain a local cross section of a rotating chip welding point; and S5, photographing the local cross section of the rotating chip welding point to confirm the quality, and if the quality does not meet the requirements, repeating steps S1-S5 until the quality of the local cross section of the rotating chip welding point meets the requirements. The method is simple to operate, solves the technical problems that the rotating chip welding point is not easy to position and polish when the mold is cut obliquely, improves the quality of the local cross section of the rotating chip welding point, improves the conductive performance, and ensures the timeliness of product photography.

The utility model discloses a kind of flip chip full-automatic cleaning jigs, including by plate body, and the jig main body of setting up on plate body clamping assembly composition, clamping assembly includes setting on the placement recess of plate body, hollow position is formed in placement recess, plate body is equipped with rotating buckle in the edge position around placement recess, the side long edge of placement recess is retracted into the inner groove formed to plate body, jig main body is cooperated by placement recess and each rotating buckle and inner groove, realize the limit fixing of PCB board.The utility model solves the problem of looseness, displacement and drop board in the high-pressure cleaning process of flip bare wafer PCBA in prior art.

The present disclosure relates to an electronic device for a camera module having a housing forming a light-incident opening, including: a substrate having a first side which is to be arranged in the housing to face the light-incident opening and a second side which is opposite to the first side and an image sensor which has a light-sensitive portion, is designed as a flip chip, and is mounted to the second side. The substrate is formed to be translucent at least in the area of the light-sensitive portion of the image sensor. The disclosure further relates to a camera module comprising the electronic device and a method for manufacturing the electronic device.

A rework system includes a substrate, a plurality of primary substrate pads disposed on the substrate, and a plurality of repair substrate pads disposed on the substrate. The repair substrate pads are adjacent and correspond to at least a part of the primary substrate pads.

The utility model discloses a kind of three-dimensional combined sealing structures of heterogeneous chip based on die attach film, it is related to the field of semiconductor packaging technology, including middle layer substrate, the double-sided integration RDL layer of middle layer substrate, and the position of middle layer substrate corresponding RDL layer is formed LCV copper via by laser drilling;The upper of middle layer substrate is respectively provided with display drive IC and touch sensor IC, and display drive IC and touch sensor IC are formed with micro copper column bump on the side close to middle layer substrate, the utility model, by adopting flexible polyimide substrate as the interlayer of carrier, double-sided rewiring, form micro via array by laser drilling, inner wall fills nano copper paste, LCV copper via is formed by low-temperature sintering;Upper chip is flip-chip soldered on die attach film circuit by micro copper column bump, interconnection is realized by the wiring on die attach film, and NCF is filled in the gap between upper chip and interlayer;Lower substrate pad is directly interconnected with die attach film circuit by LCV copper via.

The utility model relates to a kind of FC-PBGA circuit structure for balancing warping stress, involve integrated circuit packaging field.This technical scheme is by flipping chip on plastic substrate, heat sink is attached to chip surface, the appearance of heat sink is square, inner cavity is circular, the Foot region of heat sink is adhered to plastic substrate by AD glue, the central region of heat sink is adhered to chip surface by Tim glue.In this case, by increasing the adhesion area between the Foot region of heat sink and plastic substrate, to balance the vertical stress generated by plastic substrate warping;Based on the inner cavity of heat sink is circular, combined with the force balance interaction of circular, to balance the horizontal stress generated by plastic substrate warping;Avoid stress damage in chip area, by improving heat sink structure design to balance and weaken the stress generated by warping, to reduce the failure risk in reliability assessment process.

This invention relates to the field of chip solder joint defect detection technology, and provides a chip solder joint defect detection method and system based on optical properties. The method includes: acquiring a flip chip to be tested; scanning multiple solder joint regions within the fixed chip to obtain a chip grayscale image set; performing the following operations on each chip grayscale image in the set: segmenting the solder joint region to obtain an optimized binary edge image; extracting image features from the corrected chip grayscale image to obtain a feature vector; summarizing the feature vectors to obtain a feature vector set corresponding to the chip grayscale image set; normalizing the feature vector set to obtain a normalized feature vector set; constructing a solder joint defect identification model; and inputting the normalized feature vector set into the solder joint defect identification model to obtain a set of normal solder joints and a set of defective solder joints. This invention can improve the accuracy and efficiency of chip solder joint defect detection.

This application relates to a shingled module without solder strip folding, belonging to the technical field of photovoltaic modules. It includes at least one cell string, each cell string comprising multiple cells arranged in a shingled manner. Both the front and back sides of each cell have main grids and several sub-grids perpendicular to the main grids. An insulating strip is provided on the back side of the cell string, and a busbar is provided on the side of the insulating strip away from the cells. Busbar structures are provided at the sub-grids on the back of the cells at both ends of the cell string. These busbar structures form a surface contact conductive connection with the sub-grids on the back of the cells at both ends of the cell string, collecting and conducting current to the busbars. The busbar structure of this application can convert the output electrode located at one end of the front side of the shingled cell string to the back side, thereby realizing a back-side busbar process while maintaining the consistency of the busbar structures at both ends of the shingled module, achieving unified busbar process parameters, improving process versatility, and facilitating automated processing.

Aspects of the subject disclosure may include, for example, a packaged integrated circuit device that includes two galvanically isolated integrated circuit die. The integrated circuit die include conductive coils that can be inductively coupled for wireless communications between the two galvanically isolated integrated circuit die. One of the integrated circuit die is flip chip mounted to the other integrated circuit die with the coils facing each other across an insulating layer that includes routing to provide power to the flip chip mounted integrated circuit die. Other embodiments are disclosed.

The application relates to a light emitting assembly based on a flip chip process, which comprises a PCB board, a laser, a silicon light chip and a DSP chip, the silicon light chip and the DSP chip are arranged on one side of the PCB board, the laser is arranged on the other side of the PCB board, and the laser emitted by the laser is coupled into the silicon light chip; a hollow window is arranged on the PCB board, a heat dissipation block is arranged in the hollow window, and the laser is arranged on the heat dissipation block. The application further provides a light module based on the flip chip process. According to the application, the silicon light chip and the DSP chip are arranged on one side of the PCB board, and the laser is arranged on the other side of the PCB board, so that the heat generated by the laser is guided to the side of the DSP chip through the heat dissipation block, the laser and the DSP chip are cooled in the same plane, the two are cooled in the main heat dissipation direction of the light module, the heat balance of the light module is improved, the high-temperature power consumption of the light module is reduced, the junction temperature of the laser under high-temperature working is reduced, and the output power is increased.

A semiconductor package comprises a semiconductor die. The semiconductor die comprises a metal pad. The semiconductor package also comprises a leadframe. The semiconductor package further comprises a bump structure between the semiconductor die and the leadframe. The bump structure comprises a first solder portion. The first solder portion is in contact with the metal pad. The bump structure also comprises a second solder portion. The second solder portion is in contact with the leadframe. The bump structure further comprises a metal post between the first solder portion and the second solder portion. The bump structure could reduce stress in BEOL layer of the semiconductor die to improve reliability of the semiconductor package.