25 results about "Tunnel diode" patented technology

A memory structure includes insulating layers, gate layers, a first doping layer, second doping layers, third doping layers, a columnar channel, a first dielectric layer, second dielectric layers, and a third dielectric layer. The first doping layer and the columnar channel penetrate through the insulating layers and the gate layers that are alternately stacked. The second doping layers are in direct contact with the first doping layer to form tunnel diodes, in which the second doping layers and the insulating layers are alternately stacked. The third doping layers surround the columnar channel and are connected to the second doping layers. The first dielectric layer is between the first doping layer and the gate layers. The second dielectric layers are between the third doping layers and the gate layers. The third dielectric layer is between the columnar channel and the third doping layers.

A vertical cavity surface emitting semiconductor laser (VCSEL) has a semiconductor multilayer structure with an optical resonator (12) consisting of semiconductor layers, the optical resonator (12) has a first Bragg mirror (16), a second Bragg mirror (18), and an active region (20) for generating laser radiation between the first Bragg mirror (16) and the second Bragg mirror (18). The active region (20) has a plurality of active layers (22, 24, 40) having a first active layer and at least one second active layer (22, 24), the second active layer (24) being the last active layer located before the second Bragg reflector (18). A first oxide barrier (26) and a first tunnel diode (30) for limiting a current are arranged between the first active layer (22) and the second active layer (24), and a second oxide barrier (32) is arranged on a side of the second active layer (24) facing away from the first active layer (22). A second tunnel diode (34) is arranged on the side of the second active layer (24) facing away from the first active layer (22). The invention also relates to a method for manufacturing the VCSEL.

A stacked III-V multi-junction solar cell having an upper surface and a lower surface, having a substrate layer constructed at the lower surface and a first sub-cell on or comprising the substrate layer, the first sub-cell having a first band gap, and having a second sub-cell disposed over the first sub-cell, the second sub-cell having a second band gap, the second band gap being disposed between the first band gap and the second band gap. The second band gap is larger than the first band gap, and having a tunnel diode formed between the first sub-cell and the second sub-cell, the first contact region comprises a plurality of metal layers, and the first contact region has a first metal layer which consists of silver or contains silver near the surface, and the second contact region comprises a second metal layer which consists of silver near the surface. In order to reduce reflections at the upper surface, there is a titanium layer configured as an uppermost metal layer over the first metal layer, and the titanium layer has a thickness greater than 5 nm.

The invention relates to a pressure sensor and a pressure detection method thereof. The pressure sensor includes: a substrate; a compressible sponge layer on the substrate; and a top flexible reflective layer on the compressible sponge layer; the tunnel diode circuit structure is arranged between the compressible sponge layers and comprises a radio frequency identification (RFID) antenna; the compressible sponge layer is used for reducing the distance between the top flexible reflecting layer and the substrate under the condition that the compressible sponge layer is deformed due to external pressure so as to adjust the capacitance value between the top flexible reflecting layer and the substrate; the tunnel diode circuit structure is used for adjusting self complex impedance under the condition that the capacitance value between the top flexible reflecting layer and the substrate is detected to be changed, so that the RFID antenna load is unbalanced, and a scattering signal is output; the scattering signal is used for determining the environment air pressure of the to-be-detected environment where the pressure sensor is located. By adopting the method, long-distance and high-reliability air pressure monitoring under a completely passive condition can be realized.

The application discloses a fast recovery power device with embedded tunnel diode structure and a production method thereof, wherein the power device has a plurality of uniformly arrayed heavy doped regions with opposite doped types under a neutral body region, and the heavy doped regions form a tunnel PN junction structure with the doped regions with opposite doped types in the neutral body region; the tunnel PN junction structure can provide an additional minority carrier leakage conduction channel when the power MOSFET device is switched from a conducting state to a closed state, reduces the tail current when the device is closed, makes the power device quickly closed from an open state, and thus improves the working speed of the device and expands the frequency band range of the power device. The application realizes the fast recovery characteristic of the device through the process steps of adding the arrayed opposite heavy doped regions and rapid thermal annealing, makes the power device have the advantages of low cost and fast recovery, and breaks the barrier that the VDMOS power device can only be used in the medium and low frequency field applications.

[Problem] The present disclosure provides: a resonant tunnel diode element capable of suppressing deterioration of negative conductance; and an electronic apparatus. [Solution] The present disclosure provides a resonant tunnel diode element comprising: a quantum well layer that is laminated on a nitride semiconductor and that has at least a first barrier layer, a well layer, and a second barrier layer; an emitter layer capable of applying an electric potential on the first barrier layer; a collector layer capable of applying an electric potential on the second barrier layer; a first spacer layer laminated between the first barrier layer and the emitter layer; a second spacer layer laminated between the second barrier layer and the collector layer; and an intermediate layer laminated between the second spacer layer and the collector layer. The bandgap of the intermediate layer is set to be greater than the bandgap of the second spacer layer.

A stack-type III-V multijunction solar cell having an upper side and an underside, which includes a substrate layer formed on the underside and a first subcell having a first bandgap on the substrate layer or comprising the substrate layer. A second subcell has a second bandgap and is arranged above the first subcell. A tunnel diode is formed between the first subcell and the second subcell. A finger-shaped first metallic contact region is formed on the upper side. A second metallic contact region is formed over a wide area on the underside. The first contact region comprises multiple metal layers and has a first metal layer comprising silver in a vicinity of the surface and has a titanium layer designed as the uppermost metal layer above the first metal layer to reduce reflection on the upper side. The titanium layer has a thickness of more than 5 nm.

Stacked multi-junction solar cell (S) comprising - at least one first subcell (SC1) with a first band gap and a first lattice constant - a second subcell (SC2) arranged above the first subcell (SC1) with a second band gap and a second lattice constant, - a first tunnel diode (TD1) arranged between the first subcell (SC1) and the second subcell (SC2) with an n + -layer and a p + -layer, where - the second band gap is larger than the first band gap and - the p + -layer of the first tunnel diode (TD1) comprises an As-containing III-V material, wherein - the n + -layer of the first tunnel diode (TD1) InGaP with a Ga content above 20% based on the Ga / In ratio of the n +-layer, and to suppress unwanted incorporation of an n-dopant into the p+ layer of the tunnel diode during deposition, - between the n + -layer and the p + -layer an intermediate layer (ZW) is arranged, - the intermediate layer (ZW) is always thinner than the n + -layer and as the p + -layer is, - the intermediate layer (ZW) has a thickness of less than 6 nm or less than 4 nm, and - the intermediate layer (ZW) comprises As, wherein the As content of the intermediate layer (ZW) is higher than an As content of the n + -layer, and - the intermediate layer (ZW) is formed directly adjacent to the p+ layer and directly adjacent to the n+ layer, - the intermediate layer (ZW) with silicon with a dopant concentration of at least 10 18 N / cm 3 is endowed.

Resonant tunnel diode (10) comprising an electrically insulating substrate (12), a metal layer (14) and a transition metal oxide layer (16), wherein the metal layer (14) is applied to the substrate (12) and the transition metal oxide layer (16) is applied to the metal layer (14), and wherein the metal layer (14) and the transition metal oxide layer (16) have an amorphous structure.

A memory structure includes insulating layers, gate layers, a first doping layer, second doping layers, third doping layers, a columnar channel, a first dielectric layer, second dielectric layers, and a third dielectric layer. The first doping layer and the columnar channel penetrate through the insulating layers and the gate layers that are alternately stacked. The second doping layers are in direct contact with the first doping layer to form tunnel diodes, in which the second doping layers and the insulating layers are alternately stacked. The third doping layers surround the columnar channel and are connected to the second doping layers. The first dielectric layer is between the first doping layer and the gate layers. The second dielectric layers are between the third doping layers and the gate layers. The third dielectric layer is between the columnar channel and the third doping layers.

To provide an RTD element with improved stable operation.SOLUTION: The present disclosure provides a resonant tunneling diode element 10 in which a quantum well structure 18 having an emitter layer, multiple barrier layers 11 and 12 with a gradient potential, and a well layer 13 present between the multiple barrier layers, and a collector layer are stacked, and the quantum well structure includes an intermediate layer 15 in contact with the emitter layer side of the barrier layer 11 closest to the emitter layer, the intermediate layer having a defect level lower than the defect level of the barrier layer.SELECTED DRAWING: Figure 6

The invention discloses a modularized power supply control system and method based on a DSP, and relates to the technical field of power electronics and automation control, and the method comprises the steps: carrying out the adaptive switching between two levels and three levels based on a standardized input data set and a DPS, activating a quantum tunneling fault-tolerant mechanism when a load fluctuation rate exceeds a fault-tolerant switching threshold value, and generating a reconstruction instruction signal; based on the reconstruction instruction signal, the DPS adjusts the bias voltage of the quantum tunneling diode to realize nanosecond impedance matching, and synchronously updates phase difference parameters of adjacent units; and according to the matching result and the phase difference parameter, calculating an optimal control parameter through a quantum annealing algorithm, and transmitting the optimal control parameter to the DPS main control unit. According to the invention, effective signals are screened by using a quantum tunneling assisted noise filtering algorithm and a standardized input data set is generated, so that accurate filtering of high-frequency noise and efficient standardized processing of data in a complex electromagnetic environment are realized.

A stacked monolithic upright metamorphic multijunction solar cell, comprising at least one first subcell having a first band gap, a first lattice constant and being made up of germanium by more than 50%, a second subcell, which is disposed above the first subcell and has a second band gap and a second lattice constant, a metamorphic buffer disposed between the first subcell and the second subcell, including a sequence of at least three layers having lattice constants which increase from layer to layer in the direction of the second subcell, and a first tunnel diode, which is situated between the metamorphic buffer and the second subcell and which has an n+ layer and a p+ layer, the second band gap being larger than the first band gap, the n+ layer of the first tunnel diode comprising InAlP, the p+ layer of the first tunnel diode comprising an As-containing III-V material.

[Problem] The present disclosure provides: a resonant tunnel diode element capable of suppressing deterioration of negative conductance; and an electronic apparatus. [Solution] The present disclosure provides a resonant tunnel diode element comprising: a quantum well layer that is laminated on a nitride semiconductor and that has at least a first barrier layer, a well layer, and a second barrier layer; an emitter layer capable of applying an electric potential on the first barrier layer; a collector layer capable of applying an electric potential on the second barrier layer; and a first spacer layer laminated between the first barrier layer and the emitter layer. The average of the bandgap of the first spacer layer is set to be less than the average of the bandgap of the emitter layer.

The present disclosure provides a resonant tunneling diode including: a first barrier layer; a second barrier layer; a potential well layer between the first barrier layer and the second barrier layer, materials of the first barrier layer, the second barrier layer, and the potential well layer including a group III nitride, a material of the potential well layer including a gallium element; a first barrier layer between the first barrier layer and the potential well layer; and / or a second barrier layer between the second barrier layer and the potential well layer.

A stacked monolithic multi-junction solar cell having at least four subcells, wherein the band gap increases starting from the first subcell in the direction of the fourth subcell, each subcell has an n-doped emitter and a p-doped base, the emitter and the base of the first subcell each have germanium or consist of germanium, all following subcells each have at least one element of main group III and V of the periodic table, a tunnel diode with a p-n junction is placed between each two subcells, all subcells following the first subcell are formed lattice-matched to one another, a semiconductor mirror having a plurality of doped semiconductor layers with alternately different refractive indices is placed between the first and second subcell, and the semiconductor mirror is placed between the first subcell and the first tunnel diode.

Highly-doped narrow bandgap materials, which may be nearly metallic at room temperature, may behave as semiconductor materials with high-mobility carriers when the carriers are cooled to a low temperature, e.g., below 250 Kelvin. In such low temperature environments, materials with narrower bandgaps may be used to form tunnel diodes. For example, one or both of the n-doped and p-doped regions may include a material with a bandgap of less than 0.5 eV. The materials used may have a high number of carriers, leading to relatively high currents, and better performance compared to previous room-temperature tunnel diodes using silicon or other standard semiconductor materials. For example, materials for forming tunnel diodes for operation at low temperature may be degenerately doped, with dopant concentrations of at least 1018 cm−3 or 1019 cm−3.

This invention discloses a gallium oxide field-effect transistor based on the tunneling effect and its fabrication method, relating to semiconductor technology. It addresses the problem of insufficient electrical characteristics in existing short-channel gallium oxide radio frequency devices by proposing this solution. A silicon carbide substrate has an N-type doped region below the source and a P-type doped region below the gate; the N-type and P-type doped regions are arranged adjacently to form a tunneling diode; and both the N-type and P-type doped regions are electrically contacted with the lower end face of the gallium oxide epitaxial layer. The advantage is that the tunneling effect provides a fast discharge path for holes generated by impact ionization, thereby reducing the hole concentration in the channel region, improving the electric field distribution, and reducing the electric field peaks near the gate and drain. By controlling the doping concentration and thickness distribution of the tunneling layer, the depletion region of the channel can be effectively expanded, reducing the gate-source and gate-drain parasitic capacitances, thus improving the transconductance, cutoff frequency, and maximum oscillation frequency performance of the device.

One or more devices and / or methods provided herein relate to a method for fabricating a semiconductor device having a co-integrated RTD and HEMT. A semiconductor device can comprise an RTD and an HEMT that are co-integrated along a substrate. A fabrication method can comprise providing a heterostructure comprising a plurality of transistor layers of an HEMT, forming on the vertical stack a template structure comprising an opening, a cavity and a seed structure, the seed structure comprising a seed material and a seed surface, and growing a plurality of diode layers of an RTD within the cavity of the template structure from the seed surface, wherein the RTD and HEMT are co-integrated along a substrate.

This invention discloses a reinforcement learning tracking control method for multimodal tunnel diodes, belonging to the field of automatic control technology. For tunnel diode circuit systems with multi-timescale characteristics and stochastic mode jumps, a discrete-time Markov jump singular perturbation system model is established. To address the numerical instability caused by singular perturbation parameters, the system is decomposed into slow and fast subsystems using timescale separation techniques. Reference signal dynamics are introduced to construct slow and fast augmented systems including tracking errors. A hetero-policy reinforcement learning algorithm, completely independent of the system dynamics model, is proposed. It iteratively solves the coupled algebraic Riccati equations using collected system input-output data to obtain the optimal control law. This method eliminates the dependence on precise mathematical models, effectively suppresses the adverse effects of multimodal stochastic jumps and fast-slow timescale coupling, ensures strong system robustness, and achieves tracking of the reference signal by the tunnel diode circuit.

One or more systems, devices and / or methods provided herein relate to a device that can facilitate generation of a pulse to affect a qubit and to a method that can facilitate fabrication of a semiconductor device. The semiconductor device can comprise an RTD and an FET co-integrated in a common layer extending along a substrate. A method for fabricating the semiconductor device can comprise applying, at a substrate layer, a template structure comprising an opening, a cavity and a seed structure comprising a seed material and a seed surface, and sequentially growing along the substrate a plurality of diode layers of an RTD and a plurality of transistor layers of an FET within the cavity of the template structure from the seed surface, wherein the RTD and FET are co-integrated along the substrate.

The invention discloses a fuzzy event triggering optimal control method of a tunnel diode circuit, and belongs to the field of automatic control. A T-S fuzzy model is adopted to describe dynamic characteristics of a nonlinear tunnel diode circuit system under an event trigger mechanism, and an optimal control scheme is constructed under a zero sum differential game framework. Specifically, a tunnel diode circuit system is modeled as a continuous time fuzzy Markov jump system; designing a novel event triggering condition; an event triggering optimal control strategy is solved online by means of a model-free actuator-evaluator Q learning algorithm, and the weight estimation error bounded performance and the consistent final bounded stability of a closed-loop system are guaranteed. According to the method, the dynamic characteristics of the tunnel diode circuit under the event triggering mechanism can be accurately described, and the problem that system model information is unknown is effectively solved, so that fuzzy optimal event triggering control of the tunnel diode circuit system is realized, and the control performance and the resource utilization efficiency of the tunnel diode circuit system are improved.

The present application provides a semiconductor device, comprising: a plurality of tunnel diodes, each comprising a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type disposed on the first semiconductor region and having a shape of a nanowire; an insulating film covering side surfaces of the second semiconductor regions; a plurality of first electrodes each connected to the first semiconductor region; and a plurality of second electrodes each connected to the second semiconductor region, the second electrode having a first surface, the first surface opposing the side surface of the second semiconductor region via the insulating film, and the diameters of the second semiconductor regions being different between the plurality of tunnel diodes.

The invention provides a memory structure, a manufacturing method thereof, an operating method thereof and a memory array. The memory structure comprises a plurality of insulating layers, a plurality of gate layers, a first doped layer, a plurality of second doped layers, a plurality of third doped layers, a columnar channel, a first dielectric layer, a plurality of second dielectric layers and a third dielectric layer. The first doped layer and the columnar channel penetrate through the insulating layers and the gate layers which are alternately stacked. The second doped layers are in direct contact with the first doped layers to form a plurality of tunnel diodes, in which the second doped layers and the insulating layers are alternately stacked. The third doped layer surrounds the columnar channel and is connected to the second doped layer. The first dielectric layer is located between the first doped layer and the gate layer. The second dielectric layer is located between the third doped layer and the gate layer. The third dielectric layer is located between the columnar channel and the third doped layer.

A negative differential resistance (NDR) device, such as Gunn diode or a tunnel diode, is included in an integrated circuit device to regulate voltage delivered to circuitry on the device, such as a logic circuit or memory circuit. The NDR device may be biased at a knee voltage to provide a stable supply voltage to the IC device. The NDR device may be implemented in a metallization layer of the integrated circuit device.