13964results about "Electric pulse generator" patented technology

An optical reader for decoding an encoded symbol character of a symbology includes a scan data signal processor having as an input a scan data signal encoding information representative of the encoded symbol character. The scan data signal processor includes a first time delay stage adapted to provide a primary phase waveform from the scan data signal, a second time delay stage adapted to provide an early phase waveform from the scan data signal, and a third time delay stage adapted to provide a delayed phase waveform from the scan data signal. The early phase waveform has a propagation delay less than the primary phase waveform, and the delayed phase waveform has a propagation delay greater than the primary phase waveform. The scan data signal processor further includes a peak window detection stage for generating a peak window timeframe when an amplitude of the primary phase waveform is greater than, less than, or equal to both an amplitude of the early phase waveform and the delayed phase waveform. The optical reader further includes a digitizer circuit adapted to accept, within the peak window timeframe, the scan data signal processor output.

A circuit includes an input stage, an output stage, and a delay stage. The input stage is operative to receive a clock signal and a first and second input signal. The output stage is operative to receive the clock signal. The output stage is also operative to generate a first and second output signal based on the clock signal and the first and second input signals. The delay stage is operatively coupled to the input and output stages. The delay stage includes a first and second branch. The second branch includes at least one more delay element than the first branch.

A loss-of-signal detector includes digital and analog monitoring of incoming data. The incoming signal is compared digitally to at least one predetermined pattern that may indicate a loss of signal, and also is monitored by an analog detector that detects transitions in the data. If the digital comparison fails to match any of the at least one predetermined pattern, or if transitions are detected by the analog monitoring, even if the digital comparison produces a pattern match, then loss of signal is not indicated.

A method for closing an opening in a wall of a body lumen wherein an elongate member is advanced into the body lumen and a distal portion of an obturator is positioned distally beyond the distal end of the elongate member within the body lumen and in which one or more expandable elements on the distal portion of the obturator are expanded. The obturator is then withdrawn until the expandable elements contact the wall of the body lumen and a clip having tines is advanced over the elongate member until the tines penetrate the wall of the body lumen. The tines and the expandable elements are offset from one another. The elongate member is withdrawn from the body lumen and the clip substantially closes the opening in the body lumen.

A sequential power transmission between a portable user-carried battery and first and second independent accessories. At least one primary inductive coupling coil is mounted on an article of apparel worn by the user, so as to place a primary coil adjacent a first intermediary inductive coupling coil on the first independent accessory. The energizing of the first intermediary coil energizes a second intermediary coil on the first independent accessory. The second intermediary coil, when energized, energizes a secondary coil on the second independent accessory for powering the use, including the charging of the batteries of that accessory.

Provided is a memory system in which a pair of differential signals transmitted via a pair of transmission lines are prevented from being terminated at the same voltage during a standby mode, thereby preventing a receiver from entering an unstable state. The memory system includes a pair of transmission lines, a transmitter that outputs a pair of differential signals to the pair of transmission lines, and a receiver that receives the pair of differential signals via the pair of transmission lines. A first termination voltage is applied to one of the pair of transmission lines, and a second termination voltage is applied to the other transmission line. The first termination voltage is determined to be different from the second termination voltage.

One embodiment of the present invention provides for a master or universal base and base tooling which addresses the general purpose Structured ASIC requirements. Another embodiment of the present invention provides for a common set of base tooling from which the master / universal base is created as well as additional custom bases with customized selection and quantity of embedded Platform ASIC functions. Embodiments can utilize conventional Structured ASIC architecture and processing and are compatible with traditional probing and packaging.

An semiconductor device, containing logic blocks and high speed connections between the blocks, where the connections utilize current direction for logic representation rather than voltage level. Such high speed connections comprise differential transmitters which drive a pair of adjacent wires with differential current pulses that are received by a differential receiver which may be put in a low power state between transmissions.

To reduce power consumption of a semiconductor integrated circuit and to reduce delay of the operation in the semiconductor integrated circuit, a plurality of sequential circuits included in a storage circuit each include a transistor whose channel formation region is formed with an oxide semiconductor, and a capacitor whose one electrode is electrically connected to a node that is brought into a floating state when the transistor is turned off. By using an oxide semiconductor for the channel formation region of the transistor, the transistor with an extremely low off-state current (leakage current) can be realized. Thus, by turning off the transistor in a period during which power supply voltage is not supplied to the storage circuit, the potential in that period of the node to which one electrode of the capacitor is electrically connected can be kept constant or almost constant. Consequently, the above objects can be achieved.

A driver circuit of a display device, which includes TFTs of a single conductivity type and outputs an output signal with normal amplitude. A pulse is inputted to TFTs 101 and 104 to turn ON the TFTs and a potential of a node alpha is raised. When the potential of the node alpha reaches (VDD-VthN), the node alpha becomes in a floating state. Accordingly, a TFT 105 is turned ON and a potential of an output node is raised as a clock signal becomes High level. On the other hand, a potential of a gate electrode of the TFT 105 is further raised due to an operation of a capacitance means 107 as the potential of the output node is raised, so that the potential of the gate electrode of the TFT 105 becomes higher than (VDD+VthN). Thus, the potential of the output node is raised to VDD without causing a voltage drop due to a threshold voltage of the TFT 105. An output at the subsequent stage is then inputted to a TFT 103 to turn the TFT 103 On, while the potential of the node alpha of TFTs 102 and 106 is dropped to turn the TFT 105 OFF. As a result, the potential of the output node becomes Low level.

The present invention relates to a method of making clips which can be used to engage body tissue for the purpose of closing wounds. Such clips are generally annular in shape and have radially inwardly extending tines. It is often desirable for such clips to have a small lateral dimension, but manufacturing difficulty has been encountered in making small clips because of the difficulty in cutting materials accurately when attempting to produce a clip with closely packed elements. The present invention avoids these difficulties by first forming a precursor which, in one embodiment, has the tines extending radially outwardly from the annular body and then forms the clip by inverting the precursor such that the tines extend radially inwardly. In an alternate embodiment, the precursor is formed with an over-sized lateral dimension and then compressed inwardly to bring the tines closer together and to reduce the lateral dimension of the precursor. It is preferred to manufacture such clips from a superelastic alloy such as nickel-titanium, in which case the inverted or compressed precursor must be heated and quenched to heat set the clip in its final shape.

In a logic circuit where clock gating is performed, the standby power is reduced or malfunction is suppressed. The logic circuit includes a transistor which is in an off state where a potential difference exists between a source terminal and a drain terminal over a period during which a clock signal is not supplied. A channel formation region of the transistor is formed using an oxide semiconductor in which the hydrogen concentration is reduced. Specifically, the hydrogen concentration of the oxide semiconductor is 5×1019 (atoms / cm3) or lower. Thus, leakage current of the transistor can be reduced. As a result, in the logic circuit, reduction in standby power and suppression of malfunction can be achieved.

Data storage circuits and components of such circuits constructed using nanotube switching elements. The storage circuits may be stand-alone devices or cells incorporated into other devices or circuits. The data storage circuits include or can be used in latches, master-slave flip-flops, digital logic circuits, memory devices and other circuits. In one aspect of the invention, a master-slave flip-flop is constructed using one or more nanotube switching element-based storage devices. The master storage element or the slave storage element or both may be constructed using nanotube switching elements, for example, using two nanotube switching element-based inverters. The storage elements may be volatile or non-volatile. An equilibration device is provided for protecting the stored data from fluctuations on the inputs. Input buffers and output buffers for data storage circuits of the invention may also be constructed using nanotube switching elements.