603 results about "Signal delay" patented technology

The invention relates to the technical field of fault detection, in particular to a heating and ventilation system fault positioning system and method based on big data, and the system comprises a multi-source sensing module, a disturbance feature module, a path modeling module, a frequency spectrum matching module and a fault positioning module. In the method, a real-time disturbance sequence is constructed through time window segmentation and parameter offset calculation, separation of an active response chain and an abnormal propagation path is realized through a directional joint state vector and a topological relation table, and time asynchronism of multi-device signal transmission is eliminated by adopting a dynamic time warping algorithm. In combination with a real-time parameter bidirectional verification mechanism of a frequency domain main frequency band energy mark, a valve opening degree and a pump rotating speed, the problem of path confusion in a multi-node parameter coupling scene of a traditional method is solved, the tracing efficiency of concurrent faults in a complex pipe network system is improved, the adaptability limitation of a single-dimensional threshold mechanism to equipment performance degradation is overcome, and the method is suitable for a complex pipe network system. And the error positioning probability caused by signal delay superposition is reduced.

The invention discloses an intelligent cleaning and feature extraction system and method for multi-modal industrial data, and relates to the technical field of equipment state monitoring. The method is used for solving the problems that multi-source heterogeneous signal time alignment is not accurate, fault features are easily covered by background noise, a causal chain is not clear under working condition changes, and feature stability is poor. Firstly, a matching window is dynamically adjusted based on the main vibration frequency of rotating equipment, temperature signal delay is calculated in combination with a material thermal expansion coefficient, and modal alignment is achieved; then, a fault sensitive frequency band is solved through a bearing pedestal kinetic equation, a frequency band protection window is constructed, frequency domain filtering and gradient truncation operation are executed, and microcrack high-frequency features are extracted; secondly, recognizing a fault propagation path by combining image definition and envelope spectrum kurtosis, and dynamically shrinking a frequency domain window bandwidth according to a real-time load; finally, the feature vector is reconstructed to a phase space, when the curvature change rate or the temperature drift exceeds the limit, parameter updating and frequency band readjustment feedback are triggered, and the stability and adaptability of the system are improved.

The invention relates to the field of industrial automation testing, discloses a multifunctional testing tool and method for an EUROMAP interface of an injection molding machine, and achieves the crossing from single function verification to system-level compliance evaluation. A test network is constructed through a controller, and deep compliance verification, coverage data interaction, exception handling and cross-layer response consistency are realized. The test tool integrates the functions of protocol analysis, signal simulation, fault injection and the like, supports dynamic generation of boundary value test scenes and abnormal injection of signal delay, CRC errors and the like, and verifies the time sequence / logic consistency of a protocol instruction and an execution mechanism response through a hardware-level timestamp alignment technology. According to the method, an evaluation report including compliance rating, fault diagnosis and optimization suggestions is automatically generated, the problems of single coverage dimension, insufficient abnormal simulation, cross-layer verification deficiency and the like of a traditional test are solved, the intelligence and standardization level of the injection molding machine interface test is remarkably improved, and the equipment interconnection and intercommunication performance is guaranteed.

The invention relates to the technical field of data processing, in particular to a multi-channel controllable power converter for realizing filtering processing and a filtering processing method, and the method comprises the steps: obtaining the signal delay time and voltage signal data of the multi-channel controllable power converter in a current monitoring time period and a historical monitoring time period; according to peak value distribution and frequency distribution of the voltage signal data in each historical monitoring time period, analyzing a noise interference degree, and combining the noise interference degree and the difference of a pulse width parameter change trend to obtain a synchronization characteristic index; according to the signal delay time of the current monitoring time period and the historical monitoring time period, combining the synchronization characteristic index to obtain a filtering weight; and decomposing the voltage signal data in the current monitoring time period according to the filtering weight, and filtering in combination with Gaussian characteristics of decomposed signal components to obtain filtered voltage signal data. The filtering processing result has a good processing effect, and the stability of power supply output is ensured.

The invention relates to the technical field of automatic control, and discloses a cable winding and unwinding speed self-adaptive control system under a dynamic working condition, which comprises an endogenous vibration sensing module configured on a cable reel supporting bearing and a system state decoding module, and the decoding module can decode a single original electric signal from a single original electric signal converted by the endogenous vibration sensing module. According to the invention, the core bearing structure of the reel is converted into an information source of a self-state, and multi-dimensional state information of real-time tension, overall rotational inertia of the system, abrupt change of friction and the like after temperature self-calibration is decoded in parallel, so that the self-adaptive control module is driven to match and execute a corresponding speed control strategy. Signal delay and system vulnerability caused by traditional multi-sensor layout are avoided, a control decision is made according to information reflecting the current system state, and the system further has the functions of optimizing a control strategy and compensating temperature influence according to historical data.

Disclosed in the present invention are an automatic delay calibration method for a smart speaker system, a device, and a storage medium. The method comprises: initializing a smart speaker system and performing environmental testing to preliminarily configure system parameters; exciting a target sound channel and playing a target test signal; locating a first test signal on the basis of a voice activity detection (VAD) algorithm, determining the start and end of the first test signal, and identifying a time difference of the first test signal to obtain a delay of main channels; locating a time of arrival of a second test signal on the basis of a fast peak search algorithm, and identifying a delay of a subwoofer; and performing delay calibration on the subwoofer and the main channels, and dynamically adjusting delay calibration parameters of the channels on the basis of a delay calibration amount, thereby achieving accurate time alignment between the subwoofer and the main channels. The present invention solves the problem of low-frequency signal delays that are difficult to process in conventional technologies, and particularly makes a breakthrough progress in the coordination of a subwoofer and other sound channels.

The invention relates to the technical field of physiological signal analysis, in particular to a sleep disorder intelligent diagnosis system based on a multi-modal knowledge graph, which comprises a signal lag analysis module, an abnormal signal identification module, a graph construction module, a graph path generation module and a diagnosis result output module. According to the method, difference comparison and normalized sequence analysis in a time window are performed on multiple types of physiological response data, and derivative trend identification and mutation section calibration are combined, so that collaborative identification of signal delay response and abnormal change positions is realized, and multi-dimensional information of duration, frequency and fluctuation amplitude in abnormal events is further structured; the method comprises the following steps: constructing a traceable symptom expression vector, extracting structural features of the traceable symptom expression vector in a time sequence evolution process through a cross-time window entity evolution path, identifying a growth trend of association strength between symptoms according to an attribute change direction and a path connection mode, and judging a fluctuation mode and an abnormal evolution tendency of a sleep state of a user in a specific time period.

The invention relates to the related technical field of robot fault detection, in particular to an industrial robot real-time fault detection method and system, and the method comprises the steps: analyzing the operation state of an industrial robot based on a communication state signal, determining a motion domain and sensing domain synchronization factor, configuring a cross-domain feature vector and a performance feature vector, and carrying out the fusion, the deep belief network is used for drawing up the fault probability graph and identifying the feature identifier to achieve fault reminding, the technical problems that a fault response strategy is fixed, complex and changeable industrial scene requirements are difficult to adapt, and fault reminding cannot be effectively conducted in time are solved, cross-domain feature vectors and performance feature vectors are constructed, and the fault reminding efficiency is improved. The method has the technical effects that the serial control sequence is dynamically verified, multi-scale decomposition is combined, signal delay fluctuation and retransmission frequency are accurately extracted, a deep belief network is used for fusing time sequence and spatial features to identify fault types, fault reminding is carried out through a fault probability distribution map, and the operation safety of the industrial robot is guaranteed.

The invention relates to the technical field of automobile fault detection, and discloses a self-adaptive optimization method and system of an automobile fault detection system and a storage medium. The method comprises the following steps: performing real-time detection on attitude data based on a preset inclination angle threshold value and steering signal delay, and generating angular velocity sensing data and a vibration interference identification result; performing characteristic decomposition on the attitude data stream, identifying abnormal fluctuation, judging whether a potential fault signal exists or not, updating the calibration frequency of the vehicle-mounted sensor, and obtaining adjusted parameter configuration information; a fusion result of the attitude data is analyzed, an evaluation index of deviation correction precision is calculated, a real-time feedback mechanism is constructed based on the evaluation index, and a fault signal correction scheme is generated; and constructing a continuous detection cycle, analyzing the matching effect of the calibration frequency and the steering signal delay, and if the deviation correction precision does not reach a first preset standard, iteratively processing the attitude data. According to the invention, the precision and response speed of adaptive optimization of the automobile fault detection system are improved.

The invention relates to the technical field of energy-saving permanent magnet motors, and discloses a permanent magnet rotor system capable of guaranteeing ultra-high-speed stability, which comprises a permanent magnet rotor and a controller, and is characterized in that the controller injects current synthesized by fundamental waves and specific space harmonics into a stator winding on the basis of not depending on rotor radial position feedback, so that the permanent magnet rotor is controlled to rotate; an electromagnetic potential well with radial self-recovery force is constructed in an air gap of the motor; moreover, the controller also monitors the change rate of an internal torque instruction, foreseeably and instantaneously reinforces the potential well to resist impact, and synchronously corrects the fundamental current to eliminate parasitic torque pulsation associated with reinforcement. And the rotor stability is converted from a dynamic adjustment problem depending on external high-speed closed-loop control to an intrinsic constraint problem of motor self-guarantee, so that the risk of failure caused by signal delay at an ultra-high speed in traditional reaction type control is reduced.

The invention relates to the technical field of intelligent inspection, in particular to a thermal power plant 5G private network and intelligent perception fused safety inspection system, which comprises a 5G private network communication module used for constructing a low-delay and high-reliability localized network in a thermal power plant; the multi-source intelligent sensing terminal is used for acquiring equipment state and environment data in real time; the edge computing node is used for data preprocessing and real-time analysis; the cloud intelligent analysis platform is used for realizing equipment fault prediction and safety early warning; through cooperative work of the multi-source intelligent sensing terminals and in combination with local preprocessing capability of the edge computing nodes, real-time acquisition and preliminary analysis of equipment state and environment data are realized, redundant data transmission is reduced, fault detection efficiency is improved, meanwhile, a 5G private network provides stable localized communication guarantee for a thermal power plant inspection system, and the power plant inspection system has a wide application prospect. The problem of signal delay or interruption caused by interference of a traditional wireless network is avoided, and the response speed and reliability of the system are remarkably improved.

A switching circuit includes a power switch, a first driver configured to drive the power switch based on a first input signal, a delay circuit configured to output a delayed input signal, and a second driver configured to drive the power switch based on the delayed input signal. The first driver has a first driving strength and is configured to drive the power switch in a first stage of operation. The delayed input signal is delayed by a delay value relative to a second input signal. The second driver has a second driving strength higher than the first driving strength and is configured to drive the power switch in a second stage of operation, which is subsequent to the first stage of operation.

The invention relates to the technical field of digital integrated circuit verification, in particular to a large-scale chip post-simulation log file intelligent analysis method and device and a medium. The method comprises the following steps: performing data cleaning on a post-simulation log file; dividing the cleaned log file into a plurality of sub-file blocks according to timestamps, starting multiple threads to process each sub-file block in parallel, counting the types and quantity of time sequence violations, extracting related logs and generating a time sequence violation file; classifying and analyzing the time sequence violation file by utilizing a machine learning algorithm; dynamically filtering the time sequence violation file according to a preset rule, screening key violation information, and repairing time sequence violation caused by signal delay; and in combination with a chip circuit structure and a signal transmission path, positioning a root module or node of a time sequence violation, formulating an optimization scheme and verifying a repair effect. According to the method, efficient and accurate analysis of the post-simulation log file of the large-scale chip is realized, and the efficiency and accuracy of chip verification are improved.

The invention provides a time sequence analysis method based on integrated circuit post-simulation, electronic equipment and a storage medium, and relates to the technical field of chip design. The method comprises the following steps: constructing an equivalent STA environment according to a post-simulation verification environment corresponding to a to-be-post-simulated module in a target integrated circuit; based on the STA environment, checking whether the interface signal delay of the to-be-simulated module conforms to a preset interface time sequence constraint or not; if not, performing time sequence repair on the interface through a virtual time sequence engineering change list so as to converge the interface time sequence; the method comprises the following steps: configuring a module to be subjected to post-simulation as an STA environment of top design, and outputting a target standard delay format file SDF when determining that an internal path of the module to be subjected to post-simulation meets a preset time sequence requirement, so that the STA environment equivalent to a post-simulation verification environment is constructed; according to the method, the interface time sequence violation of the module to be subjected to post-simulation in the post-simulation environment can be reproduced and repaired, the target SDF is generated for post-simulation, the post-simulation time is saved, and convergence of the verification time sequence of the post-simulation module is accelerated.

The application provides an audio and video signal processing system and a video conference terminal device using the same, and relates to the technical field of Internet.The system comprises an audio and video processing module, a signal preprocessing module, a signal delay measurement module, a signal synchronization processing module and a master control module, the audio and video processing module is used for separating audio signals and video signals in input audio and video data signals, the signal preprocessing module is used for preprocessing the audio signals, the signal delay measurement module is used for measuring relative delay amounts of the audio signals and the video signals, the signal synchronization processing module is used for performing delay compensation according to the relative delay amounts, realizing the synchronization of audio and video display, and the video conference terminal device further comprises a microphone, a camera, a display screen and a sound box.The system and the video conference terminal device can test the relative delay time of audio and video signals, perform delay compensation, ensure the synchronization of output audio and video pictures, and improve the video conference quality and user experience.

Wireless circuitry can include a processor that generates a baseband signal, an upconversion circuit that upconverts the baseband signals to a radio-frequency signal, and an amplifier that amplifies the radio-frequency signal. A tunable delay circuit can be used to selectively delay generation of the radio-frequency signal or to delay generation of another signal intended for the radio-frequency amplifier. The tunable delay circuit can be controlled using a closed-loop delay adaptation scheme. A feedback receiver that is coupled to an output of the amplifier can be used to generate a demodulated signal. A delay error measurement circuit can be used to receive the demodulated signal, to detect a peak by monitoring when an envelope of the demodulated signal crosses a threshold level, to compute an amount of asymmetry in the detected peak, and to output a signal that is used to control the tunable delay circuit.

The invention discloses a method and system for solving signal time delay based on multi-frequency-point phase calibration, and the method comprises the steps: obtaining the phases of different frequency point signals received by antennas in an antenna array based on a phase estimation method of orthogonal transformation; and according to the phases of different frequency point signals received by the antennas in the antenna array, time delay values of the signals received by the antennas in the antenna array are obtained. The method does not need to calculate the incoming wave angle of each antenna to the space target, is simple and reliable, is convenient to implement, and simplifies the design of an antenna array system.

The invention provides a low-orbit navigation enhanced satellite orbit and clock error integrated determination method, which comprises the following steps that: a low-orbit navigation enhanced satellite carries a GNSS (Global Navigation Satellite System) receiver, can receive a multi-system GNSS satellite navigation signal and can issue a navigation enhanced signal at the same time, a downlink signal and a satellite-borne GNSS receiver clock share the same source, and a deviation exists between the clock error and the clock error of the satellite-borne receiver; the satellite-borne observation data of the low-orbit satellite, the GNSS of the ground station and the observation data of the low-orbit satellite are fused, an observation model for fusion processing is given, and the orbit of the low-orbit navigation enhanced satellite, the receiver clock error and the downlink signal time delay deviation are integrally determined. Unified adjustment and parameter joint calculation of satellite-borne and downlink observation values of the low earth orbit satellite are realized.

The invention discloses a rainfall short-term and imminent forecasting method and device based on GNSS-PWV and numerical weather forecast fusion, and the method comprises the steps: calculating the real-time atmospheric precipitable water amount measured through GNSS signal delay, and obtaining the meteorological observation data and numerical weather forecast data of a base station; respectively constructing a physical forecasting model and a machine learning forecasting model through the atmospheric precipitable water amount, the variable quantity of the atmospheric precipitable water amount, the base station meteorological observation data and the numerical weather forecasting data, and respectively forecasting the precipitation probability and the precipitation amount by utilizing the physical forecasting model and the machine learning forecasting model; and a hybrid forecasting model is constructed, the model fuses the precipitation probability and precipitation forecast by the physical forecasting model and the machine learning forecasting model, and the final precipitation probability and final precipitation are obtained. According to the method, on the basis of traditional numerical weather forecast, time-varying information of GNSS-PWV is intelligently fused, and adaptive optimization is realized by dynamically adjusting the weights of a physical model and a data driving model, so that the precision and reliability of short and temporary rainfall forecast are remarkably improved.

The invention discloses a method for calibrating relative time delay of an uplink channel and a downlink channel between antennas, which comprises the following steps of: calibrating relative signal time delay difference of the downlink channels of the antennas in an antenna array to obtain relative signal time delay of the downlink channels of each antenna in the antenna array; and calibrating the relative signal delay inequality of the uplink channels of the antennas in the antenna array to obtain the relative signal delay inequality of the uplink channels of the antennas in the antenna array. The method is simple, reliable and convenient to implement, and the requirement for relative time delay of signals of the uplink channel and the downlink channel of each antenna of the antenna array in engineering practice can be met.

The invention discloses a packaging structure, a packaging method and an electronic component, and relates to the technical field of semiconductors, and the packaging structure comprises a first chip, a second chip, a first electric connection part, a second electric connection part and a rewiring layer. Through the superposition cross layout of the first chip and the second chip, while the integration level is ensured, the wiring space is expanded by using the radial distribution of the non-overlapping area, and the coverage connection of the re-wiring layer is matched, so that the high-density interconnection is realized, and the parasitic inductance and parasitic capacitance are reduced; meanwhile, the signal transmission path is shortened through the combination of the cross layout and the rewiring layer, and the parasitic inductance and the parasitic capacitance are further reduced; besides, paths of different signals can be physically isolated through independent distribution of the non-overlapping areas, parasitic inductance and parasitic capacitance are further reduced, signal delay, reflection and coupling interference are reduced, and the problem of poor signal transmission performance caused by wiring limitation in traditional packaging is effectively solved.

The application provides a vehicle control method and device, a storage medium and a vehicle, and belongs to the technical field of vehicles. In the case where the brake energy recovery function of the vehicle is in an activated state, a first available brake energy recovery capability value is input into a first prediction model, so that a second available brake energy recovery capability value at a second time can be predicted. Then, based on the first available brake energy recovery capability value, the second available brake energy recovery capability value and a brake pedal opening degree, a first brake energy recovery torque request value at a first time is determined, and in combination with a first coasting energy recovery torque, a first motor actual execution torque is obtained. Finally, based on the first motor actual execution torque and a second brake energy recovery torque request value at the second time, it is determined whether to disable the brake energy recovery function at the second time, so that the influence of CAN signal delay can be eliminated to a certain extent, and the brake energy recovery function can be prevented from being abnormally disabled.

The present application relates to a wireless communication system. Provided are a service signal sending method and a related device. The sending method comprises: an access network device acquiring an effective-capacity requirement corresponding to a user equipment, wherein an effective capacity is used for indicating a data transmission rate of a channel that meets data transmission requirements corresponding to a service, and the data transmission requirements comprise signal delay requirements; on the basis of the effective-capacity requirement, the access network device determining precoding corresponding to a downlink channel, wherein the precoding is used for adjusting the channel capacity of the downlink channel, such that the channel capacity of the downlink channel meets the effective-capacity requirement; and the access network device preprocessing, on the basis of the precoding, a service signal corresponding to the service, and sending the preprocessed service signal to the user equipment by means of the downlink channel. In the embodiments of the present application, the access network device can ensure that the channel capacity corresponding to each user equipment can meet the requirements for real-time performance and integrity of service data of the user equipment. In this way, the total effective capacity of a whole system can be improved while ensuring the total throughput of the system.

The invention relates to a two-step time-to-digital converter and a method thereof, a phase-locked loop and an analog-to-digital converter. The method comprises the following steps of: performing N1-stage delay on a reference signal rs in sequence, and performing coarse quantization on the delayed signal of each stage relative to a feedback signal fb; when the two signals are different, after the time t1 is delayed, the first arriving signal is selected as a time starting signal Start and the fb is delayed for the time t1 and then serves as a time stopping signal Stop in the delayed period, and when the two signals are the same, the rs is selected as Start after the time t2 is delayed, and the fb is selected as Stop after the time t2 is delayed; performing fine quantization formation on the Start and the Stop; and decoding the code into n1-bit high-bit binary codes and decoding the code into n2-bit low-bit binary codes. The technical problem that the area and power consumption of an existing two-step TDC are increased due to the fact that the number of logic gates of a selector is greatly increased along with the increase of coarse quantization bits is solved.

The invention discloses a multichannel clock buffer test system and method, and relates to the technical field of semiconductor testing, and the method comprises the steps: calibrating the delay of an optical clock signal of each time-to-digital converter node to a preset precision threshold value; a standard clock signal is injected into the clock buffer input channel, and the clock buffer is driven to enter a working state; triggering a time-to-digital converter array by using the calibrated optical clock signal, collecting timestamp data of each output channel of a clock buffer, and generating an original time data set; inputting the original time data set into a double-mixing processor, and outputting a multi-channel skew parameter and a three-dimensional cloud picture; the multi-channel skew parameter is converted to a life indicator value for each output channel of the clock buffer based on the multi-channel skew parameter invoking a material model. According to the invention, the original time data set is subjected to two times of frequency mixing processing through the double frequency mixing processors, and phase detection and spectrum analysis are combined, so that high-precision extraction of the time deviation value of each output channel of the clock buffer is realized.

The invention provides a post-simulation method of an integrated circuit, electronic equipment and a storage medium, and relates to the technical field of chip design. The method comprises the following steps: based on a static time sequence analysis STA environment, obtaining a static time sequence analysis result of a physical implementation PR netlist corresponding to a register transfer level RTL module in a target integrated circuit; according to a static time sequence analysis result, obtaining an average clock network delay corresponding to an interface register in the PR netlist, a target establishment time and a target retention time of each input interface signal and a target output delay of each output interface signal, and constructing an interface signal delay model corresponding to the RTL module according to the average clock network delay, the target establishment time and the target retention time of each input interface signal and the target output delay of each output interface signal; according to the interface signal delay model and the RTL module, post-simulation processing is carried out, the interface signal delay model matched with the RTL module in time sequence can be constructed, in addition, the interface signal delay model can be combined with the RTL module to reduce the verification scale of a whole chip, the verification efficiency is improved, and the verification process is simplified.

The invention relates to the technical field of medical data processing, in particular to an intelligent drainage method and system based on cerebrospinal fluid pressure, and the method comprises the steps: obtaining a pressure signal curve and a pulse period of a cerebrospinal fluid intelligent drainage system at each detection position; obtaining a synchronous conduction error value according to the signal change trend in the pulse period of the to-be-analyzed signal curves of each detection position and other detection positions in combination with the signal change trend between the historical signal curves; according to the signal delay condition between pulse periods in the signal curve to be analyzed of each detection position and other detection positions, combining the signal delay condition of the historical signal curve to obtain a signal delay characteristic value; according to the synchronous conduction error value, the signal delay characteristic value and the signal change trend, analyzing the signal artifacts of each pulse period in the signal curve to be analyzed to obtain an artifact-removed signal; the de-artifact signal is used for a drainage operation. According to the invention, the occurrence of misrecognition is reduced, and the reliability of intelligent drainage decision is ensured.

The embodiment of the invention discloses a phase discriminator circuit, a phase-locked loop circuit and a memory. The phase discriminator circuit comprises a phase discriminator unit which is connected with a first input path and a second input path; the first input path is used for inputting a reference clock signal to the phase discriminator unit; the second input path is used for inputting a feedback clock signal to the phase discriminator unit; the control unit is connected with the second input path of the phase discriminator unit and used for delaying the feedback clock signal for a preset time length to obtain a delayed clock signal, and the delayed clock signal is input to the phase discriminator unit through the second input path; wherein the phase discriminator unit obtains a first phase discrimination signal based on the feedback clock signal and the reference clock signal, and obtains a second phase discrimination signal based on the delay clock signal and the reference clock signal, and the first phase discrimination signal and the second phase discrimination signal are both used for representing the sequential relationship of clock signals input by different input paths of the phase discriminator unit.

The invention relates to the technical field of electrical equipment state monitoring, and discloses an electrical equipment partial discharge positioning detection method. The method comprises the following steps: acquiring synchronous current pulse sequences and ultrasonic waveforms through a pulse current sensor and an ultrasonic sensor; calculating a signal delay inequality; establishing a sound wave propagation multi-path database based on the three-dimensional structure of the switch cabinet and the sensor coordinates; matching the ultrasonic shape features with a database to determine an actual propagation path and an equivalent distance; combining the delay inequality, the sensor coordinate and the equivalent distance, and iteratively solving the optimal space coordinate of the discharge point by adopting a particle swarm optimization algorithm; and mapping the coordinates to the topological graph to generate a positioning report. According to the method, the sound wave aliasing effect is decoupled through the pre-established multi-path database, the time delay correction and coordinate solving process is optimized, and the positioning precision and efficiency are remarkably improved.

The invention discloses a method and system for calibrating relative signal time delay of a link of a deep space large-aperture antenna, and the method comprises the steps: building a coordinate system based on a to-be-calibrated antenna and a reference antenna, and determining a signal phase difference caused by the spatial path difference between the to-be-calibrated antenna and the reference antenna in an antenna array and a satellite; obtaining a downlink signal relative phase difference and an uplink signal relative phase difference of the antenna to be calibrated relative to the reference antenna in the antenna array based on a signal phase difference caused by a space path difference between the antenna to be calibrated and the satellite and between the reference antenna and the satellite; obtaining a relative signal time delay value of a link of the antenna; and according to the relative signal time delay value of the own link of the antenna, compensating the own link of the antenna to be calibrated so as to realize the signal time delay of the own uplink and downlink of each antenna of the calibration array. The method is simple and reliable, and signal delay calibration of an uplink and a downlink of a deep-space large-aperture antenna can be conveniently realized.