2869 results about "Signal delay" patented technology

A sense amplifier-based flip-flop includes a first latch, a second latch, a floating reduction unit, an input signal applying unit, a ground switch and a delay reduction unit. The first latch outputs a signal to a first output terminal pair, and outputs an evaluation signal pair corresponding to an input single pair to the first output terminal pair. The second latch latches the evaluation signal pair and outputs the evaluation signal pair to a second output terminal pair. The floating reduction unit is controlled by signals of the first output terminal pair and is operationally connected between current passing nodes of the first latch to prevent the first output terminal pair from floating. The input signal applying unit is disposed between the current passing nodes and a ground terminal, and receives the input signal pair. The ground switch is disposed between the input signal applying unit and the ground terminal, and is controlled by the clock signal. The delay reduction unit is disposed between the input signal applying unit and the ground switch, and reduces a signal delay from when the clock signal to when the evaluation signal pair is output from the second output terminal pair.

Closed loop wireless communication of signals using an adaptive transmit antenna array (3), in which a plurality of copies of signals to be transmitted by the transmit antenna array (3) are produced with delays and weights (wnj) that are functions of the multi-path transmission channel characteristics (H) from the transmit antenna array (3) to a receive antenna array (4) of a receiver (2) and are combined before transmission by the transmit antenna array. The delays and weights (wnj) of the transmit copies for each transmit antenna element are functions of the respective multi-path transmission channel characteristics (hn,m=1l=1,…⁢ ,hn,m=Ml=L)from that transmit antenna element to the receive antenna array (4) ssuch that the multi-path signal components propagated to each receiver element are received with distinguishable delays according to the propagation path. The receiver (2) combines the received signal components from each receive antenna element with delays and weights (u) that are respective functions of the multi-path transmission channels. Preferably, the receiver comprises a multi-finger RAKE receiver (6) that copies the received signals from the receive antenna array with delays and weights (u) that are respective functions of the multi-path transmission channels and combines the copied received signals.

The loss of data and / or the corruption of data that may occur in flash memory when a reset signal is received during a memory write cycle is prevented by delaying reset signals sent to the flash memory for a time period sufficient for a write cycle to be completed. The loss of data and / or the corruption of data that may occur in flash memory when the power supply is interrupted during a write cycle is prevented by providing a DC-to-DC converter with one or more large capacitors in parallel with its input as the power supply to the flash memory. If the system power supply fails or is interrupted, the discharge of the capacitor(s) delays the voltage decay at the input of the DC-to-DC converter such that the output of the DC-to-DC converter remains within tolerance for a time sufficient for the flash memory to complete a write cycle.

An encoder includes a sampler that samples an audio signal and that generates from the samples a plurality of short blocks of sampled audio. Each of the short blocks has a duration less than a minimum audibly perceivable signal delay. A processor combines the plurality of short blocks into a long block. The long block is transformed into a frequency domain signal having a plurality of independently modulatable frequency indices. The frequency difference between adjacent indices is determined by the minimum duration and the sampling rate of the sampler. A neighborhood of frequency indices is selected so that the frequency difference between a lowest index and a highest index within the neighborhood is less than a predetermined value. Two or more of the indices are modulated in the neighborhood so as to make a selected one of the indices an extremum while keeping the total energy of the neighborhood constant. A plurality of frequency bands are so coded. A decoder decides that a bit or bits have been received if, in a majority of the frequency bands, the decoder detects a modulated index.

In a shift register and LCD device having the shift register that may be employed in the liquid crystal display device having a large screen size and a large resolution, the shift register includes stages cascade-connected with each other and each of the stages have a carry buffer for generating a carry signal. The pull-down transistor of each of the stages of the shift register is divided into a first pull-down transistor and a second pull-down transistor. A power voltage Vona larger than the power voltage Von applied to a clock generator is applied to the shift register. A signal delay due to the RC delay of the gate lines may be minimized, the shift register is independent of the variation of the threshold voltage of the TFTs, and image display quality may not be deteriorated.

A flat panel display with good color mixture of three primary colors to achieve different hues and little signal delay is provided. The display includes signal lines including scan lines and data lines intersecting the scan lines, both arranged along straight lines. Red, green, and blue pixel driving circuit regions are defined by the intersection of the scan lines and the data lines. The pixel driving circuit regions having the same color are arranged adjacent to one another along a column direction. Red, green, and blue pixel driving circuits are placed in the pixel driving circuit regions and are coupled to the red, green, and blue pixel electrodes. The pixel electrodes are adjacent to pixel electrodes of a different color along both row and column directions.

A circuit analysis tool is provided, enabled with software instructions, for minimizing circuit crosstalk. The instructions provide a first circuit connected to an output mode, having a last gate with a plurality of inputs and an output. The instructions calculate a first circuit victim net delay range (timing window) having a minimum delay (Vmin) and a maximum delay (Vmax). A second circuit is provided having an output connected to the output node to supply an aggressor net delay range (A1) having a minimum delay (A1min) and a maximum delay (A1max). The aggressor net delay range at least partially overlaps the victim net delay range. Without increasing the value of Vmax (critical path timing), the first circuit victim net delay range is shrunk, thereby minimizing crosstalk between the first and second circuits without an increase in first circuit maximum signal delay.

Apparatuses, systems and methods for transmitting and receiving modulated impulse radio signals. An impulse radio receiver includes a time base, a precision timing generator, a template generator, a delay, first and second correlators, a data detector and a time base adjustor. The time base produces a periodic timing signal that is used by the precision timing generator to produce a timing trigger signal. The template generator uses the timing trigger signal to produce a template signal. A delay receives the template signal and outputs a delayed template signal. When an impulse radio signal is received, the first correlator correlates the received impulse radio signal with the template signal to produce a first correlator output signal, and the second correlator correlates the received impulse radio signal with the delayed template signal to produce a second correlator output signal. The data detector produces a data signal based on at least the first correlator output signal. The time base adjustor produces a time base adjustment signal based on at least the second correlator output signal. The time base adjustment signal is used to synchronize the time base with the received impulse radio signal.

A double data rate (DDR) synchronous dynamic RAM (SDRAM), or DDR-SDRAM, memory controller employing a delay locked loop (DLL) circuit to delay an SDRAM data strobe (DQS) signal to the center, or ‘eye’ of the read data window. However, in distinction from conventional techniques, the initial delay determined by the DLL is fine tuned with an offset determined by a memory test. Moreover, in an additional embodiment, the delay may be further adjusted during operation to compensate for environmental conditions by a PVT (process, value, temperature) circuit.

The present invention provides a synchronous demodulation apparatus of a base transceiver station in an Interim Standard-2000 (IS-2000) system, including a first synchronous demodulation unit, a received signal delay unit, an interference signal regeneration unit and a second synchronous demodulation unit. In comparison with an asynchronous demodulation apparatus used in an Interim Standard-95 (IS-95), it is possible for the inventive apparatus to improve a reception function approximately 3dB and ultimately increase the number of subscribers.

Disclosed is a method and apparatus for positioning a portable subscriber station (PSS) using a WiBro repeater, and a repeater having the apparatus. The method of positioning the portable subscriber station in a network having a radio access station (RAS) and a repeater, including the operations of: detecting a preamble signal transmitted from the RAS; generating a reference time by measuring a receiving time of the preamble signal and by compensating the receiving time of the preamble signal by taking into consideration a signal delay time between the RAS and the repeater; measuring a receiving time of a ranging signal received from the PSS on the basis of the reference time; and calculating the receiving time of the ranging signal by using a time stamp generated on the basis of the receiving time of the preamble signal.

An imaging apparatus having an imaging device for imaging an object in cooperation with an endoscope is connected to a video processing unit for producing a standard video signal so that it can be disconnected freely. A signal delay occurs over a signal line linking the imaging device and the video processing unit. For this reason, a timing generator and a phase adjustment circuit are incorporated in the imaging apparatus. The timing generator generates driving signals used to drive the imaging device, and the phase adjustment circuit adjusts the phases of the driving signals so that an output signal of the imaging device will be input to the video processing unit according to predetermined timing. Even when the signal line has a different length from any other or the imaging device offers a different number of pixels from any other, the difference can be readily coped with owing to the imaging apparatus. This leads to alleviation of a load incurred by the video processing unit.

A flex-rigid wiring board has an insulative adhesive interposed between portions, lapping over each other, of the rigid and flexible substrates; and the interconnecting electrode pads on the rigid and flexible substrates are electrically connected to each other through a conductor lump penetrating the insulative adhesive, thereby providing lowered inductance in the high-frequency band, shortened signal-delay time, reduced noise generation due to signal reflected-wave, reduced drop impact, high connection reliability and high freedom of wire connection, and the wiring board can advantageously be manufactured with a reduced cost and a high yield.

As a wiring becomes thicker, discontinuity of an insulating film covering the wiring has become a problem. It is difficult to form a wiring with width thin enough for a thin film transistor used for a current high definition display device. As a wiring is made thinner, signal delay due to wiring resistance has become a problem. In view of the above problems, the invention provides a structure in which a conductive film is formed in a hole of an insulating film, and the surfaces of the conductive film and the insulating film are flat. As a result, discontinuity of thin films covering a conductive film and an insulating film can be prevented. A wiring can be made thinner by controlling the width of the hole. Further, a wiring can be made thicker by controlling the depth of the hole.

Disclosed herein is an encryption and communication apparatus and method using a modulated delay time feedback chaotic system. The encryption apparatus of the present invention includes chaotic signal generating means for generating a high-dimensional chaotic signal in response to an original chaotic signal and a predetermined feedback chaotic signal, delay time modulating means for delaying the high-dimensional chaotic signal output from the chaotic signal generating means by a predetermined time and modulating the time-delayed chaotic signal, and feedback means for receiving the chaotic signal output from the chaotic signal generating means and the modulated time-delayed signal output from the delay time modulating means, performing addition and subtraction operations with respect to the received signals, and feeding the operated result back to the chaotic signal generating means. Accordingly, the present invention is advantageous in that it modulates a delay time so as to prevent an information signal contained in a chaotic signal from being attacked from the outside, so that it is impossible to detect an exact delay time contained in a modulated time-delayed chaotic signal and to decrypt the information signal, thus constructing a more robust and reliable encryption system.

A fire alarm system is provided including a controller having a signaling delay, a plurality of smoke and / or heat detectors, a plurality of audible devices which may include sirens, public announcement devices and the like, and a plurality of visible devices which may include strobes, fluorescent lighting and the like. The system provides a directional path to areas of safety for occupants in harms way.

Microphone includes: a microphone element; a simulative feedback signal generation section that generates a simulative feedback signal simulating a feedback signal generated by a sound, produced via a speaker, returning the microphone element; and an arithmetic operator that subtracts the simulative feedback signal, generated by the simulative feedback signal generation section, from a sound signal collected by the microphone element, to thereby output the subtraction result as a residual signal. The residual signal output by the arithmetic operator is supplied to an amplifier device of the speaker as an output signal of the microphone. The simulative feedback signal generation section includes a delay circuit that delays the residual signal, output by the arithmetic operator, by a given time, and an adaptive filter that generates the simulative feedback signal by filtering a previous residual signal delayed by the delay circuit. The adaptive filter updates a filter coefficient on the basis of the previous residual signal delayed by the delay circuit and a current residual signal output by the arithmetic operator.

A system, methods, devices and computer program products for controlling the operation of at least one electronic appliance, e.g. a TV, a music system, a lighting system, a kitchen appliance or an alarm system, located within a local area. The system has a mobile terminal located within the local area, the mobile terminal being configured to transmit a short-range radio signal to one or more short-range devices located within the local area. Each short-range device of the plurality of short-range devices located within the local area is configured to receive a short-range radio signal from the mobile terminal, perform a signal measurement of signal delay, signal strength, or both signal delay and signal strength of said short-range radio signal received from the mobile terminal, and transmit information about said measurement to an electronic apparatus. The electronic apparatus is configured to subsequently receive this information about the signal measurements from the plurality of short-range devices. In response thereto, the electronic apparatus is operable to determine the location of the mobile terminal, and control the operation of the at least one electronic appliance in dependence of the determined location of the mobile terminal.

A clock applying circuit for a synchronous memory is comprised or a clock input for receiving a clock input signal, apparatus connected to the synchronous memory for receiving a driving clock signal, and a tapped delay line for receiving the clock input signal and for delivering the clock driving signal to the synchronous memory in synchronism with but delayed from the clock input signal, the delay being a small fraction of the clock period or the clock input signal.

Trigger reception on different instrumentation devices may be synchronized by each instrumentation device generating one or more trigger enable signals and delaying performance of an operation in response to a trigger signal until a transition in a trigger enable signal. An instrumentation system may include several instrumentation devices and a communication medium coupling the instrumentation devices. One of the instrumentation devices may process data in response to a sample clock signal. That instrumentation device may also generate a trigger enable signal and delay performing an operation in response to a trigger signal transmitted via the communication medium until a transition in the trigger enable signal occurs. The trigger enable signal is not the sample clock signal. The trigger enable signal may be synchronized to another trigger enable signal generated by another one of the instrumentation devices.

A two-point frequency modulation apparatus is provided that reduces input timing difference and improves modulation accuracy. Two-point frequency modulation apparatus 10 has: PLL circuit 11; frequency division ratio generator 13 that generates the frequency division ratio in frequency divider 111 based on first digital baseband signal S1 and carrier signal; adder 114 that adds second digital baseband signal S2 to the output signal of loop filter 113; a delay index calculator (filter coefficient calculator 17) that calculates the delay index based on the magnitude of change in the amplitude of the output signal of adder 114; and a delay adjuster (digital filter 18) that shifts the phase of one of first digital baseband signal S1 and second digital baseband signal S2 according to the delay index so as to reduce the phase difference.

The control unit of a charge control apparatus for controlling charge of a storage battery connected in parallel to a solar cell panel has a voltage detector and a reference voltage generator for generating a reference voltage, both of which are connected in parallel to the storage battery, a delay device for delaying the output signal from the voltage detector by a predetermined time, and a comparator for comparing the signal delayed by the delay device with a reference signal generated by the reference voltage generator and controlling, in accordance with the comparison result, opening / closing of a switch for short-circuiting the output from the solar cell panel. With this simple arrangement, devices in the charge control apparatus can be protected even when the storage battery is disconnected for maintenance or the like.

A signal enhancement system improves the understandability of speech or other audio signals. The system reinforces selected parts of the signal, may attenuate selected parts of the signal, and may increase SNR. The system includes delay logic, a partitioned adaptive filter, and signal reinforcement logic. The partitioned adaptive filter may track and enhance the fundamental frequency and harmonics in the input signal. The partitioned filter output signals may approximately reproduce the input signal, delayed by an integer multiple of the period of the fundamental frequency of the input signal. The reinforcement logic combines the input signal and the filtered signals to produce an enhanced output signal.

The invention discloses a half-bridge LLC resonant converter with a synchronous rectification function that includes a first switch; a second switch; a first transformer; a first synchronous rectifier; a second synchronous rectifier; a controller; and a second transformer. The controller of the half-bridge LLC resonant converter with a synchronous rectification function can control the first synchronous rectifier and the second synchronous rectifier directly and the connected second transformer also can control the first switch and the second switch directly. The first synchronous rectifier and second synchronous rectifier having a low conducting resistance substitute the rectifier and greatly lower the power consumption. The controller outputs a control signal to drive a transformer to output a signal to the primary winding, and its signal delay is formed by a delay of an electronic circuit and a power MOS switch of the first switch and second switch.

Components, systems, and methods for determining propagation delay of communications in distributed antenna systems are disclosed. The propagation delay of communications signals distributed in the distributed antenna systems is determined. If desired, the propagation delay(s) can be determined on a per remote antenna unit basis for the distributed antenna systems. The propagation delay(s) can provided by the distributed antenna systems to a network or other system to be taken into consideration for communications services or operations that are based on communications signal delay. As another non-limiting example, propagation delay can be determined and controlled for each remote antenna unit to be uniquely distinguish the remote antenna units. In this manner, the location of a client device communicating with a remote antenna unit can be determined within the communication range of the remote antenna unit.