347results about "Reliability increasing modifications" patented technology

The embodiment of the invention provides a bus holding circuit and a bus holder. The bus holding circuit comprises a bus holding module, a configuration module and an anti-backflow module, the bus holding module comprises a pull-up unit and a pull-down unit, the anti-backflow module comprises an input unit and an output unit, the configuration module is used for responding to the voltage of the input end of the bus holding circuit and controlling the pull-up unit or the pull-down unit to be conducted, and the bus holding module is used for locking the voltage state of the input end of the bus holding circuit; the first end of the input unit is connected with the input end of the bus holding circuit, the control end of the input unit is connected with the control end of the output unit, and the output unit is used for mirroring the current of the input unit when the voltage of the input end of the bus holding circuit is greater than a first voltage or the first voltage is powered down. According to the scheme, the applicability of the bus holding circuit to different processes can be expanded.

The invention discloses a digital quantity output control circuit and method integrating overcurrent instantaneous protection and delay recovery functions. The circuit is mainly composed of a sampling module, a delay module, a voltage following module, an alarm module, an optical coupler isolation module and a typical digital output switch control module. When an over-current phenomenon is detected, the protection circuit can respond quickly, the circuit is cut off immediately to realize protection, and an alarm signal is output synchronously. Thereafter, the protection state will last for a preset delay time. During the period, the processor can monitor an alarm signal and output a circuit turn-off control signal according to the alarm signal. And after the delay time ends, the protection delay circuit automatically recovers to an initial state, and at the moment, the processor takes over signal output control according to the control logic. According to the invention, over-current instantaneous protection and delay recovery functions of the digital output circuit and smooth switching controlled by the processor are successfully realized, and safety risks caused by over-current faults are effectively avoided.

The invention relates to the technical field of isolation driving chips, and provides a common-mode rejection circuit, an isolation transmission circuit and a motor driving circuit. The common-mode rejection circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a first resistor, a second resistor, a first clamping circuit and a second clamping circuit. The first clamping circuit is coupled between the power supply voltage of the receiver and a common node of the first end of the first transistor and the first end of the second transistor, and is used for clamping the voltage on the first common node; the second clamping circuit is coupled between a common node of the first end of the third transistor and the first end of the fourth transistor and the reference ground of the receiver, and is used for clamping the voltage on a second common node. According to the invention, the common-mode transient interference can be effectively suppressed in the isolation transmission circuit, and the system reliability is improved.

The invention relates to a high-performance low-power-consumption anti-radiation latch capable of tolerating three-node upset, which preserves an original high-performance low-power-consumption anti-radiation latch structure capable of tolerating double-node upset and inherits the capability of tolerating single-node upset and double-node upset of an original circuit. Two extra redundant nodes are introduced and form an interlocking monitoring network with the original nodes through a three-input C unit; a TNU detection and recovery module composed of two three-input C units is additionally arranged outside an original DNU feedback loop, the module continuously monitors the state consistency of a key node group, when errors of three or more nodes are detected, redundant nodes are started for state reconstruction, and a correct value is output through a voting mechanism. According to the invention, the fault-tolerant capability of the latch is comprehensively improved from DNU to TNU under extremely low extra overhead, and meanwhile, the excellent characteristics of low power consumption and high performance of the latch are maintained, so that the ultimate requirements of modern aerospace and other severe radiation environments on the reliability of an integrated circuit are met.

The invention belongs to the field of integrated circuits, and discloses a level shifter with high dv / dt noise resistance and a self-adaptive power tube, which comprises a level shifting main body circuit and an auxiliary pull-up circuit. According to the invention, the auxiliary pull-up circuit which can be adaptively started according to the conduction time of the power tube is added, so that high dv / dt noise resistance can be realized in an application scene that different power tubes are adopted outside a chip.

An input / output (I / O) sensor is provided for a multi-IC (Integrated Circuit) module. The I / O sensor includes: a signal input, configured to receive a data signal from an interconnected part of an IC of the multi-IC module; and a time duration measurement circuit, configured to measure a time duration between a first time, at which the data signal is at a first level, and a second time, at which the data signal is at a second level, different from the first level. The sensor may be incorporated into an I / O block, an IC, and / or a multi-IC module. An I / O sensor which includes a controller configured to measure duty cycle distortion of a multi-phase clock is also disclosed.

The invention discloses a high-speed electromagnetic valve, a driving circuit and a design method, and belongs to the technical field of electromagnetic valves. According to the design method of the drive circuit, multiple paths of peak-hold modulation circuits are provided for the multi-coil configuration electromagnetic valve to independently control all sub-coils, so that accurate control over the current of each sub-coil is achieved; the high end of the sub-coil is respectively connected with a power supply and / or a boost power supply through two MOS tubes, and in a peak stage, the control chip controls the boost MOS tubes or the power supply to be conducted, so that current in a loop rises; the lower end of the sub-coil is connected with the ground through an MOS tube and a detection resistor. When the control chip detects that the current in the loop is higher than the upper limit of a preset value, the control chip controls the boost MOS tube or the power supply to be switched off and the current starts to be reduced, and when the current in the sub-coil is lower than the lower limit of the preset value, the control chip controls the boost MOS tube to be switched on and the current rises. According to the invention, the current of each sub-coil in the multi-coil configuration solenoid valve can be accurately controlled.

Methods and apparatuses for comparing redundant signals in functional safe systems are provided, including methods for mitigating differing signal path delays and for signal weighting of the redundant signals are proposed. An Apparatus includes a first signal path for a first measurement signal of a physical quantity, the first signal path having a first signal propagation delay; a second signal path for a second measurement signal of the physical quantity, the second signal path having a second signal propagation delay different from the first signal propagation delay; a delay compensation circuit configured to compensate for a difference between the first and second signal propagation delays to generate delay-compensated first and second measurement signals; and comparison circuitry configured to compare the delay-compensated first and second measurement signals.

The utility model discloses a photoelectric sensor and a driving circuit thereof, the driving circuit comprises a voltage conversion module, a signal filtering module, a switch module, a first protection module and a second protection module, the voltage conversion module converts a first voltage and then outputs a second voltage; the signal filtering module filters the first control signal and then outputs a second control signal; the switch module is in a conducting state according to the second control signal, so that the light-emitting diode is lightened; the first protection module turns off the switch module when the current flowing through the switch module exceeds a current preset value; and the second protection module turns off the switch module when the temperature exceeds a temperature preset value. According to the technical scheme, through cooperative work of a plurality of modules, stable voltage conversion, signal control and light emitting diode driving functions are realized, safe and reliable operation of the circuit is ensured through an over-current and over-temperature protection mechanism, the anti-interference capability and stability of the circuit are improved, and long-term use safety of equipment is ensured.

The application discloses a weak PUF circuit with rich excitation response based on MOS tube leakage current, comprising a first decoder, a second decoder, a third decoder, a fourth decoder, a first PUF array, a second PUF array, two transmission gate arrays and one shared header, each PUF array comprises two column units, q is an integer greater than 1, each column unit comprises two NMOS units, p is an integer greater than 1, each NMOS unit comprises an NMOS tube, under the decoding action of the first decoder, the third decoder and the second decoder, the fourth decoder on the excitation signal, a certain NMOS unit in a certain column unit in the first PUF array can be compared with any NMOS unit in any column unit in the second PUF array to generate a final output response, and the advantage is that the PUF entropy source utilization rate is improved by 2 times while the hardware overhead is kept small, and the number of CRPs is significantly improved. q p p+q ​​​

The utility model relates to a PD detection alarm protection circuit of a laser. The PD detection alarm protection circuit comprises a PD sensor, a resistance voltage division circuit, an in-phase proportion amplification circuit, a comparator circuit and a voltage reference circuit, the PD sensor collects a PD photocurrent signal of the laser and then sends the PD photocurrent signal to the resistance voltage division circuit; the resistance voltage division circuit converts the PD photocurrent signal into a PD voltage signal and then sends the PD voltage signal to the in-phase proportion amplification circuit; the in-phase proportional amplification circuit amplifies the PD voltage signal and then transmits the PD voltage signal to one input end of the comparator circuit, the other input end of the comparator circuit is connected with the voltage reference circuit, and the output end of the comparator circuit outputs a processed PD signal; by optimizing a pre-stage amplification framework and a post-stage reference design, the detection reliability is remarkably improved while the cost is reduced, and the detection response speed is very high. And real-time monitoring can be realized through an upper computer. The system is especially suitable for a safety protection system of industrial laser equipment.

The invention relates to a vehicle-mounted safety output circuit, which comprises a negative voltage power supply sub-circuit, a DC control input sub-circuit, a pulse input sub-circuit, an intermediate sub-circuit, an output sub-circuit, a grounding end, a VCC power supply and a load, and is characterized in that the pulse input sub-circuit is connected with the negative voltage power supply sub-circuit, and the negative voltage power supply sub-circuit and the DC control input sub-circuit are connected with the intermediate sub-circuit; the negative voltage power supply sub-circuit is connected with the DC control input sub-circuit, the middle sub-circuit is connected with the output sub-circuit, the VCC power supply is respectively connected with the middle sub-circuit and the output sub-circuit, the load is connected with the output sub-circuit, and the grounding end is respectively connected with the negative voltage power supply sub-circuit, the middle sub-circuit and the output sub-circuit. The DC control input sub-circuit and the pulse input sub-circuit are used as input, and the final output can be effective only when the low-level output of the DC control input sub-circuit and the 100KHz and 110KHz alternating pulses of the pulse input sub-circuit are ensured to be effective at the same time, so that the safety is ensured.

The present application relates to the technical field of optical coupling, and particularly relates to a constant current optical coupling isolation circuit based on a depletion mode MOSFET; through the cooperation of a reverse protection module, a self-bias constant current module and a response enhancement module, super-wide voltage input, low power consumption and high-speed dynamic response are realized in the circuit, to a certain extent, the inherent technical contradiction that the traditional resistance current limiting scheme cannot simultaneously consider reliable conduction and low power consumption under wide voltage, and the slow response of high CTR optical coupling is solved, the structure is extremely simple and the reliability is high, a self-bias constant current source based on a depletion mode MOSFET is adopted, only one resistor is needed to realize relatively accurate constant current output in a super-wide input range of 9.6V to 400V, replacing the current limiting resistor with huge power consumption under high voltage or the active constant current source with complex circuit in the traditional scheme, and the power consumption under high voltage application is reduced; the technical problem that the existing resistance current limiting scheme is limited in widening the input voltage range of the optical coupling is solved.

The application discloses a CAN transceiver circuit, which comprises a logic and timing module, a current mirror driving group and a resistance driver group; the input end of the logic and timing module is connected with a TXD signal, and the output end outputs a plurality of groups of driving signals, each group of the driving signals controls a current mirror driving group or a resistance driver group; the current mirror driving group and the resistance driver group are used for driving a CANH port and a CANL port, wherein a single CANH port or a single CANL port is provided with upper and lower current mirror driving groups and upper and lower resistance driver groups; the upper current mirror driving group is connected with the upper resistance driver group in parallel, and the lower current mirror driving group is connected with the lower resistance driver group in parallel. The application realizes the bit width consistency improvement and the adaptive baud rate through the independent impedance control of the current mirror pull structure and the differential port, and the process of adjusting the port impedance does not affect the bit width consistency.

The present disclosure provides an integrated circuit for a physically unclonable function (PUF) and an operating method thereof, the integrated circuit including: a controller configured to generate a control signal with reference to an address table; an address table representing a first mapping relationship between a first PUF cell group having a first predetermined mismatch distance with respect to PUF cell characteristics and a second PUF cell group, and representing a second mapping relationship between a third PUF cell group having a second predetermined mismatch distance with respect to PUF cell characteristics and a fourth PUF cell group; and a PUF block configured to provide a PUF cell data group to the controller according to the first mapping relationship and the second mapping relationship in response to the control signal. The controller can be configured to generate an authentication key by comparing the PUF cell data group with a reference data group, respectively.

The present disclosure relates to a level shifter for shifting a voltage signal from a first voltage domain to a second voltage domain, the level shifter comprising: an input circuit configured to receive a voltage signal in the first voltage domain, an output circuit configured to output a voltage signal in the second voltage domain, and a protection circuit configured to prevent a reverse current flow between the input circuit and the output circuit.

This application relates to a low-power ruggedized module with controllable clock edge timing. The module includes a clock gating circuit, a ruggedized unit, and a clock and power supply module. In the clock gating circuit, the substrates of two PMOS transistors are connected to a variable DC power supply to achieve controllable clock edge timing. The ruggedized unit uses a cross-coupled CMOS bistable structure through a bistable latch module to store the synchronous data after clock gating in nodes X0 to X3, and inputs the data to nodes X0 to X3 through an input path via an input control module. In the clock and power supply module, the voltage VDD is set to 1V, reducing overall power consumption and saving energy. This module has the function of resisting six-node flip-flops, making it more robust and safer.

The invention provides a PWM control chip radiation hardening method and a related device, and the method comprises the steps: determining a transmission path of a reference module and an oscillator module of a PWM control chip, carrying out the transient filtering of the transmission path, and obtaining a filtered bias signal; determining a first reference voltage of a reference module of the PWM control chip and a second reference voltage of a pre-step-down module, and judging the first reference voltage and the second reference voltage based on a third reference voltage of an over-temperature protection module to obtain an enable signal after over-temperature protection; monitoring a power path of the PWM control chip to obtain an anti-latch protection signal; and reinforcing the PWM control chip based on the filtered bias signal, the enable signal after over-temperature protection and the anti-latch protection signal to obtain a reinforced PWM control chip. According to the method, the single event effect can be reinforced in multiple dimensions, and the reinforcing effect is remarkably improved, so that the use requirements of most tasks can be met.

Herein presented are systems and methods for majority-vote, single fault tolerant switching of a switch using an electrical circuit that involves power transistors that carry relatively large electrical currents through the switch. The number of power transistors in the circuit of a majority-vote, single fault tolerant power switch may be reduced to four, thus saving circuit board space and producing relatively less heat. This may be done by avoiding the use of a third electrical branch that is generally used for triple module redundant power switches. In cases where a power transistor is relatively large and produces a relatively large amount of heat, reducing the number of this type of circuit component in a switch circuit may provide benefits such as reduced circuit board footprint and reduced heat generation.

The invention relates to a grid driver with a single power supply negative voltage turn-off function, which belongs to the technical field of semiconductors, and comprises an input interface circuit, an output interface circuit and a negative voltage turn-off circuit, the output interface circuit is used for outputting a driving signal; the reference circuit is used for generating stable voltage, and the output of the reference circuit is not influenced by the fluctuation of the environment temperature; the logic circuit is used for signal conditioning and system cooperative control; the negative voltage generating circuit is used for generating negative voltage at the grid electrode of the IGBT; the detection circuit is used for switching on and switching off the IGBT by detecting the change rate of the collector-emitter voltage of the IGBT; a protection circuit; a switching tube is controlled by a switching signal to charge and discharge a bootstrap capacitor, and at the switching moment of the switching signal, the voltage at the two ends of the capacitor is kept unchanged, and negative voltage bias is provided for a power device.

The invention relates to a low-offset low-leakage sampling holding circuit and a control method, the low-offset low-leakage sampling holding circuit comprises a common-mode voltage generation circuit, a pre-sampling holding control circuit and an output-stage sampling holding circuit, the common-mode voltage generation circuit generates common-mode voltage VCM with driving capability for the pre-sampling holding control circuit; then the pre-sampling holding control circuit is combined with the common-mode voltage VCM, input voltage information and offset voltage information are sampled according to the input voltage VIN, the offset voltage information is counteracted in the pre-holding stage, the precision of the sampling information is improved, voltage information VOUT is output, and finally the output-stage sampling holding circuit processes the voltage information VOUT, so that the output-stage sampling holding control circuit outputs the output voltage VIN. The target voltage information VSAMPLE meeting the long-time storage requirement of the signal is output; according to the invention, the pre-sampling holding control circuit is designed, switches are reasonably switched to reduce imbalance, and the voltage difference between each stage of a switching tube in the output stage sampling holding circuit is reduced, so that electric leakage is reduced, and the storage time of input voltage information is prolonged.

The utility model discloses an on-off key circuit of a satellite antenna, which belongs to the field of circuits and is characterized in that divider resistors arranged in the circuit comprise resistors R1, R2 and R4; the input end of the power supply is connected with one end of the R1, the other end of the R1 is connected in series with the antenna key switches S1 and R4, and the resistor R4 is connected in parallel with the Vgs of the switch Q2; the input end of the power supply is connected with one end of the R2, the switch Q1 and the R2 are connected in parallel and are connected with the resistor R3 in series, and the other end of the R3 is connected with the switch Q2; when a satellite antenna is connected with a power supply and an antenna key switch S1 on the satellite antenna is pressed down and closed, R1, S1 and R4 are connected and grounded, the voltage of the R4 is consistent with the Vgs voltage of a switch Q2, and the switch Q2 is saturated and conducted; and the resistor R2, the resistor R3 and the NMOS tube of the switch Q2 are communicated and grounded, so that the resistor R2 and the resistor R3 form partial voltage. The resistors R1, R2, R3 and R4 arranged in the circuit are used for dividing voltage, so that the power supply switch does not need to bear the risk of large current, and the safety and reliability of the satellite antenna are improved.

The utility model relates to the technical field of circuits, and discloses a low-power-consumption RC correction circuit which comprises a reference voltage generation module, a capacitor array charging module, a comparison module, an operation capture module and a logic circuit module. One input end of the comparison module is connected with the reference voltage generation module and receives a reference voltage signal, the other input end of the comparison module is connected with the capacitor array charging module and receives a charging voltage signal, and the output end of the comparison module outputs a comparison signal to the operation capture module; the operation capturing module outputs an operation capturing signal to the logic circuit module, and the logic circuit module controls a switch of the capacitor array charging module to adjust the charging time. The frequency tuning circuit has the effect of reducing the correction complexity of the frequency tuning circuit.

A level shifter circuit and a method for shifting a level of a voltage in the level shifter circuit are provided. The single stage level shifter includes a first MOS device that bypasses a high resistance path generated by the p-type transistor at a left leg of the voltage level shifter block. At the left leg of the level shifter block, the second MOS device reduces the resistance generated by the n-type transistor, enabling a single stage level shifter to execute over a wide range of high core (input) voltages. And at the right branch of the single-stage level shifter, the p-type transistor block pulls down the N side of the level shifter block to finally output 326. In addition, the n-type transistor block assists in changing the final output block of the single-stage level shifter 324 to a high level.

This invention provides a digital isolator with feedback capability and its application circuit. The first isolation circuit of the digital isolator includes a first coupler, a first matching network, a first transmitter, an envelope detector, and a decoder; the second isolation circuit includes a second coupler, a second matching network, a second transmitter, a second receiver, and an encoder. The envelope detector is connected to the first isolated circuit through the decoder; the first transmitter and the envelope detector are respectively connected to the first matching network; the first matching network is connected to the first coupler; the first coupler is coupled to the second coupler; the second coupler is connected to the second matching network; the second receiver and the second transmitter are respectively connected to the second matching network; the second transmitter is connected to the second isolated circuit through the encoder. This invention enables the feedback of various types of abnormal signals from the second isolation circuit to the first isolation circuit using only a single channel composed of a single pair of couplers.

This application provides a multiplier circuit with small area and low temperature drift. The multiplier circuit includes a first voltage module for receiving a first input current I1 and a second input current I2, and generating a first control voltage related to the first input current I1 and the second input current I2; a current module including a first resistor R1 and a first Zener diode D1 for generating a reference current IM1 in the circuit, the reference current IM1 being related to the first Zener diode D1 and the first resistor R1; a second voltage module connected to the first voltage module and the current module for generating a second control voltage related to the reference current IM1 and the output current IM2 driven by it, the second control voltage and the first control voltage satisfying a specific formula; and an output module including a second resistor R2 for converting the output current IM2 into an output voltage V. O And make the output voltage V O It satisfies a specific formula.

The embodiment of the invention provides a signal generating circuit and a control device. The signal generating circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor and a first bias circuit, a second bias circuit and a third bias circuit. The grid electrode of the first transistor is coupled with a first output end, the source electrode of the first transistor is coupled with a first power end, and the drain electrode of the first transistor is coupled with a second output end. The grid electrode of the second transistor is coupled with the second output end, the source electrode is coupled with the first power end, and the drain electrode is coupled with the first output end. The grid electrode of the third transistor is coupled with a second power supply end, the source electrode is coupled with a third power supply end, and the drain electrode is coupled with the second output end. The fourth transistor is coupled to the second power supply terminal and the first output terminal. When the third transistor is not conducted, the first bias circuit conducts the fourth transistor. The second bias circuit provides a first preset voltage to the second gate. The third bias circuit provides a second preset voltage to the first grid electrode.

The application relates to a high-performance low-power anti-radiation latch tolerating three-node upset, which retains the original high-performance low-power anti-radiation latch structure tolerating double-node upset and inherits the capability of tolerating single-node and double-node upset of the original circuit. Two additional redundant nodes are introduced, and interlocking monitoring networks are formed by three-input C cells and original nodes; in addition to the original DNU feedback loop, a TNU detection and recovery module formed by two three-input C cells is newly added, the module continuously monitors the state consistency of the key node group, when three or more node errors are detected, the redundant node is enabled to perform state reconstruction, and the correct value is output through a voting mechanism. The fault-tolerant capability of the latch is comprehensively improved from DNU to TNU with a small additional cost, while the excellent characteristics of low power consumption and high performance are maintained, so that the ultimate requirement of integrated circuit reliability in modern aerospace and other harsh radiation environments is met.

The application discloses a control circuit for compensating CAN port leakage, comprising a CAN driving circuit and a CAN port network, and further comprising a compensation circuit connected to the cathode of a diode in the CAN driving circuit, wherein the compensation circuit injects a compensation current when detecting that the cathode voltage of the diode is lower than a common-mode voltage, and disconnects the compensation current when the cathode voltage of the diode is higher than the common-mode voltage. The application compensates for the problem that the reverse recovery current of the diode causes a differential voltage between CANH and CANL when switching from dominant to recessive, thereby affecting the bit width symmetry of the CAN bus, and compensates for the problem that the leakage of the parasitic PNP transistor causes a common-mode level mutation when switching from dominant to recessive, thereby causing electromagnetic interference of the CAN transceiver.