608results about "Reliability increasing modifications" patented technology

The utility model provides an insulated gate bipolar transistor driving circuit with adjustable positive and negative voltages, comprising a magnetic isolation module, the input end of which is connected with a driving signal and outputs an isolation driving signal; the input end of the first voltage regulating module is connected with the first positive voltage and outputs a second positive voltage within a first preset range; the input end of the second voltage regulating module is connected with the first negative voltage and outputs a second negative voltage within a second preset range; the push-pull output module is connected between the second positive voltage and the second negative voltage, the control end of the push-pull output module is connected with an isolation driving signal, and the output end of the push-pull output module is connected with the gate pole of the to-be-tested insulated gate bipolar transistor through a gate resistor; and the protection module is controllably connected between the output end of the push-pull output module and the second voltage regulation module under the action of the control signal. The driving circuit has the beneficial effects that the positive and negative voltage output capability can be flexibly adjusted according to debugging requirements, the working condition requirements of different clients are met, and the flexibility and adaptability of the driving circuit are improved.

A bonded structure is disclosed. The bonded structure can include a first element that has a first plurality of contact pads. The first plurality of contact pads includes a first contact pad and a second redundant contact pad. The bonded structure can also include a second element directly bonded to the first element without an intervening adhesive. The second element has a second plurality of contact pads. The second plurality of contact pads includes a third contact pad and a fourth redundant contact pad. The first contact pad is configured to connect to the third contact pad. The second contact pad is configured to connect to the fourth contact pad. The bonded structure can include circuitry that has a first state in which an electrical signal is transferred to the first contact pad and a second state in which the electrical signal is transferred to the second contact pad.

The invention discloses a wide input voltage range current-limiting protection circuit suitable for a load switch. The wide input voltage range current-limiting protection circuit comprises a power tube MN1, a sampling tube MN3, a sampling resistor Rsense, a power switching module, a sampling module, an error amplifier EA, a resistor Rload and a capacitor Cload. The whole loop can achieve the current-limiting protection function within the power supply voltage range of 0.5-5.5 V, and the current-limiting protection function can also be achieved when the output is as low as 0V. Different from a current-limiting protection circuit in a traditional load switch, the current-limiting protection circuit has the advantages that a sampling loop is formed by sampling the potential of the drain end, and the problem that the loop cannot work normally when the output voltage is too low due to sampling of the potential of the source end is solved; and secondly, a mode of combining a power supply switching module and a rail-to-rail operational amplifier is designed, so that a current-limiting protection function can be realized in a wider input voltage range.

A level conversion assembly (50), an overcurrent protection method and a display device, the level conversion assembly (50) comprising a level conversion module (51), the level conversion module (51) comprising a control unit (511), a current detection unit (512), a level conversion unit (513) and an overcurrent protection unit (514). When a control unit (511) is at a first falling edge of a digital clock signal (CPV), a first analog clock signal corresponding to the first falling edge in a plurality of analog clock signals (CLK1-CLK8) is determined based on the corresponding relation of the current display mode, and a current detection unit (512) is controlled to detect the current of the first analog clock signal. Since the moment of the falling edge of the digital clock signal (CPV) is located in the last row of the high level period or the low level period in the corresponding analog clock signal, the current detection unit (512) can send an overcurrent signal to the overcurrent protection unit (514) when the current of the first analog clock signal is not located in the current threshold range. The effect of improving the accuracy of over-current phenomenon detection is achieved.

The invention provides a bias voltage providing circuit of an avalanche photodiode and a PON gateway, and relates to the technical field of optical communication. The bias voltage providing circuit of the avalanche photodiode comprises a bias voltage input unit, a bias voltage control input processing unit and an avalanche photodiode protection unit. When the illumination intensity of the target avalanche photodiode exceeds the preset illumination intensity, the photo-generated current of the target avalanche photodiode exceeds the preset current, and the avalanche photodiode protection unit responds to the situation that the photo-generated current of the target avalanche photodiode exceeds the preset current. The diode bias voltage applied to the target avalanche photodiode is reduced, so that the photo-generated current of the target avalanche photodiode is reduced, and overload protection of the target avalanche photodiode is completed. Based on the above content, the problem that the target avalanche photodiode is easy to damage due to overload in the prior art can be improved.

The invention provides a chip and a trimming control circuit and a trimming control method thereof, and the trimming control circuit comprises a trimming position generation unit which latches a trimming mode control signal according to a power-on signal so as to generate a trimming enable signal, and counts received trimming clock signals according to the trimming enable signal and a counting enable signal, a trimming position control signal is correspondingly output in each period of counting the trimming clock signal; and a fuse is connected between each trimming control unit and the power supply end, and whether the fuse is fused or not is controlled according to the trimming mode control signal, the corresponding trimming position control signal and the general control signal. According to the method and the device, wrong trimming caused by writing of wrong trimming codes can be avoided, so that the yield and the manufacturing cost of the chip are improved.

The embodiment of the invention provides a bus holding circuit and a bus holder. The bus holding circuit comprises a bus holding module, a configuration module and an anti-backflow module, the bus holding module comprises a pull-up unit and a pull-down unit, the anti-backflow module comprises an input unit and an output unit, the configuration module is used for responding to the voltage of the input end of the bus holding circuit and controlling the pull-up unit or the pull-down unit to be conducted, and the bus holding module is used for locking the voltage state of the input end of the bus holding circuit; the first end of the input unit is connected with the input end of the bus holding circuit, the control end of the input unit is connected with the control end of the output unit, and the output unit is used for mirroring the current of the input unit when the voltage of the input end of the bus holding circuit is greater than a first voltage or the first voltage is powered down. According to the scheme, the applicability of the bus holding circuit to different processes can be expanded.

The invention discloses a latch, relates to the field of integrated circuit design, and aims to solve the problem that the error rate of circuit output level is relatively high after a plurality of storage nodes of a latch circuit are impacted by particles in the prior art. The latch at least comprises an input module, a clock control module, a storage module and an output module, the first end of an input module is connected with the input end of the latch, and the second end of the input module is connected with the input end of the storage module; the output end of the storage module is connected with the first end of an output module; the second end of the output module is connected with the output end of the latch, and the input end of the clock control module is connected with the clock signal input end; the output end of the clock control module is respectively connected with the input module and the output module; the latch is used for generating an inverse signal of a corresponding level of the target node by using the storage module when particle collision occurs to the target node; therefore, the accuracy of circuit output level after a plurality of storage nodes are impacted by particles at the same time is improved.

The invention discloses a digital quantity output control circuit and method integrating overcurrent instantaneous protection and delay recovery functions. The circuit is mainly composed of a sampling module, a delay module, a voltage following module, an alarm module, an optical coupler isolation module and a typical digital output switch control module. When an over-current phenomenon is detected, the protection circuit can respond quickly, the circuit is cut off immediately to realize protection, and an alarm signal is output synchronously. Thereafter, the protection state will last for a preset delay time. During the period, the processor can monitor an alarm signal and output a circuit turn-off control signal according to the alarm signal. And after the delay time ends, the protection delay circuit automatically recovers to an initial state, and at the moment, the processor takes over signal output control according to the control logic. According to the invention, over-current instantaneous protection and delay recovery functions of the digital output circuit and smooth switching controlled by the processor are successfully realized, and safety risks caused by over-current faults are effectively avoided.

The invention discloses a latch, relates to the field of integrated circuit design, and aims to solve the problem that the error rate of circuit output level is relatively high after a plurality of storage nodes of a latch circuit are impacted by particles in the prior art. The latch at least comprises an input module, a clock control module, a storage module and an output module, the first end of an input module is connected with the input end of the latch, and the second end of the input module is connected with the input end of the storage module; the output end of the storage module is connected with the first end of an output module; the second end of the output module is connected with the output end of the latch, and the input end of the clock control module is connected with the clock signal input end; the output end of the clock control module is respectively connected with the input module and the output module; the latch is used for generating an inverse signal of a corresponding level of the target node by using the storage module when particle collision occurs to the target node; therefore, the accuracy of circuit output level after a plurality of storage nodes are impacted by particles at the same time is improved.

The invention discloses a Kelvin source series connection type active gate drive circuit, and belongs to the technical field of power generation, power transformation or power distribution. The circuit is composed of a signal conditioning circuit, a bidirectional follower circuit, a feedback capacitor, a gate driver and a power supply circuit thereof, and a driving resistor. The signal conditioning circuit is provided with two input ports and two output ports, the two input ports are respectively connected with a power source electrode and a feedback capacitor of the switching device, and the two output ports are connected with an input port of the bidirectional follower circuit. The bidirectional follower circuit is provided with two input ports and a modulation output port, and the modulation output port is connected with a reference point of the gate driver and the power supply circuit of the gate driver. The output port of the gate driver and power supply circuit is connected with the gate of the switching device after being connected with the driving resistor. On the basis of common gate drive, low-delay and real-time feedback closed-loop active gate drive is realized by changing a circuit connection structure and utilizing reference point voltage modulation, and the purpose of reducing voltage and current overshoot of a power device is achieved.

The invention relates to the technical field of isolation driving chips, and provides a common-mode rejection circuit, an isolation transmission circuit and a motor driving circuit. The common-mode rejection circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a first resistor, a second resistor, a first clamping circuit and a second clamping circuit. The first clamping circuit is coupled between the power supply voltage of the receiver and a common node of the first end of the first transistor and the first end of the second transistor, and is used for clamping the voltage on the first common node; the second clamping circuit is coupled between a common node of the first end of the third transistor and the first end of the fourth transistor and the reference ground of the receiver, and is used for clamping the voltage on a second common node. According to the invention, the common-mode transient interference can be effectively suppressed in the isolation transmission circuit, and the system reliability is improved.

The invention relates to a high-performance low-power-consumption anti-radiation latch capable of tolerating three-node upset, which preserves an original high-performance low-power-consumption anti-radiation latch structure capable of tolerating double-node upset and inherits the capability of tolerating single-node upset and double-node upset of an original circuit. Two extra redundant nodes are introduced and form an interlocking monitoring network with the original nodes through a three-input C unit; a TNU detection and recovery module composed of two three-input C units is additionally arranged outside an original DNU feedback loop, the module continuously monitors the state consistency of a key node group, when errors of three or more nodes are detected, redundant nodes are started for state reconstruction, and a correct value is output through a voting mechanism. According to the invention, the fault-tolerant capability of the latch is comprehensively improved from DNU to TNU under extremely low extra overhead, and meanwhile, the excellent characteristics of low power consumption and high performance of the latch are maintained, so that the ultimate requirements of modern aerospace and other severe radiation environments on the reliability of an integrated circuit are met.

The invention discloses a high-speed level shifter applied to a BUCK converter. The high-speed level shifter comprises a level shifting part, a control logic part and an output part, after the level shift part inputs a signal, a low-delay rising edge and a high-delay falling edge of a conversion level A, and a high-delay rising edge and a low-delay falling edge of a conversion level B are output; the input of the control logic part adopts CLK in a BUCK converter to generate a short pulse, a high-voltage domain where SW and BST are located is isolated from a low-voltage domain, when the short pulse is at a high level, an output control signal is high, and when the short pulse is at a low level, the output signal is low; the input of the output part is the output of the level shift part and the control logic, and when the control signal is high, a low-delay rising edge is selected to be output; and when the control signal is low, selecting to output a low-delay falling edge. The level shift result is output through double ports, and low delay of conversion between the rising edge and the falling edge is achieved.

The invention belongs to the field of integrated circuits, and discloses a level shifter with high dv / dt noise resistance and a self-adaptive power tube, which comprises a level shifting main body circuit and an auxiliary pull-up circuit. According to the invention, the auxiliary pull-up circuit which can be adaptively started according to the conduction time of the power tube is added, so that high dv / dt noise resistance can be realized in an application scene that different power tubes are adopted outside a chip.

The present application provides a clock gating circuit and a method for implementing the clock gating circuit. The clock gating circuit includes: a state machine, a triple-module redundant latch circuit and a logic gate circuit; the state machine is used to generate a control state signal according to a state jump triggered by an input control signal, and input the triple-module redundant latch circuit; the triple-module redundant latch circuit is used to latch the control state signal according to the input previous-stage clock signal, and output the latch signal to the logic gate circuit; the logic gate circuit is used to perform an AND operation on the latch signal and the previous-stage clock signal to generate and output a clock control signal. In the present application, the state machine and triple-module redundant technology are applied to the clock gating circuit to enhance the ability of the clock gating circuit to resist radiation.

An input / output (I / O) sensor is provided for a multi-IC (Integrated Circuit) module. The I / O sensor includes: a signal input, configured to receive a data signal from an interconnected part of an IC of the multi-IC module; and a time duration measurement circuit, configured to measure a time duration between a first time, at which the data signal is at a first level, and a second time, at which the data signal is at a second level, different from the first level. The sensor may be incorporated into an I / O block, an IC, and / or a multi-IC module. An I / O sensor which includes a controller configured to measure duty cycle distortion of a multi-phase clock is also disclosed.

The invention provides a backup control circuit for emergency power-off of a vehicle, and the circuit comprises a one-key starting switch circuit which comprises a switch K; the first switch signal detection and turn-off circuit is connected with the one-key starting switch circuit and comprises an MCU (Microprogrammed Control Unit), and the MCU is used for outputting a vehicle power-off signal after identifying that the switch K is pressed for a long time; the second switch signal detection and turn-off circuit is connected with the one-key starting switch circuit and is used for outputting a vehicle power-off signal after identifying that the switch K is pressed for a long time; the MCU state monitoring and post-stage power supply control circuit is connected with the MCU and used for monitoring whether the state of the MCU is normal or not, if the state of the MCU is normal, a first control voltage is output, if the state of the MCU is abnormal, a second control voltage is output, the first control voltage is used for controlling a first switch signal detection and turn-off circuit to work, and the second control voltage is used for controlling a second switch signal detection and turn-off circuit to work; and the second control voltage is used for controlling the second switching signal detection and turn-off circuit to work. The method is used for ensuring the emergency power-off reliability of the vehicle.

The utility model provides an asymmetric delay control circuit and device, which can be applied to the technical field of electronic circuits. The asymmetric delay control circuit comprises a delay unit and an asynchronous trigger, the asynchronous trigger comprises a reset input end, a delay input end and an output end, the delay unit is connected with the delay input end, and the delay unit is used for delaying a clock signal input to the delay input end; wherein under the condition that the clock signal input by the reset input end is an invalid level, the output end outputs the invalid level, and under the condition that the clock signal input by the reset input end is an effective level and the clock signal input by the delay input end is detected to be switched from the invalid level to the effective level, the output end outputs the effective level.

The invention belongs to the technical field of electronic and electrical engineering, and discloses a mining differential signal intrinsic safety isolation data processing system which comprises a power supply circuit unit, a photoelectric isolation unit, a communication interface unit and a CPU data processing unit. The system adopts a double-isolation power supply design, so that physical isolation of intrinsic safety and non-intrinsic safety sides is ensured, the safety and reliability of the circuit are improved, physical isolation and differential transmission of data signals are realized through the photoelectric isolation unit and the differential signal conversion circuit, energy transmission and interference are effectively prevented, the circuit is protected from being damaged, and the reliability of the circuit is improved. Secondly, the CPU data processing unit can efficiently execute logical operation and data processing tasks, data receiving and transmitting and seamless communication with external equipment are achieved by controlling the optoelectronic isolation and communication interface unit, and finally, a CPU operation indicating circuit and a program downloading and debugging interface are further designed in the system.

The invention discloses a high-speed electromagnetic valve, a driving circuit and a design method, and belongs to the technical field of electromagnetic valves. According to the design method of the drive circuit, multiple paths of peak-hold modulation circuits are provided for the multi-coil configuration electromagnetic valve to independently control all sub-coils, so that accurate control over the current of each sub-coil is achieved; the high end of the sub-coil is respectively connected with a power supply and / or a boost power supply through two MOS tubes, and in a peak stage, the control chip controls the boost MOS tubes or the power supply to be conducted, so that current in a loop rises; the lower end of the sub-coil is connected with the ground through an MOS tube and a detection resistor. When the control chip detects that the current in the loop is higher than the upper limit of a preset value, the control chip controls the boost MOS tube or the power supply to be switched off and the current starts to be reduced, and when the current in the sub-coil is lower than the lower limit of the preset value, the control chip controls the boost MOS tube to be switched on and the current rises. According to the invention, the current of each sub-coil in the multi-coil configuration solenoid valve can be accurately controlled.

Methods and apparatuses for comparing redundant signals in functional safe systems are provided, including methods for mitigating differing signal path delays and for signal weighting of the redundant signals are proposed. An Apparatus includes a first signal path for a first measurement signal of a physical quantity, the first signal path having a first signal propagation delay; a second signal path for a second measurement signal of the physical quantity, the second signal path having a second signal propagation delay different from the first signal propagation delay; a delay compensation circuit configured to compensate for a difference between the first and second signal propagation delays to generate delay-compensated first and second measurement signals; and comparison circuitry configured to compare the delay-compensated first and second measurement signals.

A semiconductor device has a semiconductor chip having a first circuit, a second circuit, a third circuit, a first protection element, and a resistor circuit, the first circuit and the third circuit inputting and outputting a unidirectional or bidirectional signal to each other via the second circuit, the first protection element being electrically connected to a first node, and the resistor circuit being electrically connected to a second node. The first node electrically connects the first terminal and the second circuit, and the resistor circuit is disposed between the first node and the second node, the second node electrically connects the first terminal, the first circuit, and the second circuit, and is located upstream of the first node.

The utility model discloses an SoC chip pin multiplexing circuit. An SoC chip is provided with a first multiplexing pin and a second multiplexing pin. The pin multiplexing circuit comprises a first GPI O circuit, a second GPI O circuit, an XTAL circuit and a voltage clamping circuit. The first multiplexing pin is connected with the input end of the first GPI O circuit and the input end of the XTAL circuit. The second multiplexing pin is connected with the output end of the second GPI O circuit and the output end of the XTAL circuit. The first GPI O circuit comprises a first phase inverter, a second phase inverter, a first switch and a second switch; the second GPI O circuit comprises a third phase inverter, a fourth phase inverter, a third switch and a fourth switch; and the XTAL circuit comprises a fifth resistor Rf and a fifth phase inverter. According to the SoC chip pin multiplexing circuit provided by the utility model, the requirement on the output resistance when the multiplexing pin is in a turn-off state can be reduced, so that the working frequency of a GPI O (General Purpose Interface Output) can be improved.

The utility model discloses a photoelectric sensor and a driving circuit thereof, the driving circuit comprises a voltage conversion module, a signal filtering module, a switch module, a first protection module and a second protection module, the voltage conversion module converts a first voltage and then outputs a second voltage; the signal filtering module filters the first control signal and then outputs a second control signal; the switch module is in a conducting state according to the second control signal, so that the light-emitting diode is lightened; the first protection module turns off the switch module when the current flowing through the switch module exceeds a current preset value; and the second protection module turns off the switch module when the temperature exceeds a temperature preset value. According to the technical scheme, through cooperative work of a plurality of modules, stable voltage conversion, signal control and light emitting diode driving functions are realized, safe and reliable operation of the circuit is ensured through an over-current and over-temperature protection mechanism, the anti-interference capability and stability of the circuit are improved, and long-term use safety of equipment is ensured.

The application discloses a weak PUF circuit with rich excitation response based on MOS tube leakage current, comprising a first decoder, a second decoder, a third decoder, a fourth decoder, a first PUF array, a second PUF array, two transmission gate arrays and one shared header, each PUF array comprises two column units, q is an integer greater than 1, each column unit comprises two NMOS units, p is an integer greater than 1, each NMOS unit comprises an NMOS tube, under the decoding action of the first decoder, the third decoder and the second decoder, the fourth decoder on the excitation signal, a certain NMOS unit in a certain column unit in the first PUF array can be compared with any NMOS unit in any column unit in the second PUF array to generate a final output response, and the advantage is that the PUF entropy source utilization rate is improved by 2 times while the hardware overhead is kept small, and the number of CRPs is significantly improved. q p p+q ​​​

The invention relates to a fast latch based on logic isolation. The fast latch comprises a transmission gate module which adopts a plurality of transmission gates controlled by clock signals to transmit input signals to corresponding generation nodes. The generation module is used for generating a feedback node signal by adopting a plurality of mutually connected phase inverters; the feedback module is used for receiving feedback node signals and feeding back each feedback node signal to a corresponding generation node by adopting a cross feedback loop, and in a normal working state, when a clock signal is at a high level, the fast latch works in a transparent mode; when the clock CLK is at a low level, enabling the fast latch to work in a holding mode; and when a single node or double nodes are overturned, the quick latch is self-repaired. According to the latch, logic isolation is realized through a cross feedback loop, and soft errors can be repaired and correct data can be stored even if a radiation event occurs; the fast latch can provide complete DNU elasticity, and has a faster speed and a smaller area.

The utility model relates to a PD detection alarm protection circuit of a laser. The PD detection alarm protection circuit comprises a PD sensor, a resistance voltage division circuit, an in-phase proportion amplification circuit, a comparator circuit and a voltage reference circuit, the PD sensor collects a PD photocurrent signal of the laser and then sends the PD photocurrent signal to the resistance voltage division circuit; the resistance voltage division circuit converts the PD photocurrent signal into a PD voltage signal and then sends the PD voltage signal to the in-phase proportion amplification circuit; the in-phase proportional amplification circuit amplifies the PD voltage signal and then transmits the PD voltage signal to one input end of the comparator circuit, the other input end of the comparator circuit is connected with the voltage reference circuit, and the output end of the comparator circuit outputs a processed PD signal; by optimizing a pre-stage amplification framework and a post-stage reference design, the detection reliability is remarkably improved while the cost is reduced, and the detection response speed is very high. And real-time monitoring can be realized through an upper computer. The system is especially suitable for a safety protection system of industrial laser equipment.

The invention relates to a vehicle-mounted safety output circuit, which comprises a negative voltage power supply sub-circuit, a DC control input sub-circuit, a pulse input sub-circuit, an intermediate sub-circuit, an output sub-circuit, a grounding end, a VCC power supply and a load, and is characterized in that the pulse input sub-circuit is connected with the negative voltage power supply sub-circuit, and the negative voltage power supply sub-circuit and the DC control input sub-circuit are connected with the intermediate sub-circuit; the negative voltage power supply sub-circuit is connected with the DC control input sub-circuit, the middle sub-circuit is connected with the output sub-circuit, the VCC power supply is respectively connected with the middle sub-circuit and the output sub-circuit, the load is connected with the output sub-circuit, and the grounding end is respectively connected with the negative voltage power supply sub-circuit, the middle sub-circuit and the output sub-circuit. The DC control input sub-circuit and the pulse input sub-circuit are used as input, and the final output can be effective only when the low-level output of the DC control input sub-circuit and the 100KHz and 110KHz alternating pulses of the pulse input sub-circuit are ensured to be effective at the same time, so that the safety is ensured.

The utility model discloses a bipolar analog signal transmission circuit, belongs to an analog signal transmission circuit in the technical field of analog signal transmission, and aims to solve the technical problem of poor quality of transmitted weak signals in the prior art. The circuit comprises an operational amplifier N1-A, an operational amplifier N1-B, an operational amplifier N3-A and a photoelectric coupler N2. A pin 1 of the operational amplifier N1-B is electrically connected with a pin 1 of a photoelectric coupler N2 through a resistor R5, a pin 2 of the photoelectric coupler N2 is electrically connected with a power VCC interface, a pin 3 of the photoelectric coupler N2 is electrically connected with a node C, a pin 4 of the photoelectric coupler N2 is electrically connected with a node G between the pin 3 of the operational amplifier N1-B and a node D, and a pin 7 of the photoelectric coupler N2 is electrically connected with a pin 2 of an operational amplifier N3-A; a pin 8 of the photoelectric coupler N2 is electrically connected with a pin 3 of the operational amplifier N3-A. A node H between the pin 8 of the photoelectric coupler N2 and the pin 3 of the operational amplifier N3-A is grounded GNDB. The transmission circuit can ensure the accuracy of signal transmission and solve the problem of poor signal transmission quality under the conditions of extremely small and weak signals and small signal variation.