Devices and systems comprising driver circuits are disclosed for
MOSFET driven, normally-on
gallium nitride (GaN) power transistors. Preferably, a low power, high speed
CMOS driver circuit with an integrated
low voltage, lateral
MOSFET driver is series coupled, in a
hybrid cascode arrangement to a
high voltage GaN HEMT, for improved control of
noise and
voltage transients. Co-packaging of a GaN
transistor die and a
CMOS driver die using island topology contacts, through substrate vias, and a flip-
chip, stacked configuration provides interconnections with
low inductance and resistance, and provides effective thermal management. Co-packaging of a
CMOS input interface circuit with the CMOS driver and GaN
transistor allows for a compact, integrated CMOS driver with enhanced functionality including shut-down and start-up conditioning for
safer operation, particularly for
high voltage and
high current switching. Preferred embodiments also provide isolated, self-powered, high speed driver devices, with reduced input losses.