1595 results about "Photonic integrated circuit" patented technology

A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.

A chip package includes a housing, one or more electrical connections coupled to an exterior of the housing, a photonic integrated circuit, and a scanning unit. Both the photonic integrated circuit and the scanning unit are disposed within the housing. The photonic integrated circuit has at least one waveguide designed to guide a beam of light. The scanning unit is designed to laterally scan the beam of light across a focal plane outside of the housing. The scanning unit is aligned with the photonic integrated circuit such that the beam of light is coupled between the photonic integrated circuit and the scanning unit.

The current invention offers a method for preparing an electronic integrated circuit (EIC) for the assembly of an optical engine. The method involves stacking a CMOS-based EIC wafer onto a short loop / interposer wafer through face-to-back bonding. This stacked configuration serves as a carrier for the thin CMOS wafers. Subsequently, the stacked wafers are thinned down to the desired height and undergo a via last process. In this process, the thick metal layer from the short loop / interposer wafer acts as an etch stop. The stacked EIC wafers can then be diced and attached to a photonic integrated circuit (PIC) wafer, resulting in the formation of an optical engine.

An apparatus includes an optical interposer including a first surface, a first mating protrusion extending outwardly from the first surface, and two or more alignment protrusions extending outwardly from the first surface. The first mating protrusion is to be partially disposed within a first recess formed in a second surface of a photonic integrated circuit (PIC) die when the first surface of the optical interposer opposes the second surface of the PIC die and respective distal surfaces of the two or more alignment protrusions contact the second surface of the PIC die. A first portion of an outer surface of the first mating protrusion is to contact a first side wall of the first recess and a second portion of the outer surface of the first mating protrusion is to oppose a second side wall of the first recess such that a second space is to be defined therebetween.

A photonic assembly includes: a composite die including a photonic integrated circuits (PIC) die and an electronic integrated circuits (EIC) die, the PIC die including waveguides and photonic devices therein, and the EIC die including semiconductor devices therein; and an optical connector unit including a first connector-side mirror reflector and a first transition edge coupler, wherein the first connector-side mirror reflector is configured to change a beam direction between a vertically-extending beam path through the composite die and a horizontally-extending beam path through the first transition edge coupler.

A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.

An optical-electrical substrate for providing electrical and optical connections to a photonic integrated circuit (PIC) includes a glass body with glass optical waveguides along an upper surface, and electrically conductive vias extending through a portion of the glass body from an intermediate surface to a lower surface. The intermediate surface is arranged at an elevation positioned between the upper and lower surfaces, and may optionally support redistribution layers and an electrical integrated circuit. An optical-electrical substrate may be fabricated by defining glass optical waveguides along an upper surface of a glass body, and forming electrically conductive vias through the glass body from the intermediate surface to the lower surface. A connection method includes registering a PIC with an optical-electrical substrate as described herein; heating bonding bumps arranged between the PIC and the intermediate surface; and providing optically transmissive paths between the PIC and glass optical waveguides of the substrate.

A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.

Embodiments herein describe attaching (or bonding) alignment parts to a photonic die so that these alignment parts can then be used to passively align a FAU to the photonic die. In one embodiment, the alignment part (or parts) is aligned to a photonic die using a mounting FAU. The mounting FAU (along with the mated alignment parts) can then be actively aligned to the photonic die. When aligned, the alignment parts can be bonded (e.g., using cured epoxy) to the photonic die. The mounting FAU can then be lifted off, leaving the alignment parts attached to the photonic die. Later, a final product FAU (which may have a different shape than the mounting FAU) can then be passively aligned to the photonic die using the previously mounted alignment part or parts.

Microelectronic assemblies including photonic integrated circuits (PICs), related devices and methods, are disclosed herein. For example, in some embodiments, a photonic assembly may include a PIC in a first layer including an insulating material, wherein the PIC is embedded in the insulating material with an active surface facing up; a conductive pillar in the first layer; an integrated circuit (IC) in a second layer on the first layer, wherein the second layer includes the insulating material and the IC is embedded in the insulating material, and wherein the IC is electrically coupled to the active surface of the PIC and the conductive pillar; an optical component optically coupled to the active surface of the PIC; and a hollow channel surrounding the optical component, the hollow channel extending from the active surface of the PIC through the insulating material in the second layer.

A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.

The invention provides an on-chip all-optical switching network device, a semiconductor device and a manufacturing method thereof. The on-chip all-optical switching network device comprises: a photonic chip formed with at least two photonic integrated circuit sub-chips optically interconnected with each other; the at least two optical switching control analog electric chips are respectively arranged on the at least two photon integrated circuit sub-chips; each photon integrated circuit sub-chip is internally provided with at least one on-chip optical switch, at least two communication nodes suitable for communicating with an external device, and a plurality of first type optical waveguides used for connecting the on-chip optical switch and the communication nodes; on the photon chip, communication between any two communication nodes is realized through at least one on-chip optical switch. According to the invention, through the plurality of on-chip optical switches, a series of digital electric chips can carry out parallel processing on information at the same time, and the requirements of an artificial intelligence algorithm on computing power and bandwidth can be better met.

Embodiments described herein also relate to electronic and photonic integrated circuits, and methods for fabricating integrated interconnects between electrical, optoelectronic and photonic elements. One or more optical silicon photonic elements described herein may be used on a single package substrate in conjunction with one or more optoelectronic integrated circuits (optoelectronic chips) to form co-packaged optical and electrical elements. The methods described herein enable mass fabrication of electrical, optoelectronic, and optical silicon photonic elements having a plurality of optical structures, such as waveguides, formed on or integrated with a photonic glass layer substrate.

A photonic integrated circuit (PIC) disposed on a substrate and comprising a semiconductor die hosting an active portion and a passive portion mutually coupled, the active portion being configured to consume electrical power when activated, and the passive portion comprising an optical transmission medium configured to propagate an optical signal to or from the active portion of the PIC; an electronic integrated circuit (EIC) electrically coupled to the active portion of the PIC and comprising components that electrically operate on the active portion of the PIC; and a packaging compound at least partially encapsulating the PIC, the packaging compound defining a cavity on a side of the semiconductor die that is opposite from the substrate, the cavity being filled with an optically transparent medium such that the optical signal can be received from or transmitted to the passive portion of the PIC through the cavity.

A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.

An optical fiber connector, a photonic integrated circuit and a photonic packaging structure using the same are provided. The optical fiber connector includes a body, a plurality of optical fibers and an alignment component. The body has an interface. The optical fibers are arranged in the body, and the optical fibers are arranged in a first direction of the interface. The alignment component is disposed on the interface and is located on at least one side of the interface in the first direction. The alignment component is configured for the optical fiber connector to be magnetically attracted to another alignment component.

The invention discloses an optical memristor, and relates to the field of photon integrated circuits and optical computing, and the optical memristor comprises a waveguide layer, a ferroelectric film layer, an electrode structure and a substrate. The ferroelectric film layer is located on the upper surface of the substrate; the waveguide layer and the electrode structure are located on the upper surface of the ferroelectric film layer; the waveguide layer is used for propagating an incident light signal and performing amplitude modulation on the incident light signal; the electrode structure is used for applying an electric field to the ferroelectric film layer; and the ferroelectric film layer is used for carrying out phase modulation on optical signals transmitted in the waveguide layer under the action of the electric field. The ferroelectric material is used as the optical switch of the optical memristor, efficient modulation of the optical phase is achieved through the non-volatility and the high electro-optical effect of the ferroelectric material, and meanwhile the optical memristor has the advantages of being low in energy consumption and rapid in response.

The utility model provides a photoelectric co-packaging structure and an optical module, and relates to the technical field of optical communication. The photoelectric co-packaging structure comprises a multi-layer circuit board, a photon integrated circuit chip and an anti-warping piece. An optical waveguide and an optical coupling port connected with the optical waveguide are arranged in the photon integrated circuit chip; and the optical coupling port is used for optically coupling with an optical element outside the photonic integrated circuit chip. The photon integrated circuit chip is flip-chip welded on the multilayer circuit board and is electrically connected with the multilayer circuit board. The anti-warping piece is arranged in the multi-layer circuit board; the projection of the photonic integrated circuit chip on the surface of the multilayer circuit board and the projection of the anti-warping piece on the surface of the multilayer circuit board are at least partially overlapped. The multi-layer circuit board is provided with the anti-warping piece, so that the packaging stress can be reduced, the warping deformation of the multi-layer circuit board and the photon integrated circuit chip is reduced, and the packaging quality and reliability are improved.

A computing device includes a first circuit package including a first electronic integrated circuit (EIC) and a first photonic integrated circuit (PIC). The first circuit package includes a plurality of compute nodes, a first plurality of routers connected to the plurality of compute nodes, and a plurality of intra-chip bidirectional photonic channels connecting the first plurality of routers into an intra-chip network. The computing system includes a second circuit package including a second EIC and a second PIC. The second circuit package includes a plurality of memory nodes and a second plurality of routers connected to the plurality of memory nodes. The computing system includes at least one inter-chip bidirectional photonic channel connecting the first plurality of routers and the second plurality of routers into an inter-chip bidirectional photonic network configured to transmit messages between the first circuit package and the second circuit package.

An example optical system having an optical supply sub-system for supplying light to a photonic integrated circuit is presented. The optical supply sub-system includes a primary light source, an auxiliary light source, a first optical coupler, and a second optical coupler. The first optical coupler includes a first metal-oxide-semiconductor capacitor microring resonator (MOSCAP MRR) and the first optical coupler includes a second MOSCAP MRR. The first optical coupler is coupled to the primary light source and the photonic integrated circuit to control the propagation of the primary light to the photonic integrated circuit. The auxiliary light source may be configured to generate an auxiliary light when the primary light source malfunctions and the first MOSCAP MRR and the second MOSCAP MRR are controlled to control propagation of the auxiliary light from the auxiliary light source to the photonic integrated circuit.

A centimeter-resolution integrated photonic millimeter-wave (mmWave) radar chip operating in the mmWave V band based on a 4-inch wafer-scale thin-film lithium niobate (TFLN) technology is provided. The fabricated TFLN photonic mmWave integrated circuit has a first electro-optic modulator (EOM) capable of generating a broadband linear frequency modulated mmWave radar waveform through optical frequency multiplication of a low-frequency input signal, and a second EOM for frequency de-chirp of the reflected echo wave, thereby greatly relieving bandwidth requirements for the digital-to-analog converter in the transmitter and analog-to-digital converter in the receiver. In the absence of optical and electrical filters, the radar chip features continuous on-demand tunability of the center frequency and bandwidth, currently only limited by the bandwidths of electrical amplifiers. The radar chip provides a promising way to achieve high resolution sensing and detection for vehicle radar, airborne radar, and smart home in the 6G era.

A method of assembling an optical device including: providing a photonic integrated circuit including a plurality of vertical-coupling elements disposed along a main surface of the photonic integrated circuit; attaching an optical subassembly to the photonic integrated circuit; removably connecting a fiber connector to a ferrule frame, in which the fiber connector is attached to an array of optical fibers; aligning the ferrule frame to the optical subassembly using an active alignment process; and securely connecting the ferrule frame to the optical subassembly after the active alignment process.

Electro-photonic integrated circuits comprising optical transmitters and receivers are disclosed, wherein a monolithically integrated electro-absorption modulated laser (EML) is operable bidirectionally, in a transmitter mode and in a receiver mode. Vertically stacked waveguides are provided for a laser and an electro-absorption modulator (EAM). The laser and EAM are optically coupled using a laterally tapered vertical optical coupler. The EML comprises monolithically integrated electronic circuitry, e.g., driver and control electronics for the driving the laser and EAM as an EML, in transmitter mode. The control circuitry comprises a transimpedance amplifier (TIA). The EAM has first and second parts that can be independently biased. In receiver mode, the laser current is reduced to close to the threshold, and a first part of the EAM is biased to absorb residual laser light, and the second part of the EAM acts as a photodiode receiver to provide a photocurrent to the TIA.

An optoelectronic apparatus (100, 500) includes a dual folding mirror (114, 510) mounted on a carrier substrate (112, 524) with first and second reflecting surfaces (520, 522) disposed at opposite angles. A plurality of identical photonic integrated circuits (PICs 108, 110, 320, 502, 504, 506, 508) are disposed on the carrier substrate. Each PIC includes an array of optical transceiver cells (314, 400) on a planar substrate with respective edge couplers (406) along an edge of the planar substrate, and an optical distribution tree (320) coupled to convey coherent radiation to the optical transceiver cells. A first PIC is disposed on the carrier substrate such that the edge of the first PIC is in proximity to the first reflecting surface, and a second PIC is rotated by 180° relative to the first PIC such that the edge of the second PIC is in proximity to the second reflecting surface.

The invention describes an apparatus that implements efficient coupling between a photonic integrated circuit (PIC) and a second optical element such as a fiber or laser, while at the same time allowing for efficient polarization management and / or optical isolation. It enables the packaging of PICs with large single mode fiber counts and in- and out-coupling of light with arbitrary polarization. The apparatus comprises a glass interposer that contains at least one polarization selective element together with a pair of lenses transforming a beam profile between the 2nd optical element and a polarization selective coupler on the PIC. The invention also comprises a method for fabricating the apparatus based on a subassembly of building blocks that are manufactured using wafer-scale high-precision glass-molding and surface treatment(s) such as thin-film coating.

The invention discloses a photonic integrated circuit chip and a silicon optical integration platform, and aims to provide a specific waveguide structure on the photonic integrated circuit chip to realize efficient coupling with a common single-mode fiber, and meanwhile, a suspended structure is not introduced, so that the overall structure has relatively high mechanical stability. The method can pass high-temperature and high-humidity reliability test conditions of the photon integrated circuit chip, and is compatible with reflow soldering, silicon through hole and other processes.

An apparatus includes a fiber-optic connector configured to be connected between one or more optical fibers having fiber cores and a photonic integrated circuit (PIC) including vertical-coupling elements. The fiber-optic connector includes a polarization beam splitter and a patterned birefringent plate. The polarization beam splitter splits an incident light beam from a fiber core into first and second beams having first and second polarizations, respectively. The patterned birefringent plate includes a first region (having a first optical birefringence) and a second region (having a second optical birefringence). The difference in the first and second optical birefringence is caused by (i) applying localized heating to the first region without applying localized heating to the second region to cause the first region to have a lower birefringence as compared to the second region, or (ii) applying different amounts of localized heating to the first and second regions to produce different birefringence.

A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.

An apparatus comprising an interposer to couple conductive contacts of a substrate to conductive contacts of an integrated circuit device, wherein the interposer comprises a cavity proximate conductive contacts of the interposer, the conductive contacts of the interposer to couple to conductive contacts of a photonics integrated circuit (PIC).

Embodiments described herein are related to enabling detachable optical fiber-to-waveguide coupling. A system can include a first connection component including a waveguide and a mirror formed on a base structure, the base structure including at least one photonic integrated circuit (PIC) formed on a substrate, and a detachable second connection component coupled to an optical fiber. The detachable second connection component is configured to mate with the first connection component to enable optical signal coupling between the optical fiber and the waveguide. The mirror is configured to at least one of: reflect a first optical signal received from the waveguide to the optical fiber, or reflect a second optical signal received from the optical fiber to the waveguide.