39 results about "Antenna effect" patented technology

The invention discloses an unsupervised deep learning rainfall dry and wet period classification and monitoring method, which adopts dry period CML signal training, learns normal signal features through an auto-encoder, a variational auto-encoder and a fusion model thereof, and realizes rainfall abnormal attenuation detection by taking reconstruction errors and potential distribution deviation as discrimination indexes. According to the method, extra equipment and manual marking are not needed, rainfall events can be automatically identified, cross-link and cross-region generalization ability is achieved, robustness to non-rainfall interference such as a wet antenna effect is high, large-scale real-time monitoring can be achieved in a smart city and a 6G integrated sensing scene, and the method is widely applied to the fields of weather, hydrology and disaster early warning.

This invention belongs to the field of immunoassay and biosensing technology, and discloses a method for preparing a ratiometric ECL biosensor based on Eu / Tb-Lu MOGs. Using Eu / Tb-Lu MOGs as the luminescent material and H3-tctpy and luminol as ligands, a single-luminescent material with dual ECL emission is synthesized. Lanthanide ions provide the cathode ECL emission, enhanced by the antenna effect and Tb→Eu energy transfer; the anode emits light from luminol using dissolved oxygen in water, requiring only the addition of K2S2O8 as a single co-reactant, resulting in fewer side reactions and a stable signal. The dual-potential ratiometric sensing utilizes the dual ECL signal for self-calibration, improving anti-interference and reliability; the single-luminescent dual-potential system achieves synchronous anode / cathode luminescence, simplifying the system and improving detection accuracy. By detecting changes in the ECL signal of different concentrations of analytes, the detection of microRNA-126 is achieved.

The invention relates to the technical field of electromagnetic shielding, and discloses electronic equipment which comprises a metal assembly, a flexible circuit board assembly and a fixing piece. The flexible circuit board assembly and the metal assembly are arranged at an interval, and a first gap is formed between the metal assembly and the flexible circuit board assembly; the fixing piece is arranged in the first gap, and the fixing piece is connected with the metal assembly and the flexible circuit board assembly. According to the electronic equipment, the flexible circuit board assembly and the metal assembly are arranged at intervals, parasitic capacitance can be reduced, the antenna effect can be effectively restrained, the fixing piece is connected with the metal assembly and the flexible circuit board assembly, the flexible circuit board assembly can be fixed relative to the metal assembly, and the structural stability is improved.

An electronic device includes a circuit module and a protection module. The circuit module includes a P-N junction between a reference terminal and an electrical node, and metal connection lines coupled to the electrical node and configured to be charged due to antenna effect. The protection module includes an HV transistor and a capacitor. The capacitor is connected between the electrical node and the HV transistor and configured to turn on the HV transistor when the electrical node charges positively due to the antenna effect. The circuit module is thus maintained at a potential that does not damage the electronic device.

This application provides a method, apparatus, electronic device, and storage medium for analyzing the top layer of a digital-to-analog chip. The method includes: determining first parameter information of metal line segments connected to a third-party module in the top layer of the digital-to-analog chip based on a chip layout data file of the top layer; determining antenna risk values ​​of connection nodes between the top layer of the digital-to-analog chip and the third-party module based on the first parameter information; when the antenna risk value is higher than a preset risk threshold, converting the chip layout data file into a first diagram structure and determining second parameter information between the third-party modules based on the first diagram structure; and analyzing antenna effects occurring at connection nodes between the top layer of the digital-to-analog chip and the third-party module based on the second parameter information. This application can perform analysis of the top layer of a digital-to-analog chip without using GDSII for antenna effect analysis.

The invention belongs to the technical field of chemical analysis sensing and materials, and particularly relates to an L-histidine functionalized lanthanide series metal-organic gel sensor as well as a preparation method and application thereof. According to the sensor, a stable 353 nm reference signal generated by Zr < 4 + >-L-His ligand-metal charge transfer (LMCT) is combined with a formaldehyde responsive 546 nm signal output by a BTC-Tb < 3 + > antenna effect to construct a self-calibration double-signal ratio detection mechanism (I546 / I353), so that the detection reliability is remarkably improved. The sensor can be integrated on a fluorescent test strip and a molecular logic gate, realizes on-off type visual grading detection, is suitable for on-site rapid quantitative and qualitative analysis of formaldehyde in complex scenes such as environmental water bodies and industrial products, and solves the problems of poor stability, weak interference resistance and insufficient single-signal reliability of a traditional sensor.

A low formation voltage NVM device is provided by forming a pair of sacrificial conductive pads on an interconnect dielectric material layer that is embedded with a pair of second conductive structures and a patterned material stack. One of the sacrificial conductive pads has a first region and contacts a surface of one of the second conductive structures that contacts a surface of an underlying first conductive structure, and the other of the sacrificial conductive pads has a second region different from the first region and contacts a surface of the other of the second conductive structures that contacts a surface of a top electrode of the patterned material stack. A plasma treatment is performed to induce an antenna effect and convert a dielectric switching material of the patterned material stack into a conductive filament. After the plasma treatment, the pair of sacrificial conductive pads is removed.

The present disclosure provides an antenna effect processing method, relates to the technical field of artificial intelligence, and particularly relates to the technical field of chip design, integrated circuit design and manufacturability design. The method comprises the following steps: based on the port correspondence relationship between a target module and an interaction module, determining an interaction port for a target port to be designed in the target module among ports included in the interaction module; based on an interaction metal layer required by a wire of the interaction port and a corresponding interaction layer area of the interaction metal layer, and an actual gate oxide layer area corresponding to the interaction port, determining an equivalent gate oxide layer area corresponding to the interaction metal layer; and based on the equivalent gate oxide layer area corresponding to the interaction metal layer, designing a target layer area used by a target metal layer corresponding to the interaction metal layer for wire of the target port. The present disclosure realizes accurate quantification and pre-constraint of cross-module interconnection antenna effect at the module level, shortens the design iteration period, and optimizes the chip area efficiency.

An integrated circuit (IC) device includes an antenna effect protection device, and a to-be-protected device. A first source / drain of the antenna effect protection device is electrically coupled to a gate of the to-be-protected device. The antenna effect protection device is a bulk-less device.

The present disclosure provides a semiconductor test structure and a preparation method thereof. The semiconductor test structure comprises a substrate, the substrate comprises a first doped region and a second doped region, a transistor is arranged on the substrate of the first doped region, and a first conductive layer, a dielectric layer and a second conductive layer are sequentially arranged on the substrate of the second doped region. The material of the first conductive layer comprises a metal material, the material of the substrate comprises a semiconductor material, the first conductive layer is electrically connected with a gate of the transistor, the first conductive layer forms a Schottky contact with the substrate, and the first conductive layer and the second conductive layer are electrically isolated by the dielectric layer. The charge on the gate can be discharged through the first conductive layer and the substrate. The first conductive layer, the dielectric layer and the second conductive layer can jointly form a capacitor structure, and the capacitor structure can share the charge on the gate. Therefore, the semiconductor test structure and the preparation method thereof provided by the present disclosure can more comprehensively reduce or avoid the damage of the antenna effect to the transistor, thereby improving the protection effect of the transistor.

The invention relates to an antenna effect driving layer distribution method considering the size of a through hole, and the method comprises the following steps: (1) an initialization stage: restoring abstract mass points in a 3D grid chart into rectangular grid units with geometric sizes, carrying out the statistics of the wiring resource information of each wiring layer, and obtaining an initial 2D wiring scheme; (2) legalization stage: on the basis of a parameter selection strategy of wire net dissimilation, setting differentiated weight parameters for wire nets with different time sequence criticality, eliminating wire overflow through wire clearing and rewinding, and optimizing the time sequence performance of the wire nets; and (3) an optimization stage: simulating a stacking sequence of metal layers from bottom to top in a chip manufacturing process by adopting a wire moving strategy considering a wire net structure, calculating an antenna effect violation number layer by layer, and cutting an antenna effect violation area by adjusting a wiring layer where a wire is located, so as to reduce the antenna effect violation number. According to the method, under the condition that various through hole sizes and wire sizes are considered, the number of antenna effect violations can be reduced, and the performance of a chip is improved.

This invention discloses a layout structure, design method, and system-on-a-chip for a clock buffer module. The layout structure of the clock buffer module includes: a standard buffer unit; multiple functional element units, including at least one pre-embedded coupling capacitor unit and at least one pre-embedded charge discharge unit; multiple functional element units are integrated in the layout in a manner surrounding the standard buffer unit; signal pins and power pins are located on different preset high-layer metal layers, and the signal connection terminals and power connection terminals of the standard buffer unit are electrically connected to the signal pins and power pins respectively through internal connection holes. The technical solution provided by this invention improves upon the uncontrollable problems such as wiring, voltage drop, and antenna effects caused by directly using high-drive-force devices provided in the process library, while also avoiding the dependence on customized high-drive-force devices for high-speed, long-distance, low-latency applications.

The invention relates to a circuit structure and a semiconductor structure for eliminating an antenna effect, the circuit structure for eliminating the antenna effect comprises at least one diode and a buffer, one end of the diode and the input end of the buffer are connected with the input end of the circuit structure, and the output end of the buffer is the output end of the circuit structure. The other end of the diode is grounded. In the embodiment of the invention, through the above circuit structure, charges accumulated in the circuit can be exported through the diode, that is to say, when the charges are accumulated too much, reverse breakdown can be preferentially carried out on a grid tube of the diode, so that charge leakage is realized, damage to a grid electrode in a semiconductor device needing to eliminate an antenna effect can be avoided, and the antenna effect can be eliminated. And the antenna effect in the circuit is effectively eliminated.

The present application provides an antenna effect electrostatic discharge detection circuit and a method for measuring electrostatic discharge quantity. The antenna effect electrostatic discharge detection circuit includes a first antenna effect electrostatic discharge detection device and a first electrostatic discharge protection device. The first antenna effect electrostatic discharge detection device is coupled between a first pad and a second pad. The first electrostatic discharge protection device is coupled between an input / output pad and the first pad. An internal circuit is coupled to the input / output pad, the first external electrostatic discharge protection device and the first antenna effect electrostatic discharge detection device.

The invention discloses a power supply integrity repairing method and device and a storage medium, and belongs to the technical field of semiconductors, and the power supply integrity repairing method comprises the steps: obtaining layout power supply distribution network data, executing voltage drop analysis and electromigration analysis, and generating voltage drop distribution data and electromigration hotspot data; identifying an intersection region which conforms to the minimum punching rule and is associated with the voltage drop difference value and the electromigration value in the adjacent metal layers as a candidate punching region; for each candidate region, calculating the maximum number of through holes based on a voltage drop difference value when the region has no through hole, and calculating the maximum number of through holes based on an electromigration value when the region has the through hole; and executing a through hole adding operation according to a calculation result, and generating optimized layout data. The number of the through holes is dynamically determined through collaborative analysis of voltage drop and electromigration, the influence of parasitic parameters can be reduced while the integrity of the power supply is improved, the process reliability is ensured, the antenna effect is prevented, and comprehensive optimization of the power supply network is achieved.

This invention discloses a multifunctional integrated transparent antenna, belonging to the field of wireless communication technology. It includes a transparent antenna plate, the upper surface of which is printed with a radiator and a first coplanar waveguide using a metal mesh or nano-silver process. A coupling plate, on which a second coplanar waveguide is disposed, is fixedly connected to the first coplanar waveguide by screws, used for feeding or receiving radio frequency signals to the transparent antenna plate via capacitive coupling. A coaxial cable is welded and fixed to the coupling plate. A light source circuit board is disposed on the back of the transparent antenna plate, and has a power supply and multiple LEDs on it. A housing is fixedly connected to the transparent antenna plate, the coupling plate, and the light source circuit board. This invention covers multiple frequency bands of indoor distribution systems and integrates radiated radio frequency signals and information indication functions. Its appearance does not affect the aesthetics of the environment. Furthermore, by suppressing the antenna effect of the traces on the light source circuit board of the indicator, it avoids the influence of the radiation from the light source circuit board on the radiation and passive intermodulation performance of the transparent antenna.

The invention provides an analysis method and device for a top layer of a digital-analog chip, electronic equipment and a storage medium, and the method comprises the steps: determining first parameter information of a metal line segment, connected with a third-party module, of the top layer of the digital-analog chip according to a chip layout data file of the top layer of the digital-analog chip; according to the first parameter information, determining an antenna risk value of a connection node with the third-party module in the top layer of the digital-analog chip; when the antenna risk value is higher than a preset risk threshold value, converting the chip layout data file into a first graph structure, and determining second parameter information between the third-party modules according to the first graph structure; and according to the second parameter information, analyzing an antenna effect of a connection node between the top layer of the digital-analog chip and the third-party module. According to the application, the analysis of the top layer of the digital-analog chip can be realized in the GDSII which is not used for the running antenna effect.

The invention discloses an outrigger in-wall communication system which comprises an in-arm controller, an optical fiber cable, a cable drum and a main controller, the in-arm controller, the optical fiber cable and the cable drum are arranged in a crane outrigger, the main controller is arranged on a crane rotary table, the optical fiber cable stretches out and draws back on the cable drum, one end of the optical fiber cable is connected with the in-arm controller through a first optical fiber converter, and the other end of the optical fiber cable is connected with a second optical fiber converter. The other end is connected with the main controller through the second optical fiber converter; the in-arm controller collects internal signals of the crane extending arm and transmits the internal signals to the main controller through the first optical fiber converter, the optical fiber cable and the second optical fiber converter in sequence. By means of the anti-electromagnetic interference characteristic of optical signals, electromagnetic interference generated by the antenna effect caused by the fact that the cable of the cable drum in the arm is pulled up too long can be effectively avoided, and stable transmission of signals in the arm is achieved.

A method for determining a process deficiency relating to an antenna effect of a three-dimensional integrated circuit (3DIC) design is provided. The 3DIC design includes at least two electrically connected circuit components. A first circuit component of the circuit components includes at least one first sub-circuit. A second circuit component of the circuit components includes at least one interposer and / or at least one second sub-circuit. The respective sub-circuit includes one or more metal layers and at least one gate. The respective interposer includes at least one metal layer. The method includes providing the 3DIC design and determining at least one geometric property of at least one representative metal layer of the respective circuit component using the 3DIC design. The respective geometric property of the at least one representative metal layer is representative of the respective circuit component with respect to an antenna effect of the respective circuit component. The method includes determining a stacked arrangement of the representative metal layers representing the respective circuit components, determining a stacked antenna effect value of the stacked arrangement using the geometric properties of the representative metal layers, and outputting that the integrated circuit design has a process deficiency if the stacked antenna effect value exceeds a preconfigurable threshold

The application provides a semiconductor test structure and a test method, and belongs to the technical field of semiconductors. The test structure comprises two test branches, wherein the first test branch comprises n (n>=1) first test transistors and a first reference transistor, the gate oxide of the first test transistor and the first reference transistor has a first thickness, and the gate electrode of the first test transistor is connected with a corresponding first antenna structure; the second test branch comprises n second test transistors and a second reference transistor, the gate oxide of the second test transistor and the second reference transistor has a second thickness, the second thickness is smaller than the first thickness, and the gate electrode of the second test transistor is connected with a corresponding second antenna structure. The application can automatically judge the damage degree of the antenna effect on the gate oxide by using the threshold voltage deviation of the two test branches, thereby solving the problem that the damage degree of the gate oxide cannot be identified and the problem of missed judgment, and the accuracy and reliability of antenna effect monitoring are improved.

An antenna-effect electrostatic discharge (ESD) detection circuit and a method for measuring the antenna-effect ESD quantity are provided. The antenna-effect ESD detection circuit includes a first antenna-effect ESD detection device and a first ESD protection device. The first antenna-effect ESD detection device is coupled between a first pad and a second pad. The first ESD protection device is coupled between an I / O pad and the first pad. The internal circuit is coupled to the I / O pad, the first external ESD protection device, and the first antenna-effect ESD detection device.

The invention relates to the technical field of surface-enhanced Raman scattering chips, in particular to a surface-enhanced Raman scattering substrate and a preparation method thereof. According to the surface-enhanced Raman scattering substrate provided by the invention, the sensitivity and high uniformity of surface-enhanced Raman scattering are synergistically improved through the antenna effect of the nanorod unit structure and gold-zinc oxide heterojunction charge transfer. Specifically, the antenna effect of the nano-column unit structure can form strong local plasmon resonance in gaps of the nano-column unit structure, and three-dimensional hot spot distribution can be constructed in the structural gaps between the nano-columns and the gold-zinc oxide heterojunction nano-columns and the structural gaps between the gold-zinc oxide heterojunction nano-columns. Meanwhile, an effective charge transfer channel is constructed by the high electron mobility of zinc oxide, and the Raman signal intensity is remarkably enhanced through the synergistic effect of zinc oxide and zinc oxide.

The invention belongs to the technical field of chemical analysis, and relates to L-histidine functionalized ZrTb-His-MOG as well as a preparation method and application thereof. The fluorescent material is formed by coordination self-assembly of Zr < 4 + >, Tb < 3 + > and bifunctional ligands L-His and BTC through a solvothermal method. A 366 nm signal is generated by Zr < 4 + >-L-His ligand-metal charge transfer, and a 546 nm signal output by a BTC-Tb < 3 + > antenna effect is combined to construct a double-signal ratio detection mechanism for quantitative detection of Hg < 2 + >; and the adsorption quantity is measured through an ultraviolet absorption spectrum. The material shows high selectivity, wide linear detection range and strong adsorption capacity to Hg < 2 + >, the reliability is verified through sample adding standard recovery and adsorption saturation capacity tests, the material is suitable for rapid detection and efficient adsorption of Hg < 2 + > in complex scenes such as industrial wastewater, and the problems that a traditional material is low in detection precision and poor in adsorption performance are effectively solved.

The invention discloses a lamp substrate, a lamp driving board, a lamp module and display equipment, and relates to the technical field of display, the lamp substrate is used for being matched with the lamp driving board to work, the lamp driving board comprises a first connector, and the first connector comprises a first grounding end; the lamp substrate comprises a first circuit substrate, a lamp bead and a second connector, and the lamp bead is arranged on the first circuit substrate; the second connector is arranged on the first circuit substrate, the second connector is connected with the lamp beads, the second connector is used for being connected with the first connector through a connecting line, and the connecting line is sleeved with a shielding layer; the first connector comprises a first grounding end which is connected with one end of the shielding layer, and the second connector further comprises a second grounding end which is used for being connected with the other end of the shielding layer so as to neutralize the antenna effect of the first grounding end acting on the shielding layer; the technical scheme provided by the invention aims to reduce electromagnetic radiation emitted by the display equipment when the lamp beads of the display equipment are turned on and off.

The present disclosure relates to a protective electronic device for preventing damage caused by a plasma-assisted process and a method of manufacturing the same. An electronic device includes a circuit module and a protection module. The circuit module includes a P-N junction between a reference terminal and an electrical node, and a metal connection line coupled to the electrical node and configured to be charged due to an antenna effect. The protection module includes an HV transistor and a capacitor. The capacitor is connected between the electrical node and the HV transistor and is configured to turn on the HV transistor when the electrical node is positively charged due to the antenna effect. Thus, the circuit module is maintained at a potential that does not damage the electronic device.

The present application belongs to the field of environment and food detection technology, and specifically relates to a kind of on-site fluorescent visualization detection method of antibiotic residue.The present application constructs a convenient, fast and sensitive sensing detection platform by designing fluorescent probe molecule Eu@CDs with target recognition function and combining with smart phone portable sensor.The fluorescent probe molecule Eu@CDs of the present application has blue fluorescence emission at 450 nm.When NFZ is introduced, blue light is quantitatively quenched.After adding TC, the beta-diketone group of TC is combined with Eu 3+ Chelate, absorb energy and sensitize Eu through "antenna effect" 3+ Emit 617 nm characteristic red light.Thereby, the present application realizes on-site single-probe synchronous sampling detection of NFZ and TC, and the detection limit is 0.0034 mg / L and 0.00870 mg / L respectively, and the linear range is 0.011-32.0 mg / L and 0.029-40.0 mg / L respectively, which provides an efficient and accurate solution for rapid screening of environmental and food pollutants.

The utility model relates to a heating demisting device and a vehicle. The heating demisting device comprises a positive electrode part, a negative electrode part and a heating part, the positive electrode part is used for being connected with a power source, the negative electrode part is adjacent to the positive electrode part, the first end of the heating part is electrically connected with the positive electrode part, and the second end of the heating part is electrically connected with the negative electrode part. According to the heating demisting device provided by the embodiment of the invention, the noise current of the heating demisting device can be reduced, the antenna effect of the heating element is reduced, and the electromagnetic coupling with the antenna is reduced, so that the influence on the antenna can be reduced, and the receiving performance of the antenna is ensured.

An exemplary apparatus includes a through-silicon via (TSV) and circuit that protects against the antenna effect and electrostatic discharge (ESD). The circuit can include a plurality of transistors whose gates are each electrically coupled to a signal that passes through the TSV. Various other apparatuses, systems, and methods are also disclosed.

The application provides a protection diode identification method, comprising: obtaining a layout, identifying a source-drain doped region; identifying an active region connection line in contact with the source-drain doped region and not in contact with an active region other than the source-drain doped region and not in contact with a gate connection line, i.e. a pin of a protection diode; and identifying the protection diode by identifying the pin of the protection diode. The application can automatically and quickly provide an optional protection diode to avoid an antenna effect. The application also provides a winding method, which obtains the pin of the protection diode by the protection diode identification method, and automatically connects to a gate of a transistor to protect the gate. The test chip design method of the application can automatically and quickly add the protection diode to a transistor type target object by using the winding method, and further improves the design efficiency. The test chip design method, system and test chip have corresponding advantages.

The invention belongs to the technical field of nano material detection, and particularly discloses a double-ligand lanthanide series metal organic framework Tb-MOF for rapidly detecting enoxacin and a rapid detection method for enoxacin concentration. According to the invention, 2, 6-pyridinedicarboxylic acid and 2-aminoterephthalic acid are used as modification ligands to construct Tb-MOF, and after enoxacin is added into a system of the Tb-MOF, the fluorescence intensity and fluorescence color of the Tb-MOF are subjected to characteristic change due to an antenna effect, so that the fluorescence colorimetric sensor is constructed. A portable detection device based on a smart phone is further designed, a cloud server data analysis system integrated with a machine learning algorithm is fused with the smart phone, and collection, correction, analysis and result display of fluorescence color data can be efficiently completed. According to the invention, the capturing and processing capability of a modern smart phone on fluorescence color signals is fully utilized, and a set of solution which is convenient to operate and user-friendly is provided for on-site detection of enoxacin.