Examination method for different-party IP (internet protocol) containing client party chip antenna effect

Abstract

The invention discloses an examination method for different-party IP (internet protocol) containing client party chip antenna effect. The method includes following steps: step one, identifying all input and output interfaces in an IP module layout; step two, selecting the input and output interface used for generating final data; step three, taking the input and output interface as a starting point to extract out all lines related to the antenna effect along the lines connecting every interface from top to bottom; step four, enabling the extracted lines to generate a GDSII formatted file capable of being read by a user layout tool and providing the file for a client; and step five, synthesizing the GDSII formatted file into a main chip by the client for physical layout verification of the final data. By the method, data which can be directly used for antenna design rule examination by a client party can be generated, and a design company can perform antenna effect examination close to an entity through tools before the data are given out, so that repeat data modification caused by violation of design rules by the client can be avoided.

Description

technical field [0001] The invention relates to a method for checking a chip, in particular to a method for checking the antenna effect of a client-side chip containing a different IP. Background technique [0002] In the process of chip (Wafer) manufacturing, due to the relationship of PLASM (plasma) implantation, a large amount of charge accumulation may be transferred to the gate-level region through the conductor layer exposed on the Wafer surface, resulting in damage to the gate-level oxide film and affecting the device. Yield, this phenomenon is called "antenna effect". [0003] In order to avoid the antenna effect, generally after the physical layout is completed, software tools are used to perform Antenna (antenna) DRC (Design Rule Check) inspection on the chip. However, due to the protection of their own intellectual property rights, the supplier of IP (a chip unit) module generally does not provide the design company with a complete layout of the IP module to ensu...

AI Technical Summary

Problems solved by technology

And because the data read by the two is different, it is likely to lead to different DRC results, causing customers to be at a loss, such as figure 1 shown

[0011] In addition, after placing and routing, some customers will use the layout tool to modify the layout and routing results, and the modified layout cannot be checked in the layout and routing tool with Antenna LEF

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