5650 results about "External circuit" patented technology

A chip package includes a semiconductor substrate, a first metal pad over the semiconductor substrate, and a second metal pad over the semiconductor substrate. In a case, the first metal pad is tape automated bonded thereto, and the second metal pad is solder bonded thereto. In another case, the first metal pad is tape automated bonded thereto, and the second metal pad is wirebonded thereto. In another case, the first metal pad is solder bonded thereto, and the second metal pad is wirebonded thereto. In another case, the first metal pad is bonded to an external circuitry using an anisotropic conductive film, and the second metal pad is solder bonded thereto. In another case, the first metal pad is bonded to an external circuitry using an anisotropic conductive film, and the second metal pad is wirebonded thereto.

A flat no-lead semiconductor die package contains a plurality of studs that protrude from the bottom surface of the capsule and act as electrical contacts, allowing the package to be mounted on a flat surface such as a printed circuit board, while permitting external circuit to be located on the flat surface directly beneath the package. The package may or may not contain a die-attach pad. The die may be mounted flip-chip style on the stud contacts and die-attach pad. A method of fabricating the package includes etching an upper portion of a metal sheet through a mask layer, attaching dice at locations on the surface of the metal sheet, forming a layer of molding compound over the dice, etching the lower portion of the metal sheet through a second mask layer, and separating the packages with a dicing saw or punch tool.

Disclosed is a high power LED package, including an LED; a silicon submount to which the LED is flip chip bonded; a reflective film formed on the silicon submount and electrically connected to the LED to increase light emitting efficiency of the LED; electrical wires connected to the reflective film to connect the LED to an external circuit; an insulating body formed below the silicon submount; a heat sink formed below the insulating body; an insulating substrate formed on the heat sink; and metal lines formed on the insulating substrate and connected to the electrical wires. In the LED package, since the silicon submount having the LED flip chip bonded thereto is directly attached to the heat sink, heat generated upon operation of the LED can be effectively radiated. Also, the LED package has a simple structure, thus having drastically decreased manufacturing costs. The high power LED can be applied to backlight units of LCDs or general illumination fixtures, and as well, to backlight units of conventional PCS phones or LED packages for key pads, therefore increasing the light properties of the LED. In particular, the LED package has an array of two or more submounts each having an LED flip chip bonded thereto, and thus, it can be applied to a module of a backlight unit for LCDs, thus having remarkably reduced manufacturing costs.

An optical measuring device having multiple optical paths between one or more light emitters and one or more light detectors and/or providing at least two sets of wavelength of light along at least one path, with a final measurement being produced as a combination of measurements of the sets of wavelengths of light taken along one or more of the optical paths. Features that contribute to increased safety and ease of use include providing (1) a receiving cavity in a proximal end of an insertion rod that holds a free end of a circuit connector to keep it from becoming tangled or snagged, (2) a mechanism to keep the sensor within an introducer tube during storage and insertion and to expose a portion of the sensor only when the sensor is applied to the unborn baby, (3) a tab on the insertion rod to prevent the circuit connector from becoming tangled or snagged within the introducer tube, (4) a rotating feature whereby if a torque applied on the sensor exceeds a first predetermined amount, the sensor rotates, and a disengaging feature whereby the sensor detaches from insertion rod if a pull-off force exceeds a second predetermined amount, the rotating and disengaging features being independent of one another, (5) a circuit connector that includes at least one of the following features: (a) a stiffening member provided at the proximal end to minimize bending, (b) a shielding layer, and (c) at least one slit to increase the flexibility of the circuit connector, and (6) an interface that includes an identification element that is detected by an external circuit only if the circuit connector is connected to the interface. The present invention also pertains to a method of manufacturing a needle that is used in an invasive sensor, and preferably for fetal monitoring, that provides features not heretofore available in conventional sensors.

A package structure includes a first dielectric layer, semiconductor device(s) attached to the first dielectric layer, and an embedding material applied to the first dielectric layer so as to embed the semiconductor device therein, the embedding material comprising one or more additional dielectric layers. Vias are formed through the first dielectric layer to the at least one semiconductor device, with metal interconnects formed in the vias to form electrical interconnections to the semiconductor device. Input/output (I/O) connections are located on one end of the package structure on one or more outward facing surfaces thereof to provide a second level connection to an external circuit. The package structure interfits with a connector on the external circuit to mount the package perpendicular to the external circuit, with the I/O connections being electrically connected to the connector to form the second level connection to the external circuit.

A low cost technique for packaging microelectronic circuit chips fixes a die within an opening in a package core. At least one metallic build up layer is then formed on the die/core assembly and a grid array interposer unit is laminated to the build up layer. The grid array interposer unit can then be mounted within an external circuit using any of a plurality of mounting technologies (e.g., ball grid array (BGA), land grid array (LGA), pin grid array (PGA), surface mount technology (SMT), and/or others). In one embodiment, a single build up layer is formed on the die/core assembly before lamination of the interposer.

System for providing an open-cavity semiconductor package. The system includes a method for wire bonding a finger sensor die to an external circuit. The finger sensor die includes a sensor array having one or more die contacts that are wire bonded to one or more external contacts of the external circuit so that a usable portion of the sensor array is maximized. The method comprises steps of forming a ball at a first end of a bonding wire, forming an electrically conductive connection between the ball and a selected external contact of the external circuit, extending the bonding wire to a selected die contact so as to form a wire loop having a low loop height, and forming an electrically conductive stitch connection between a second end of the bonding wire and the selected die contact.

A high capacity, high charge rate lithium secondary cell includes a high capacity lithium-containing positive electrode in electronic contact with a positive electrode current collector, said current collector in electrical connection with an external circuit, a high capacity negative electrode in electronic contact with a negative electrode current collector, said current collector in electrical connection with an external circuit, a separator positioned between and in ionic contact with the cathode and the anode, and an electrolyte in ionic contact with the positive and negative electrodes, wherein the total area specific impedance for the cell and the relative area specific impedances for the positive and negative electrodes are such that, during charging at greater than or equal to 4C, the negative electrode potential is above the potential of metallic lithium. The current capacity per unit area of the positive and negative electrodes each are at least 3 mA-h/cm², the total area specific impedance for the cell is less than about 20 Ω-cm², and the positive electrode has an area specific impedance r₁ and the negative electrode has an area specific impedance r₂, and wherein the ratio of r₁ to r₂ is at least about 10.

The lateral RF MOS device having a conducive plug in the source region and an oxide plug in the drain region is disclosed. The oxide plug in the drain region reduces the drain-source capacitance, improves the matching ability to the outside circuitry, and results in a lateral RF MOS device having a wider BW, and an improved power efficiency than a prior art lateral RF MOS device. The oxide plug can comprise a shallow plug or a deep plug. The shallow oxide plug results in a lesser reduction in the drain-source capacitance but is relatively easy to fabricate. The deep oxide plug results in a higher reduction in the drain-source capacitance but is relatively difficult to fabricate.

An electrical storage device of the present invention is characterized in that a positive electrode, a negative electrode, a lithium electrode, and an electrolyte capable of transferring lithium ion is included, the lithium electrode is arranged to be out of direct contact with the negative electrode, and lithium ion can be supplied to the negative electrode by flowing a current between the lithium electrode and the negative electrode through an external circuit. With the above characteristic, problems such as non-uniform carrying of lithium ion to the negative electrode, shape-change of a cell, and temperature increase of an electrolytic solution under incomplete sealing of a cell and the like can be easily solved. A using method of the electrical storage device is characterized in that, by using the lithium electrode as a reference electrode, the positive electrode potential and negative electrode potential can be measured, and the potential of the positive or negative electrode can be controlled when the electrical storage device is charged or discharged. Therefore, the potentials of the positive electrode and negative electrode can be monitored, thereby it can be easily determined whether deterioration of the electrical storage device is caused by the positive electrode or the negative electrode. Also, it is possible to control the device with the potential difference between the negative electrode and reference electrode, that is, the negative potential. In addition, when characteristics deteriorate such as the internal resistance increase, an appropriate amount of lithium ion can be supplied to the negative electrode and/or positive electrode by the lithium electrode.

There is presented a high frequency module, in which a recess 2a for mounting power amplifier device is formed on a lower surface of a dielectric substrate 2, and a recess 2b for mounting surface acoustic wave filter is formed on an upper surface of the dielectric substrate 2, and a power amplifier device 4 and a surface acoustic wave filter 8 are mounted through conductive bumps 3a and 3b on the recesses 2a and 2b, respectively. In addition, a through-hole conductor 11 whose one end is exposed at the lower surface of the dielectric substrate 2 is provided between the recesses 2a and 2b. The exposed end of the through-hole conductor 11 is attached to a thermal dissipation conductor 15 on an upper surface of an external electric circuit board 7 through a brazing material 13.

Disclosed herein is an LED package for a backlight unit. The LED package includes a plurality of LEDs, a die bonding part, a wire bonding part and a body. The die bonding part, on which the plurality of LEDs is arranged, allows the first electrodes of the LEDs to be electrically connected to an external circuit. The wire bonding part is spaced apart from the die bonding part by a predetermined distance to be insulated from the die bonding part and allows the second electrodes of the LEDs to be electrically connected to the external circuit so that the LEDs are operated. The body has a molding cup which is used to fill a space above the LEDs with transparent resin and a base on which the die bonding part and the wire bonding part are arranged.

The invention concerns a tamper-resistant electronic circuit configured for implementation in a device. The electronic circuit securely implements and utilizes device-specific security data during operation in the device, and is basically provided with a tamper-resistantly stored secret not accessible over an external circuit interface. The electronic circuit is also provided with functionality for performing cryptographic processing at least partly in response to the stored secret to generate an instance of device-specific security data that is internally confined within said electronic circuit during usage of the device. The electronic circuit is further configured for performing one or more security-related operations or algorithms in response to the internally confined device-specific security data. In this way, secure implementation and utilization device-specific security data for security purposes can be effectively accomplished. The security is uncompromised since the stored secret is never available outside the electronic circuit, and the device-specific security data is internally confined within the circuit during usage or operation of the device.

A low cost microelectronic circuit package includes a single build up metallization layer above a microelectronic die. At least one die is fixed within a package core using, for example, an encapsulation material. A single metallization layer is then built up over the die/core assembly. The metallization layer includes a number of landing pads having a pitch that allows the microelectronic device to be directly mounted to an external circuit board. In one embodiment, the metallization layer includes a number of signal landing pads within a peripheral region of the layer and at least one power landing pad and one ground landing pad toward a central region of the layer.

System-in packages, or multichip modules, are described which can include multi-layer chips in a multi-layer polymer structure, on-chip metal bumps on the multi-layer chips, intra-chip metal bumps in the multi-layer polymer structure, and patterned metal layers in the multi-layer polymer structure. The multi-layer chips in the multi-layer polymer structure can be connected to each other or to an external circuit through the on-chip metal bumps, the intra-chip metal bumps and the patterned metal layers. The system-in packages can be connected to external circuits through solder bumps, meal bumps or wirebonded wires.

An engine control circuit device which has higher heat resistance and can be installed in a place exposed to severe thermal environments. In an engine control circuit device comprising a circuit board on which a plurality of packaged electronic parts are mounted, and a connector mounted on the circuit board for connection to an external circuit, the device further comprises a resin portion formed of a thermo-setting resin and covering the connector except for a connecting portion thereof and the circuit board, and a cooling pipe integrally molded in the resin portion and allowing a coolant to flow through it, thereby cooling the resin portion.

To provide a configuration including a first sheet substrate, on which a first thin film electronic component is formed on at least one main face, and an external connection terminal for connecting to an external circuit is formed one main face or the other face; a second sheet substrate, on which a second thin film electronic component is formed on at least one face; an insulator connection resin layer for fixing the first sheet substrate and the second sheet substrate opposing the first thin film electronic component against the second thin film electronic component; and an interlayer connection conductor for electrically connecting electrode terminals, which have been set in advance, of the first thin film electronic component and the second thin film electronic component.

Multilayer capacitors incorporate both low inductance (ESL) and controlled Equivalent Series Resistance (ESR) features into a cost-effective unitary device. Internal electrode patterns generally include one or more pairs of mother electrodes adapted for external connection (e.g., to a circuit, another electrical component, circuit board, or other mounting environment), and multiple pairs of daughter electrodes adapted only for internal connection to other electrodes (e.g., other daughter electrodes and/or selected mother electrodes) without direct connection to an external circuit. Mother and daughter electrodes are interdigitated with electrode tab features, where daughter electrodes have internal-connection tabs, and mother electrodes have both internal-connection tabs and circuit-connection tabs, all of which are connected to respective internal-connection or circuit-connection terminals. ESR is increased by the parallel connection between mother and daughter electrodes as well as other optional features such as but not limited to resistive terminations, resistive connectors, serpentine terminations and increased current path lengths.