8 results about "Microelectronic circuits" patented technology

The application provides a manufacturing method of glass direct copper clad circuit, relates to the technical field of microelectronic circuit manufacturing, and comprises the following steps: S01, copper foil surface planarization: the copper foil is adhered to a UV photosensitive adhesive film, and the surface of the adhered copper foil is ground; after the surface of the copper foil is ground to reach a target roughness, the copper foil is cleaned and dried; S02, laminated static pressure: a glass substrate, the UV photosensitive adhesive film with the adhered copper foil and a carrier plate are sequentially laminated and fixed, vacuum is drawn and sealed, static pressure is applied to the formed sealed body, and a structure to be welded is obtained; and S03, laser selective welding: an ultrashort pulse laser and a short pulse are combined, and multiple compound scans are performed by using an energy gradient, so that the problem that an interface gap cannot be effectively reduced and the interface is easy to be ablated when a laser is used for welding to manufacture a glass copper clad circuit is solved, and the interface fusion capacity between the copper foil and the glass is improved.

This invention provides a solvent-free method for preparing nonlinear optical micro-crystal arrays. A substrate is placed on top of a silicon pillar template. A raw material tank is positioned on one side of the upper part of the silicon pillar template, and a through-hole is positioned on one side of the substrate, with the raw material tank and through-hole corresponding in position. Powdered organic small molecules are added to the raw material tank through the through-hole. The temperature is increased; when the temperature exceeds the melting point of the organic small molecules, a sandwich structure is formed consisting of the substrate, the melt of the organic small molecules, and the upper surface of the silicon pillar. Driven by capillary force, the melt flows along the top of the silicon pillar until it covers the entire surface of the silicon pillar template. The temperature is then decreased; when the temperature falls below the solidification point of the organic small molecules, it is further cooled to room temperature, opening the sandwich structure and obtaining a nonlinear optical micro-crystal array on the substrate. The processing precision of the micro-crystal array in this invention is controlled by the size of the silicon pillar, achieving a precision of 1 μm. This provides a new approach for the array-based preparation of nonlinear organic microcrystals and their application in nonlinear optics and microelectronic circuits.

The invention belongs to the technical field of hardware security and microelectronic circuits, and particularly discloses a concealable PUF (Physical Unclonable Function) device based on a memristor array and an operation method of the concealable PUF device. In the first aspect, the memristor array is completely kept in a high-resistance state as a hidden state, and part of units are activated in a short time under the challenge effect, so that a hidden / activatable working mode is realized, the static power consumption is effectively reduced, and the resistance to side channel detection and physical analysis is remarkably improved; on the second aspect, a memristor SET voltage threshold value is used as an entropy source, so that a selected unit generates different switching results in a probabilistic mode under a fixed write pulse, high-randomness response from device microstructure difference is formed, and unpredictability and modeling attack resistance are improved; and thirdly, a digital reading structure formed by the reference current source and the current comparator is introduced, so that stable and low-power-consumption logic response can be obtained without a complex analog circuit.

The invention relates to the field of flexible microelectronic circuits, and provides a temperature compensation type anti-crosstalk piezoresistive sensor array acquisition circuit and a control system. The acquisition circuit comprises a row driving circuit which is connected with a driving voltage and gates a specific row; the piezoresistive sensing array is used for performing temperature compensation on the output voltage of the row driving circuit; the resistive sensing unit detection circuit is used for keeping the output non-gating column line voltage at zero; the temperature compensation voltage adder is used for summing a temperature compensation voltage signal output by the piezoresistive sensing array and an output voltage signal of the resistive sensing unit detection circuit; the multipath selection circuit is respectively connected with the temperature compensation voltage adders and the voltage follower, and the multipath selection circuit is used for gating output voltage signals of the output temperature compensation voltage adders of a specific column and carrying out front and back stage isolation through the voltage follower; and the phase inverter is used for converting the output voltage signal of the voltage follower into positive voltage and outputting the positive voltage to the singlechip ADC acquisition module.

A microelectronic circuit package may include one or more operative channels, each of the one or more operative channels containing a reactive material, and a seal covering at least a portion of the one or more operative channels. At least one of the one or more operative channels has a maximum width of less than about 100 microns. The seal is non-reactive with the reactive material. Also disclosed are methods of manufacturing a microelectronic circuit package comprising at least one operative channel containing a reactive material.

The invention belongs to the field of flexible microelectronic circuits, and provides a temperature compensation type anti-crosstalk capacitive sensing array acquisition circuit and a control method, and the circuit comprises an excitation signal driving source and a signal detection module. The excitation signal driving source comprises a main control unit, and the main control unit generates row gating signals and column gating signals; the capacitive sensing array performs temperature compensation based on the row gating signal to obtain a temperature compensation voltage signal; the signal detection module obtains capacitance signals of capacitance sensing units in columns in the capacitance type sensing array and converts the capacitance signals into modulation capacitance voltage signals. The temperature signal modulation module converts the temperature compensation voltage signal of the corresponding column into a modulation temperature voltage signal according to the column gating signal of the main control unit; the modulation capacitor voltage signal and the modulation temperature voltage signal are combined into a multiplexing signal through an analog adder, the multiplexing signal is transmitted to an upper computer through a main control unit for demodulation, and a compensated pressure signal is obtained; accurate temperature compensation and signal crosstalk suppression can be realized.

This application discloses a movable package, a testing apparatus, and a testing method. The movable package includes: a movable package body comprising a first component and a second component for holding a substrate therebetween, the substrate carrying microelectronic circuitry and having a plurality of substrate terminals connected to the microelectronic circuitry; a plurality of movable package contacts on the second component, the movable package contacts mating with the substrate terminals to contact the substrate terminals; a fixing system; and a first electrical interface on the movable package body and connected to the movable package contacts, for connecting to a second electrical interface on the frame when the movable package body is removably held by a frame.

Methods, systems, and apparatus, including microelectronic circuits and processors are described for estimating energy consumption during a sampling window. The processor is divided into multiple processor cores, which are each sub-divided into processor units. The units can perform operations from a set of operations. Based on the number of times each unit has performed a particular operation during a sampling window, an estimate of the energy consumed by that unit for that sampling window is calculated. By summing the estimated energy consumption of many units on a core and many cores of the entire system, an energy consumption estimate is prepared for the sampling window. Other power parameters may be calculated from a sampling window duration and the energy consumption estimate. If a power parameter exceeds a threshold, action may be taken to alter operation of the microelectronic circuit.