108 results about "Crossbar array" patented technology

The present invention relates generally to sub-microelectronic circuitry, and more particularly to nanometer-scale articles, including nanoscale wires which can be selectively doped at various locations and at various levels. In some cases, the articles may be single crystals. The nanoscale wires can be doped, for example, differentially along their length, or radially, and either in terms of identity of dopant, concentration of dopant, or both. This may be used to provide both n-type and p-type conductivity in a single item, or in different items in close proximity to each other, such as in a crossbar array. The fabrication and growth of such articles is described, and the arrangement of such articles to fabricate electronic, optoelectronic, or spintronic devices and components. For example, semiconductor materials can be doped to form n-type and p-type semiconductor regions for making a variety of devices such as field effect transistors, bipolar transistors, complementary inverters, tunnel diodes, light emitting diodes, sensors, and the like.

A nano-scale flash memory comprises: (a) source and drain regions in a plurality of approximately parallel first wires, the first wires comprising a semiconductor material, the source and drain regions separated by a channel region; (b) gate electrodes in a plurality of approximately parallel second wires, the second wires comprising either a semiconductor material or a metal, the second wires crossing the first wires at a non-zero angle over the channel regions, to form an array of nanoscale transistors; and (c) a hot electron trap region at each intersection of the first wires with the second wires. Additionally, crossed-wire transistors are provided that can either form a configurable transistor or a switch memory bit that is capable of being set by application of a voltage. The crossed-wire transistors can be formed in a crossbar array.

Nanotube on gate FET structures and applications of such, including n2 crossbars requiring only 2n control lines. A non-volatile transistor device includes a source region and a drain region of a first semiconductor type of material and a channel region of a second semiconductor type of material disposed between the source and drain region. A gate structure is made of at least one of semiconductive or conductive material and is disposed over an insulator over the channel region. A control gate is made of at least one of semiconductive or conductive material. An electromechanically-deflectable nanotube switching element is in fixed contact with one of the gate structure and the control gate structure and is not in fixed contact with the other of the gate structure and the control gate structure. The device has a network of inherent capacitances, including an inherent capacitance of an undeflected nanotube switching element in relation to the gate structure. The network is such that the nanotube switching element is deflectable into contact with the other of the gate structure and the control gate structure in response to signals being applied to the control gate and one of the source region and drain region. Certain embodiments of the device have an area of about 4 F2. Other embodiments include a release line is positioned in spaced relation to the nanotube switching element, and having a horizontal orientation that is parallel to the orientation of the source and drain diffusions. Other embodiments provide an n2 crossbar array having n2 non-volatile transistor devices, but require only 2n control lines.

The present invention relates generally to sub-microelectronic circuitry, and more particularly to nanometer-scale articles, including nanoscale wires which can be selectively doped at various locations and at various levels. In some cases, the articles may be single crystals. The nanoscale wires can be doped, for example, differentially along their length, or radially, and either in terms of identity of dopant, concentration of dopant, or both. This may be used to provide both n-type and p-type conductivity in a single item, or in different items in close proximity to each other, such as in a crossbar array. The fabrication and growth of such articles is described, and the arrangement of such articles to fabricate electronic, optoelectronic, or spintronic devices and components. For example, semiconductor materials can be doped to form n-type and p-type semiconductor regions for making a variety of devices such as field effect transistors, bipolar transistors, complementary inverters, tunnel diodes, light emitting diodes, sensors, and the like.

Electrical devices comprised of nanoscopic wires are described, along with methods of their manufacture and use. The nanoscopic wires can be nanotubes, preferably single-walled carbon nanotubes. They can be arranged in crossbar arrays using chemically patterned surfaces for direction, via chemical vapor deposition. Chemical vapor deposition also can be used to form nanotubes in arrays in the presence of directing electric fields, optionally in combination with self-assembled monolayer patterns. Bistable devices are described.

A memory device has a crossbar array including a first array of first electrodes extending along a first direction. A second array of second electrodes extends along a second direction. A non-crystalline silicon structure provided between the first electrode and the second electrode at an intersection defined by the first array and the second array. The non-crystalline silicon structure has a first layer having a first defect density and a second layer having a second defect density different from the first defect density. Each intersection of the first array and the second array defines a two-terminal memory cell.

A signal processing system is taught to be formed by combining a crossbar array with programming circuitry and signal input circuitry so as to provide a linear transformation from a set of input signals to a set of output signals. Applications of such a system to waveform generation, signal filtering, communications, and pattern recognition are explained. In one embodiment the crossbar array of the signal processing system may be a molecular nanowire crossbar array in which the crossbar interconnects are addressed via dual arrays of scanning probe tips so as to provide an interface between the molecular crossbar electronics and conventional solid state electronics used in the programming and signal processing circuitry.

A method of encoding data stored in a crossbar memory array, such as a nanowire crossbar memory array, to enable significant increases in memory size, modifies data words to have equal numbers of ‘1’ bits and ‘0’ bits, and stores the modified words together with information enabling the original data to be retrieved upon being read out from memory.

A control circuit includes an operational amplifier having an inverting input, a non-inverting input, and an output, an array of impedance elements including capacitors are connected to the output of the operational amplifier, and a resistance switch crossbar array configured to store data in the form of high or low resistance states, wherein the resistance switch crossbar array is electrically connected between the array of impedance elements and the inverting input of the operational amplifier. The crossbar control circuit may be implemented in a control system to provide for adjustment of the control system to changes in environmental conditions or to change the function of the control system.

Method and apparatus for performing close-loop programming of resistive memory devices in crossbar array based hardware circuits and systems. Invention provides iterative training of memristor crossbar arrays for neural networks by applying voltages corresponding to selected training patterns. Error is detected and measured as a function of the actual response to the training patterns versus the expected response to the training pattern.

A signal processing system is taught to be formed by combining a crossbar array with programming circuitry and signal input circuitry so as to provide a linear transformation from a set of input signals to a set of output signals. Applications of such a system to waveform generation, signal filtering, communications, and pattern recognition are explained. In one embodiment the crossbar array of the signal processing system may be a molecular nanowire crossbar array in which the crossbar interconnects are addressed via dual arrays of scanning probe tips so as to provide an interface between the molecular crossbar electronics and conventional solid state electronics used in the programming and signal processing circuitry.

A memristor includes a first electrode of a nanoscale width; a second electrode of a nanoscale width; and an active region disposed between the first and second electrodes. The active region has a both a non-conducting portion and a source of dopants portion induced by electric field. The non-conducting portion comprises an electronically semiconducting or nominally insulating material and a weak ionic conductor switching material capable of carrying a species of dopants and transporting the dopants under an electric field. The non-conducting portion is in contact with the first electrode and the source of dopants portion is in contact with the second electrode. The second electrode comprises a metal reservoir for the dopants. A crossbar array comprising a plurality of the nanoscale switching devices is also provided. A process for making at least one nanoscale switching device is further provided.