A non-volatile
semiconductor memory includes: multiple write pipelines, each including a
memory array; a timing circuit which sequentially starts
programming operations in the pipelines; and a shared
charge pump and
voltage regulation circuit that drives a current through the memory cells being programmed. Staggering the starts of
programming operations reduces the current demand on the
charge pump because spikes that occur at the starts of
programming operations, for example, when using channel
hot electron injection, are distributed over time rather than occurring all at once.
Noise, which can reduce the accuracy of write operations, is also reduced because the
total current required from the
charge pump is more nearly constant. As further aspect of the invention, each write pipeline can perform a write operation as alternating programming cycles and verify cycles. During a programming cycle, the shared charge pump drives a current through a selected
memory cell to change the
threshold voltage of the selected
memory cell. During a verify cycle, the write circuit determines whether the selected
memory cell has reached its target
threshold voltage level. The write pipelines can be partitioned into two banks where pipelines in one
bank perform programming cycles while pipelines in the other
bank perform verify cycles. More generally the write pipelines are partitioned into multiple banks where each
bank starts programming cycles at times that differ from the starts of programming cycles in the other banks.