Nonvolatile semiconductor memory device and method for operating the same

Abstract

A nonvolatile semiconductor memory device having MONOS type memory cells of increased efficiency by hot electron injection and improved scaling characteristics includes a channel forming region in the vicinity of a surface of a substrate, first and second impurity regions, acting as a source and a drain in operation, formed in the vicinity of the surface of the substrate sandwiching the channel forming region between them, a gate insulating film stacked on the channel forming region and having a plurality of films, and a charge storing means that is formed in the gate insulating film dispersed in the plane facing the channel forming region. A bottom insulating film includes a dielectric film that exhibits a FN type electroconductivity and makes the energy barrier between the bottom insulating film and the substrate lower than that between silicon dioxide and silicon.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates to a nonvolatile semiconductor memory device which has a planarly dispersed charge storing means (for example, in a MONOS type or a MNOS type, charge traps in a nitride film, charge traps near the interface between a top insulating film and the nitride film, small particle conductors, etc.) in a gate insulating film between a channel forming region and a gate electrode in a memory transistor and is operated to electrically inject primarily channel hot electrons, ballistic hot electrons, secondarily generated hot electrons, substrate hot electrons, and hot electrons caused by band-to-band tunneling current into the charge storing means to store the same therein and to extract the same therefrom and a method for operating the device.[0003]2. Description of the Related Art[0004]Nonvolatile semiconductor memories offer promise as large capacity, small size data-storage media. Along with the rec...

AI Technical Summary

Benefits of technology

[0016]An object of the present invention is to provide a nonvolatile semiconductor memory device, wherein the punch-through is well suppressed, which occurs when performing scaling of gate length at high write speeds achieved by injecting hot electrons into a charge storing means such as planarly dispersed carrier traps, and scaling of gate length and thickness of the gate insulating film is good, and a method of operating the device.

[0022]Note that, comparing with an insulating film exhibiting an FP tunneling electroconductivity, one characteristic of an insulating film exhibiting an FN tunneling electroconductivity is that the amount of carrier traps in the insulating material is largely reduced.

[0044]In the present nonvolatile semiconductor memory device and the method for operating the same, in a write operation, channel hot electrons, ballistic hot electrons, secondarily generated hot electrons, substrate hot electrons, or hot electrons caused by band-to-band tunneling current are injected into the charge storing means from the first and second impurity regions that serve as a source and a drain, or from the entire area of the channel. At this time, hot electrons surmount the energy barrier between the substrate comprised of a silicon wafer and the bottom insulting film at the bottom of the tunneling insulating film, and are injected. In the present invention, the energy barrier between the substrate and the bottom insulting film is lower than that between silicon dioxide and silicon. In addition, as the material of the bottom insulating film, especially the material of the dielectric film that makes the energy barrier of the bottom insulating film lower, for example, use may be made of materials exhibiting a Fowler-Nordheim (FN) type tunneling electroconductivity, such as nitride films of low traps. As a result, the energy barrier between the substrate and the bottom insulting film that hot electrons should surmount in reduced from the energy barrier of 3.2V between silicon and silicon dioxide, that is, the conventional dielectric material to, for example, 2.1V. Due to low energy barrier of the bottom insulating film, efficiency of charge injection is improved, and in turn the write drain voltage can be reduced to 3.3V or below. Although a buffer oxide film is placed between the channel forming region and the bottom insulating film, since this film is very thin, its influence on the energy barrier is negligible.

[0045]In addition, reduction of the write drain voltage may lead to the reduction of the average energy of hot electrons injected into the charge storing means, as a result, the damage to the bottom insulating film can be suppressed.

[0049]By either of the tunneling effects, it is possible to erase a block at once.

Problems solved by technology

When a leakage current path in locally generated in the tunneling insulating film, in an FG type, a large amount of charge easily leaks out through the leakage path and the charge retention characteristic declines.

As a result, in a MONOS type, the disadvantage of the degradation of the charge retention characteristic due to the reduction in thickness of the tunnel insulating film is not so serious as in an FG type.

When the tunneling insulating film is formed relatively thick, the write speed is in the range of 0.1 to 10 ms, which is still not sufficient.

A high speed is possible if the write speed alone is considered, but sufficiently high reliability and low voltages cannot be achieved.

In this source-side injection type MONOS transistor, in addition to the high operation voltages of 12V for write operations and 14V for erasure operations, the read disturbance, data rewrite, and other facets of reliability are not sufficient.

However, in a conventional CHE injection type MONOS type nonvolatile semiconductor memory, since Electrons are accelerated in the channel to produce high energy electrons (hot electrons), it is necessary to apply a voltage of about 4.5V between the source and drain, and it in difficult to decrease this source-drain voltage.

As a result, in a write operation, the punch-through effect becomes a restriction and good scaling of the gate length is difficult.

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