52015 results about "Impurity" patented technology

In a thin film transistor (1), a gate insulating layer (4) is formed on a gate electrode (3) formed on an insulating substrate (2). Formed on the gate insulating layer (4) is a semiconductor layer (5). Formed on the semiconductor layer (5) are a source electrode (6) and a drain electrode (7). A protective layer (8) covers them, so that the semiconductor layer (5) is blocked from an atmosphere. The semiconductor layer (5) (active layer) is made of, e.g., a semiconductor containing polycrystalline ZnO to which, e.g., a group V element is added. The protective layer (8) thus formed causes decrease of a surface level of the semiconductor layer (5). This eliminates a depletion layer spreading therewithin. Accordingly, the ZnO becomes an n-type semiconductor indicating an intrinsic resistance, with the result that too many free electrons are generated. However, the added element works on the ZnO as an accepter impurity, so that the free electrons are reduced. This decreases a gate voltage required for removal of the free electrons, so that the threshold voltage of the thin film transistor (1) becomes on the order of 0V. This allows practical use of a semiconductor device which has an active layer made of zinc oxide and which includes an protective layer for blocking the active layer from an atmosphere.

A thin film transistor (TFT), a method of manufacturing the TFT, and a flat panel display comprising the TFT are provided. The TFT includes a gate, a gate insulating layer that contacts the gate, a channel layer that contacts the gate insulating layer and faces the gate with the gate insulating layer therebetween, a source that contacts an end of the channel layer; and a drain that contacts an other end of the channel layer, wherein the channel layer is an amorphous oxide semiconductor layer, and each of the source and the drain is a conductive oxide layer comprising an oxide semiconductor layer having a conductive impurity in the oxide semiconductor layer. A low resistance metal layer can further be included on the source and drain. A driving circuit of a unit pixel of a flat panel display includes the TFT.

Disclosed is a thin film transistor including a P-type semiconductor layer, and an organic light-emitting display device having the thin film transistor. The present invention provides a thin film transistor including a substrate, a semiconductor layer, and a gate electrode and a source/drain electrode formed on the substrate, wherein the semiconductor layer is composed of P-type ZnO:N layers through a reaction of a mono-nitrogen gas with a zinc precursor, and the ZnO:N layer includes an un-reacted impurity element at a content of 3 at % or less.

Thin films are formed by formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of impurity sources are introduced during the cyclical process. A graded gate dielectric is thereby provided, even for extremely thin layers. The gate dielectric as thin as 2 nm can be varied from pure silicon oxide to oxynitride to silicon nitride. Similarly, the gate dielectric can be varied from aluminum oxide to mixtures of aluminum oxide and a higher dielectric material (e.g., ZrO₂) to pure high k material and back to aluminum oxide. In another embodiment, metal nitride (e.g., WN) is first formed as a barrier for lining dual damascene trenches and vias. During the alternating deposition process, copper can be introduced, e.g., in separate pulses, and the copper source pulses can gradually increase in frequency, forming a transition region, until pure copper is formed at the upper surface. Advantageously, graded compositions in these and a variety of other contexts help to avoid such problems as etch rate control, electromigration and non-ohmic electrical contact that can occur at sharp material interfaces. In some embodiments additional seed layers or additional transition layers are provided.

A high k dielectric film and methods for forming the same are disclosed. The high k material includes two peaks of impurity concentration, particularly nitrogen, such as at a lower interface and upper interface, making the layer particularly suitable for transistor gate dielectric applications. The methods of formation include low temperature processes, particularly CVD using a remote plasma generator and atomic layer deposition using selective incorporation of nitrogen in the cyclic process. Advantageously, nitrogen levels are tailored during the deposition process and temperatures are low enough to avoid interdiffusion and allow maintenance of the desired impurity profile.

A chamber material made of Al alloy excellent in thermal cracking resistance and chemical and/or physical corrosion resistance and capable of reducing contamination excellently and further having excellent and wide applicable brazing property in a high temperature corrosive circumstance, in which the substrate aluminum material for the chamber material made of Al alloy having an anodized film comprises 0.1 to 2.0% Si, 0.1 to 3.5% Mg, 0.02 to 4.0% Cu on the mass % basis and the balance of Al and impurity element with Cr in the impurity elements being less than 0.04%. Preferably, Fe is 0.1% or less and Mn is 0.04% or less in the impurity element and, further, the total sum of impurity elements other than Cr and Mn being restricted to 0.1$ or less. This invention can be utilized suitably to various materials used in high temperature corrosive circumstance, particularly, in high temperature corrosive gas or plasma atmosphere.

Provided are a semiconductor layer manufacturing method and a semiconductor manufacturing apparatus capable of forming a high quality semiconductor layer even by a single chamber system, with a shortened process time required for reducing a concentration of impurities that exist in a reaction chamber before forming the semiconductor layer. A semiconductor device manufactured using such a method and apparatus is also provided. The present invention relates to a semiconductor layer manufacturing method of forming a semiconductor layer inside a reaction chamber (101) capable of being hermetically sealed, including an impurities removing step of removing impurities inside the reaction chamber (101) using a replacement gas, and a semiconductor layer forming step of forming the semiconductor layer, the impurities removing step being a step in which a cycle composed of a replacement gas introducing step of introducing the replacement gas into the reaction chamber (101) and an exhausting step of exhausting the replacement gas is repeated a plurality of times, the impurities removing step being performed at least before the semiconductor layer forming step.

There is disclosed a silicon focus ring consisting of silicon single crystal used as a silicon focus ring in a plasma apparatus, wherein concentration of interstitial oxygen contained in the silicon focus ring is not less than 5x10<17 >atoms/cm<3 >and not more than 1.5x10<18 >atoms/cm<3>, and a producing method for a silicon focus ring used for a plasma apparatus, wherein a single crystal silicon wherein concentration of interstitial oxygen contained in the silicon focus ring is not less than 5x10<17 >atoms/cm<3 >and not more than 1.5x10<18 >atoms/cm<3 >is grown by a Czochralski method, the single crystal silicon is processed in a circle, and a silicon focus ring is produced. There can be provided a silicon focus ring, which can prevent disadvantage due to impurities such as heavy metal.

A method of fabricating a landing plug in a semiconductor memory device, which in one embodiment includes forming a landing plug contact hole on a semiconductor substrate having an impurity region to expose the impurity region; forming a landing plug by filling the landing plug contact hole with a polysilicon layer, wherein the landing plug is divided into a first region, a second region, a third region, and a fourth region from a lower portion of the landing plug, and the first region is doped with a first doping concentration that is relatively lowest, the second region is doped with a second doping concentration that is higher than the first doping concentration, the third region is doped with a third doping concentration that is higher than the second doping concentration and the fourth region is not doped; and annealing the resulting product formed with the landing plug.

A continuous renal replacement therapy device adapted to be worn on a portion of the body of a patient, including: a plurality of contoured dialyzers, which are connected in series and utilize dialysate to remove impurities from the blood of the patient; and a plurality of contoured sorbent device, which are connected in series and are for regenerating the spent dialysate.

Disclosed is a semiconductor light-emitting element, comprising an n-type-cladding layer; a light guide layer positioned on the n-type cladding layer; a multiple quantum well structure active layer positioned on the light guide layer; a p-type carrier overflow prevention layer positioned on the active layer and having an impurity concentration of 5×10¹⁸ cm⁻³ to not more than 3×10¹⁹ cm⁻³; a p-type light guide layer positioned on the p-type carrier overflow prevention layer and-having an impurity concentration of 1×10¹⁸ cm⁻³ or more and less-than that of the p-type carrier overflow prevention layer; and a p-type cladding layer positioned on the p-type light guide layer and having a band gap narrower than the p-type carrier overflow prevention layer, and a method of manufacturing the same.

The present invention provides an apparatus for manufacturing a semiconductor thin film that is capable of manufacturing an even thin film with substantially no adhesion of impurities, and is capable of improving in-plane evenness of a grown thin film. The invention is an apparatus for manufacturing a semiconductor thin film includes a reaction tube 12, a susceptor 20 disposed in the reaction tube 12, and a negative pressure generator, the negative pressure generator applying a negative pressure to a substrate 22A placed on the susceptor 20 to hold the substrate, and the substrate 22A is placed so that an angle of a normal line to a crystal growth face of the substrate 22A to a vertical downward direction is less than 180°.

The invention discloses a high strength casting aluminum alloy material. The alloy comprises the following compositions in weight percent: 2.0 to 6.0 percent of Cu, 0.05 to 1.0 percent of Mn, 0.01 to 0.5 percent of Ti, 0.01 to 0.2 percent of Cr, 0.01 to 0.4 percent of Cd, 0.01 to 0.25 percent of Zr, 0.005 to 0.04 percent of B, 0.05 to 0.3 percent of Pr, the balance being Al and trace impurity elements. The invention adopts the advanced alloy composition design and the micro alloying design. Based on taking Al-Cu-Mn as main compositions, the material finds reasonable micro alloy elements (Ti, Cr, B, Zr and rare earth, etc.), determines the ranges of compositions of the micro alloy elements, is capable of realizing the function of replacing precious and rare metals such as Ag and V, etc., and lowers the formula cost by 5 to 10 percent.

A method of forming a carbon nano-material layer may involve a cyclic deposition technique. In the method, a chemisorption layer or a chemical vapor deposition layer may be formed on a substrate. Impurities may be removed from the chemisorption layer or the chemical vapor deposition layer to form a carbon atoms layer on the substrate. More than one carbon atoms layer may be formed by repeating the method.

A member used within a plasma processing apparatus and exposed to a plasma of a halogen gas such as BCl₃ or Cl₂ is formed from a sintered body of metals of Group IIIa of Periodic Table such as Y, La, Ce, Nd and Dy, and Al and/or Si, for example, 3Y₂O₃.5Al₂O₃, 2Y₂O₃.Al₂O₃, Y₂O₃.Al₂O₃ or disilicate or monosilicate, and in particular, in this sintered body, the content of impurity metals of Group IIa of Periodic Table contained in the sintered body is controlled to be 0.15 wt % or more in total. Specifically, for this member, an yttrium-aluminum-garnet sintered body having a porosity of 3% or less and also having a surface roughness of 1 μm or less in center line average roughness Ra is utilized.

The semiconductor fabrication apparatus of this invention includes an exposure section provided within a chamber for exposing a design pattern on a resist film applied on a wafer, and a liquid recycle section for supplying, onto the wafer, a liquid for use in immersion lithography for increasing the numerical aperture of exposing light during exposure while recycling the liquid. The liquid recycle section includes a liquid supply part for supplying the liquid onto the resist film of the wafer, a liquid discharge part for discharging and recovering the liquid from above the wafer, and an impurity removal part for containing the liquid and removing an impurity included in the liquid.

A semiconductor device using a TFT including a multilayered gate electrode and an LDD region partially overlapping with the multilayered gate electrode via a gate insulating film is provided.

In a semiconductor device, typically an active matrix display device, the structure of TFTs arranged in the respective circuits are made suitable in accordance with the function of the circuit, and along with improving the operating characteristics and the reliability of the semiconductor device, the manufacturing cost is reduced and the yield is increased by reducing the number of process steps. A semiconductor device has a semiconductor layer, an insulating film formed contacting the semiconductor layer, and a gate electrode having a tapered portion on the insulating film, in the semiconductor device, the semiconductor layer has a channel forming region, a first impurity region for forming a source region or a drain region and containing a single conductivity type impurity element, and a second impurity region for forming an LDD region contacting the channel forming region, a portion of the second impurity region is formed overlapping a gate electrode, and the concentration of the single conductivity type impurity element contained in the second impurity region becomes larger with distance from the channel forming region.

Disclosed is a process that relates to the recovery of a metal catalyst from an oxidizer purge stream produced in the synthesis of carboxylic acid, typically terephthalic acid. The process involves the addition of a wash solution to a high temperature molten dispersion to recover the metal catalyst and then subjecting an aqueous mixture or purified aqueous mixture so formed to a single stage extraction to remove organic impurities to produce an extract stream and a raffinate stream comprising the metal catalyst.

A substrate-fluorescent LED having a fluorescent-impurity doped substrate and an epitaxial emission structure including an active layer and being made on the substrate. The epitaxial emission structure emits blue or green light corresponding to the band gap of the active layer. The substrate absorbs a part of the blue or green light and makes fluorescence of a longer wavelength. Neutral color light or white light is emitted from the LED. The fluorescent substrate is n-AlGaAs(Si dope), GaP(Zn+O dope), ZnSe(Cu+I, Ag+I, Al+I dope), GaN(O.C.Va(N) dope) or so.

According to present invention, system on panel without complicating the process of TFT can be realized, and a light-emitting device that can be formed by lower cost than that of the conventional light-emitting device can be provided. A light-emitting device is provided in which a pixel portion is provided with a pixel including a light-emitting element and a TFT for controlling supply of current to the light-emitting element; a TFT included in a drive circuit and a TFT for controlling supply of current to the light-emitting element include a gate electrode, a gate insulating film formed over the gate electrode, a first semiconductor film, which overlaps with the gate electrode via the gate insulating film, a pair of second semiconductor films formed over the first semiconductor film; the pair of second semiconductor films are doped with an impurity to have one conductivity type; and the first semiconductor film is formed by semiamorphous semiconductor.

An example embodiment of a strained channel transistor structure comprises the following: a strained channel region comprising a first semiconductor material with a first natural lattice constant; a gate dielectric layer overlying the strained channel region; a gate electrode overlying the gate dielectric layer; and a source region and drain region oppositely adjacent to the strained channel region, one or both of the source region and drain region are comprised of a stressor region comprised of a second semiconductor material with a second natural lattice constant different from the first natural lattice constant; the stressor region has a graded concentration of a dopant impurity and/or of a stress inducing molecule. Another example embodiment is a process to form the graded impurity or stress inducing molecule stressor embedded S/D region, whereby the location/profile of the S/D stressor is not defined by the recess depth/profile.

The oxide semiconductor film has the top and bottom surface portions each provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film. An insulating film containing a different constituent from the metal oxide film and the oxide semiconductor film is further formed in contact with a surface of the metal oxide film, which is opposite to the surface in contact with the oxide semiconductor film The oxide semiconductor film used for the active layer of the transistor is an oxide semiconductor film highly purified to be electrically i-type (intrinsic) by removing impurities such as hydrogen, moisture, a hydroxyl group, and hydride from the oxide semiconductor and supplying oxygen which is a major constituent of the oxide semiconductor and is simultaneously reduced in a step of removing impurities.

The invention refers to a method and system for purifying the hydraulic pressure oil in hydraulic pressure machine. The method includes magnetism absorbing step which absorbs the metal particles in the hydraulic oil through magnetism structure onto the magnetism structure and a filter step blocking the impurities in the sift filter core, and finishes the first grade filter, and the second filter step with a sorption filter; the system includes: forward oil boxes connected in series, oil heater, magnetism filter, oil pump, sorption filter, backwards oil boxes and electric control system. Each device is connected through oil pipes and valves, all of which are set in a mobile machine box, moves the box, the purification to hydraulic pressure oil of different locations can be carried on conveniently.

A method is described for a plasma treatment of a TiCl₄ based CVD deposited TiN layer that reduces stress, lowers resistivity, and improves film stability. Resistivity is stable in an air ambient for up to 48 hours after the plasma treatment. A TiN layer is treated with a N-containing plasma that includes N₂, NH₃, or N₂H₄ at a temperature between 500° C. and 700° C. Optionally, H₂ may be added to N₂ in the plasma step which removes chloride impurities and densifies the TiN layer. The TiN layer may serve as a barrier layer, an ARC layer, or as a bottom electrode in a MIM capacitor. An improved resistance of the treated TiN layer to oxidation during formation of an oxide based insulator layer and a lower leakage current in the MIM capacitor is also achieved.

The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. Furthermore, the first transistor provided in the driver circuit portion may include the oxide semiconductor film in which a first film and a second film are stacked, and the second transistor provided in the pixel portion may include the oxide semiconductor film which differs from the first film in the atomic ratio of metal elements.

A method for forming a dielectric film containing a Si—O bond a trench formed in an upper surface of a substrate, includes: designing a topology of a final dielectric film containing a Si—O bond formed in the trench by preselecting a target portion to be selectively removed relative to a non-target portion of an initial dielectric film resulting in the final dielectric film; conformally depositing the initial dielectric film on the upper surface and in the trench; and relatively increasing an amount of impurities contained in the target portion of the initial dielectric film relative to an amount of impurities contained in the non-target portion of the initial dielectric film to obtain a treated dielectric film, thereby giving the target portion and the non-target portion different chemical resistance properties when subjected to etching.

The semiconductor device comprises a well 58 formed in a semiconductor substrate 10 and having a channel region; a gate electrode 34n formed over the channel region with an insulating film 32 interposed therebetween; source/drain regions 60 formed in the well 58 on both sides of the gate electrode 34n, sandwiching the channel region; and a pocket region 40 formed between the source/drain region and the channel region. The well 58 has a first peak of an impurity concentration at a depth deeper than the pocket region 40 and shallower than the bottom of the source/drain regions 60, and a second peak of the impurity concentration at a depth near the bottom of the source/drain regions 60.

A sorbent-based gas storage and dispensing system, including a storage and dispensing vessel containing a solid-phase physical sorbent medium having a sorbate gas physically adsorbed thereon. A chemisorbent material is provided in the vessel to chemisorb the impurities for gas phase removal thereof in the storage and dispensing vessel. Desorbed sorbate gas is discharged from the storage and dispensing vessel by a dispensing assembly coupled to the vessel. The chemisorbent may be provided in a capsule including an impurity-permeable, but sorbate gas-impermeable membrane, and installed in the vessel at the time of sorbent material loading. Semiconductor manufacturing processes and products manufactured by such processes are described.

Each of MIS transistors of a semiconductor memory device has a semiconductor layer (12); a source region (15) formed in the semiconductor layer; a drain region (14) formed apart from the source region in the semiconductor layer, the semiconductor layer between the source region and the drain region serving as a channel body in a floating state; a first gate (13) which forms a channel in the channel body; a second gate (20) formed so as to control a potential of the channel body by a capacitive coupling; and a high concentration region (21) formed in the channel body on the second gate side, impurity concentration of the high concentration region being higher than that of the channel body.