1453results about "Capacitors" patented technology

The invention provides a thermal runaway prevention and heat dissipation optimization method and system based on a capacitor module, and relates to the technical field of capacitor module thermal management, and the method comprises the steps: extracting the multi-source operation data features of a single capacitor through an improved layered visual attention network, carrying out the data complementation through combining a bidirectional probability diffusion model, and obtaining a multi-source operation data feature of the single capacitor; and discovering a causal relationship between network identification data by using a causal structure, generating a performance analysis report, constructing a spatio-temporal dynamic graph neural network to predict temperature field distribution, performing fault diagnosis and uncertainty quantification in combination with a multi-task learning framework, further constructing a layered early warning mechanism, and performing early warning based on a layered reinforcement learning framework. And a dynamic prediction map and a performance analysis report are combined, a heat dissipation strategy is optimized, cooperative control of the heat dissipation units is realized, an optimal heat dissipation scheme is finally obtained, thermal runaway is effectively prevented, and the safety and reliability of the capacitor module are improved.

A method for fetching a content from a web server to a client device is disclosed, using tunnel devices serving as intermediate devices. The tunnel device is selected based on an attribute, such as IP Geolocation. A tunnel bank server stores a list of available tunnels that may be used, associated with values of various attribute types. The tunnel devices initiate communication with the tunnel bank server, and stays connected to it, for allowing a communication session initiated by the tunnel bank server. Upon receiving a request from a client to a content and for specific attribute types and values, a tunnel is selected by the tunnel bank server, and is used as a tunnel for retrieving the required content from the web server, using standard protocol such as SOCKS, WebSocket or HTTP Proxy. The client only communicates with a super proxy server that manages the content fetching scheme.

A method for fetching a content from a web server to a client device is disclosed, using tunnel devices serving as intermediate devices. The tunnel device is selected based on an attribute, such as IP Geolocation. A tunnel bank server stores a list of available tunnels that may be used, associated with values of various attribute types. The tunnel devices initiate communication with the tunnel bank server, and stays connected to it, for allowing a communication session initiated by the tunnel bank server. Upon receiving a request from a client to a content and for specific attribute types and values, a tunnel is selected by the tunnel bank server, and is used as a tunnel for retrieving the required content from the web server, using standard protocol such as SOCKS, WebSocket or HTTP Proxy. The client only communicates with a super proxy server that manages the content fetching scheme.

Disclosed herein are IC devices with fishbone capacitor structures. An example capacitor structure includes a first capacitor electrode, a second capacitor electrode, and a third capacitor electrode, wherein the first capacitor electrode is a first line with protrusions on a side of the first line, the second capacitor electrode is a second line with protrusions on a first side of the second line and protrusions on a second side of the second line, the third capacitor electrode is a third line with protrusions on a side of the third line, the protrusions on the side of the first line and the protrusions on the first side of the second line form a first interdigitated capacitor structure, and the protrusions on the side of the third line and the protrusions on the second side of the second line form a second interdigitated capacitor structure.

A semiconductor device including a metal insulator metal capacitor (MIM capacitor), a first via connected to and through a bottom plate of the MIM, and a middle plate of the MIM, where a middle isolated portion of the middle plate of the MIM surrounds the first via. A MIM capacitor, a first via connected to and through a bottom plate of the MIM, and a middle plate of the MIM, where a middle isolated portion of the middle plate of the MIM surrounds the first via, where the middle isolated portion is surrounded by a middle isolation dielectric on all vertical side surfaces. Forming a MIM capacitor, forming a first via connected to and through a bottom plate of the MIM, and forming a middle plate of the MIM, where a middle isolated portion of the middle plate of the MIM surrounds the first via.

The invention belongs to the technical field of capacitor protection, and particularly discloses an ultralow-temperature ox horn capacitor which comprises an aluminum capacitor shell, a base plate is fixed between the inner walls of the aluminum capacitor shell, a sealing plate is fixed to the position, close to the bottom edge, between the inner walls of the aluminum capacitor shell, and a bent pull-up edge is arranged on the outer surface of the aluminum capacitor shell. The bent pull-up edge is located between the base plate and the sealing plate, and a neutralizing device is arranged between the bottom of the base plate and the top of the sealing plate; according to the aluminum capacitor shell, the explosion-proof cavity and the bent pull-up edge are arranged in the aluminum capacitor shell, so that the volume of the explosion-proof cavity is increased by straightening the bent pull-up edge under the action of high-pressure gas when the high-pressure gas is generated in the aluminum capacitor shell, the high-pressure gas is buffered, and a circuit is cut off at the same time; and the driving assembly is triggered to position the capacitor, and meanwhile, the neutralizing device is triggered to neutralize the generated corrosive gas and then discharge the corrosive gas.

The present disclosure is directed to a method for forming metal insulator metal decoupling capacitors with scalable capacitance. The method can include forming a first redistribution layer with metal lines on a portion of a polymer layer, depositing a photoresist layer on the first redistribution layer, and etching the photoresist layer to form spaced apart first and second TIV openings in the photoresist layer, where the first TIV opening is wider than the second TIV opening. The method can further include depositing a metal in the first and second TIV openings to form respective first and second TIV structures in contact with the metal line, removing the photoresist layer, forming a high-k dielectric on a top surface of the first and second TIV structures, and depositing a metal layer on the high-k dielectric layer to form respective first and second capacitors.

A semiconductor package including at least one functional die; at least one dummy die free of active circuit, wherein the dummy die comprises at least one metal-insulator-metal (MIM) capacitor; and a redistribution layer (RDL) structure interconnecting the MIM capacitor to the at least one functional die.

Semiconductor devices, integrated circuits and methods of forming the same are provided. In one embodiment, a semiconductor device includes a metal-insulator-metal structure which includes a bottom conductor plate layer including a first opening and a second opening, a first dielectric layer over the bottom conductor plate layer, a middle conductor plate layer over the first dielectric layer and including a third opening, a first dummy plate disposed within the third opening, and a fourth opening, a second dielectric layer over the middle conductor plate layer, and a top conductor plate layer over the second dielectric layer and including a fifth opening, a second dummy plate disposed within the fifth opening, a sixth opening, and a third dummy plate disposed within the sixth opening. The first opening, the first dummy plate, and the second dummy plate are vertically aligned.

The invention relates to the technical field of electric automobile motor controllers, in particular to an integrated efficient heat dissipation electric control shell, a motor controller and an electric drive assembly. Comprising a shell, a filtering assembly, a capacitor and a main function module, the shell comprises a first cavity and a second cavity, a partition is arranged between the two cavities, a cooling water tank is formed in the partition, and the two ends of the cooling water tank are connected with a cooling water channel inlet and a cooling water channel outlet respectively; a high-voltage input interface is arranged on the outer wall of the second cavity of the shell in a penetrating mode and connected with an external power supply battery pack. The filtering assembly is located in the second cavity of the shell and connected with the high-voltage input interface. The capacitor is installed in the second cavity of the shell and connected with the filtering assembly. The main function module is installed in the first cavity of the shell. The invention can solve the problems of complex assembly process, high cost, low heat dissipation efficiency, large circuit parasitic inductance and the like in the prior art, and has great popularization value.

A method for fetching a content from a web server to a client device is disclosed, using tunnel devices serving as intermediate devices. The tunnel device is selected based on an attribute, such as IP Geolocation. A tunnel bank server stores a list of available tunnels that may be used, associated with values of various attribute types. The tunnel devices initiate communication with the tunnel bank server, and stays connected to it, for allowing a communication session initiated by the tunnel bank server. Upon receiving a request from a client to a content and for specific attribute types and values, a tunnel is selected by the tunnel bank server, and is used as a tunnel for retrieving the required content from the web server, using standard protocol such as SOCKS, WebSocket or HTTP Proxy. The client only communicates with a super proxy server that manages the content fetching scheme.

An apparatus and configuring scheme where a capacitive input circuit can be programmed to perform different logic functions by adjusting the switching threshold of the capacitive input circuit. Digital inputs are received by respective capacitors on first terminals of those capacitors. The second terminals of the capacitors are connected to a summing node. A pull-up and pull-down device are coupled to the summing node. The pull-up and pull-down devices are controlled separately. During a reset phase, the pull-up and / or pull-down devices are turned on or off in a sequence, and inputs to the capacitors are set to condition the voltage on node n1. As such, a threshold for the capacitive input circuit is set. After the reset phase, an evaluation phase follows. In the evaluation phase, the output of the capacitive input circuit is determined based on the inputs and the logic function configured during the reset phase.

A method of forming a semiconductor arrangement includes forming a first capacitor in a first voltage domain and forming a second capacitor in the first voltage domain. The first capacitor is connected in parallel with the second capacitor. A third capacitor and a fourth capacitor are formed in a second voltage domain. The third capacitor is connected in series with the fourth capacitor. The first capacitor and the second capacitor are connected in parallel with a supply terminal of the first voltage domain and a reference terminal of the first voltage domain. The fourth capacitor is connected to a supply terminal of the second voltage domain. The third capacitor is connected to a reference terminal of the second voltage domain.

According to one aspect of the present disclosure, a semiconductor device is provided. The semiconductor device may include a stack structure including conductor layers and dielectric layers stacked alternately along a first direction. The semiconductor device may include at least one semiconductor structure penetrating through the stack structure. The semiconductor structure may include a capacitor structure, a first transistor structure, and a second transistor structure extending in the stack structure along the first direction. The second transistor structure, the first transistor structure, and the capacitor structure in a same semiconductor structure may be arranged and connected sequentially along the first direction.

A semiconductor device includes a dielectric layer, a conductive layer formed over the dielectric layer, and a reduction sacrificial layer formed between the dielectric layer and the conductive layer, wherein the reduction sacrificial layer includes a first reduction sacrificial material having higher electronegativity than the dielectric layer, and a second reduction sacrificial material having higher electronegativity than the first reduction sacrificial material.

The embodiment of the invention relates to the technical field of energy storage, and provides an energy storage converter and an energy storage system thereof. The capacitor assembly and the inductor assembly are arranged on the two sides of the plate body assembly respectively; the two ends of the connecting assembly are electrically connected with the capacitor assembly and the inductor assembly respectively; and the heat dissipation assembly is provided with a heat dissipation air channel, and at least part of the capacitor assembly is located in the heat dissipation air channel, so that the problem of low working efficiency of an inductor and a capacitor in the energy storage converter in the prior art is at least favorably solved.

A snap fit bracket for a capacitor slideably couples the capacitor to an opening defined by a substrate. The snap fit bracket includes four sidewalls that form a perimeter. The perimeter defines an opening into which the capacitor is horizontally positioned. A first channel is provided on a first side of the snap fit bracket and a second channel is provided on a second side of the snap fit bracket. Each of the first channel and the second channel are slideably coupled to respective edges within the opening of the substrate. A snap fit fastener is included in one or both of the first channel and the second channel. A portion of the snap fit fastener is received into a notch that is provided within the opening of the substrate which secures the snap fit bracket to the substrate.

The utility model provides a capacitor sealing structure and a capacitor, and relates to the field of capacitors, and the capacitor sealing structure comprises a capacitor housing, a buffer layer, a cooling fin, a bolt seat and a sealing assembly. The radiating fins are arranged between the inner wall of the capacitor shell and the outer wall of the buffer layer, so that the radiating efficiency of the capacitor is improved, and the service life is prolonged; a buffer cavity is arranged in the buffer layer, so that the damping effect is further enhanced, and internal elements of the capacitor are protected from being damaged by impact. The sealing assembly comprises a sealing base, a connecting plate and a locking support, and the sealing performance and the structural stability are enhanced through a multi-layer structure. The sealing structure is convenient to mount and high in adaptability, the assembling and disassembling processes are simplified through the movable connection design, and the sealing structure is suitable for scenes needing frequent maintenance. And the capacitor core is connected with the shell through the sealing assembly, so that the capacitor has excellent heat dissipation performance, sealing performance and impact resistance, and the overall performance and reliability of the capacitor are improved.

A signal transmission device having a capacitor coupler includes: a semiconductor substrate; a first insulating film disposed above the semiconductor substrate; a lower electrode disposed above the semiconductor substrate across a portion of the first insulating film; an upper electrode disposed opposite the lower electrode across the first insulating film, forming a capacitor together with the lower electrode, and configured to be applied with a voltage higher than a voltage applied to the lower electrode; a second insulating film disposed above the first insulating film and covering at least a portion in an outer peripheral portion of the upper electrode that is in contact with the first insulating film; and a third insulating film disposed above the second insulating film and made of an insulating organic material. The second insulating film is made of a material having a higher insulation breakdown voltage than the third insulating film.

A semiconductor package includes a substrate, a semiconductor die, metal interconnects, the semiconductor die being mounted to the substrate via the metal interconnects, an inductor mounted to the substrate, a magnetic material encapsulating the semiconductor die, the inductor, and the metal interconnects, the magnetic material including metal particles suspended in a first insulation material, and a second insulation material covering the magnetic material, wherein the second insulation material is substantially free of metal particles.

The capacitor comprises a capacitor core module and a capacitor shell which are arranged inside and outside, the upper end of the capacitor shell is provided with an assembly port for assembling the capacitor core module, the upper end of the capacitor core module is electrically connected with a capacitor busbar, and a plurality of metal heat dissipation plates in surface contact with the capacitor busbar are arranged at the opening position of the assembly port in parallel. And an insulating layer is arranged on the surface, in contact with the capacitor busbar surface, of the metal heat dissipation plate. According to the utility model, the connecting end of the capacitor core module and the capacitor busbar is provided with the metal heat dissipation plate for heat dissipation of the heating area of the capacitor, so that heat accumulation at a certain position of the capacitor busbar end is prevented, and the heat dissipation effect of the capacitor can be effectively improved; and meanwhile, the metal heat dissipation plate and the capacitor busbar play an insulating role on the heat dissipation structure through the insulating layer, so that the safety of the capacitor is ensured, and the overall service life is prolonged.

A system for charging a battery is provided. The system including a battery, a sterile barrier for encasing the battery, a charging device including a charging bay, and a charging controller. The battery includes a battery controller. The charging bay includes a first antenna for establishing communication with a battery controller of the battery encased in the sterile barrier in response to the battery being within a proximity of the charging bay and a second antenna for providing charging power to the battery encased in the sterile barrier. The charging controller establishes communication with the battery controller while the second antenna is deactivated, activates the second antenna after the first antenna establishes communication with the battery controller, and provides charging power to the battery via the second antenna.

An OTP memory capacitor structure includes a semiconductor substrate, a bottom electrode, a capacitor insulating layer and a metal electrode stack structure. The bottom electrode is provided on the semiconductor substrate. The capacitor insulating layer is provided on the bottom electrode. The metal electrode stack structure includes a metal layer, an insulating sacrificial layer and a capping layer stacked in sequence. The metal layer is provided on the capacitor insulating layer and is used as a top electrode. The insulating sacrificial layer is provided between the metal layer and the capping layer. A manufacturing method of the OTP memory capacitor structure is also provided. By the provision of the insulating sacrificial layer, the bottom electrode formed first can be prevented from being damaged by subsequent etching and other processes, so that the OTP memory capacitor structure has better electrical characteristics.

A semiconductor package structure is provided. The semiconductor package structure includes an electronic component, and an inductance component. The protection layer encapsulates the electronic component and has a top surface and a bottom surface. The top surface and the bottom surface collectively define a space to accommodate the electronic component. The inductance component outflanks the space from the top surface and the bottom surface of the protection layer.

A power assembly apparatus includes a capacitor module, a power module and at least one heat sink. The capacitor includes interconnected direct current (DC) capacitor banks and a capacitor bus. The capacitor bus has a connection part. The power module has an input bus, an output bus, and three single-phase switching tube groups. Each single-phase switching tube group includes a plurality of switching modules. Each switching module is coupled to input tubes and output tubes. The input bus is connected to the connection part. The output bus is configured to output electrical energy. The heat sink has a mounting surface for mounting each of the single-phase switching tube groups for efficiently move away heat generated by the single-phase switching tube groups.

In a radio frequency module, a magnetic core included in an inductor is disposed inside a through hole of a core board. An axis of winding of a coil is perpendicular to a thickness direction defined for the core board. A magnetic core has a first side surface and a second side surface intersecting with the axis of winding of the coil. A first shield portion includes a first feedthrough ground via conductor provided for the core board. A second shield portion includes a second feedthrough ground via conductor provided for the core board. The first feedthrough ground via conductor and the second feedthrough ground via conductor are arranged to interpose the magnetic core between the first feedthrough ground via conductor and the second feedthrough ground via conductor in a direction aligned with the axis of winding of the coil.

The utility model relates to a combined heat dissipation type power compensation capacitor, which comprises a capacitor body, a cooling mechanism used for cooling the capacitor body is arranged on the outer side of the capacitor body, a heat dissipation mechanism used for cooling the cooling mechanism is arranged at the upper end of the cooling mechanism, and a heat conduction mechanism used for conducting heat is arranged on the outer side of the cooling mechanism. The two sides of the heat dissipation mechanism are each provided with an air draft mechanism used for driving air to flow, the air draft mechanisms drive fan blades to rotate through a motor, directional air flow is generated, flowing of air around the heat dissipation mechanism is accelerated, more heat is taken away, a low-temperature area is formed, and continuous heat dissipation is promoted; the working principle of the whole combined heat dissipation type power compensation capacitor is a high-efficiency heat transfer process from the capacitor body to the environment, and stable operation and long service life of the capacitor body are ensured through preliminary cooling of the cooling mechanism, heat conduction of the heat conduction mechanism, wide heat dissipation of the heat dissipation mechanism and forced air cooling of the air draft mechanism.

One aspect of the present disclosure pertains to a method. The method includes receiving a first circuit structure having semiconductor devices, an interconnect structure, first feedthrough vias, top metal lines, redistribution vias, and bond pads. The method includes dicing the first circuit structure to form a top die having a top semiconductor device. The method includes forming a stacked integrated circuit (IC) structure by bonding the top die to a second circuit structure, the second circuit structure having second semiconductor devices, a second interconnect structure, second redistribution vias, and second bond pads. The method includes forming IC top metal lines over the first feedthrough vias, forming an IC passivation layer over the IC top metal lines, forming metal-insulator-metal (MIM) capacitor structures in the IC passivation layer, and forming IC redistribution vias penetrating through the MIM capacitor structures and the IC passivation layer to land on the IC top metal lines.

A method for fetching a content from a web server to a client device is disclosed, using tunnel devices serving as intermediate devices. The tunnel device is selected based on an attribute, such as IP Geolocation. A tunnel bank server stores a list of available tunnels that may be used, associated with values of various attribute types. The tunnel devices initiate communication with the tunnel bank server, and stays connected to it, for allowing a communication session initiated by the tunnel bank server. Upon receiving a request from a client to a content and for specific attribute types and values, a tunnel is selected by the tunnel bank server, and is used as a tunnel for retrieving the required content from the web server, using standard protocol such as SOCKS, WebSocket or HTTP Proxy. The client only communicates with a super proxy server that manages the content fetching scheme.

The disclosed technology generally relates to ferroelectric materials and semiconductor devices, and more particularly to semiconductor memory devices incorporating doped polar materials. In one aspect, a semiconductor device comprises a capacitor which in turn comprises a polar layer comprising a base polar material doped with a dopant. The base polar material includes one or more metal elements and one or both of oxygen or nitrogen. The dopant comprises a metal element that is different from the one or more metal elements and is present at a concentration such that a ferroelectric switching voltage of the capacitor is different from that of the capacitor having the base polar material without being doped with the dopant by more than about 100 mV. The capacitor stack additionally comprises first and second crystalline conductive oxide electrodes on opposing sides of the polar layer. The capacitor stack further comprises first and second barrier metal layers on respective ones of the first and second crystalline conductive oxide electrodes on opposing sides of the polar layer.