25 results about "Silicon oxynitride" patented technology

A lens includes a lens portion, an anti-reflection (AR) coating layer disposed on a surface of the lens portion, and a water-repellent layer disposed on a surface of the AR coating layer. The water-repellent layer includes an inorganic layer having a plurality of pores and an organic layer at least partially disposed in the plurality of pores. The inorganic layer includes silicon oxynitride (SiOxNy).

This invention provides an end-face coupler and its formation method, comprising: a substrate; an isolation layer located on the surface of the substrate; a silicon oxynitride waveguide located on the surface of the isolation layer, the silicon oxynitride waveguide having a ring-shaped longitudinal section; a silicon nitride waveguide partially located within the ring-shaped silicon oxynitride waveguide, the silicon nitride waveguide being separated from the silicon oxynitride waveguide by a first dielectric layer, the silicon nitride waveguide within the ring-shaped silicon oxynitride waveguide having a tapered cross-section, and the width of the silicon nitride waveguide gradually increasing along the incident direction of light; and a second dielectric layer covering the ring-shaped silicon oxynitride waveguide. This forms a ring-shaped silicon oxynitride waveguide, with the silicon nitride waveguide located inside the ring, thus expanding the optical mode field of the end-face coupler and improving coupling efficiency. Furthermore, the tapered portion of the silicon nitride waveguide inside the ring-shaped silicon oxynitride waveguide allows the optical signal to gradually couple into the silicon nitride waveguide, preventing the optical signal from leaking into the first dielectric layer, thereby reducing light loss.

This utility model discloses an OLED substrate encapsulation assembly, comprising: a substrate, a display functional layer fixedly connected to the top of the substrate, and a cover plate snapped onto the top of the substrate; and a stabilizing assembly, the stabilizing assembly including a frame adhesive, the frame adhesive being fixedly connected to the outer sides of both sides of the display functional layer. This utility model improves the adhesion between the frame adhesive and the substrate by utilizing the strong adhesion between the silicon oxynitride layer and the frame adhesive material, thereby improving the encapsulation efficiency of the frame adhesive. Simultaneously, the combination of slots and blocks enhances stability during the assembly of the substrate and the cover plate, preventing detachment and cracking. The frame adhesive further enhances the stability of the overall device assembly process. Furthermore, the electroactive polymer layer can deform under the influence of an electric field. During encapsulation, by controlling the electric field applied to the electroactive polymer layer, the electroactive polymer layer can use mechanical pressure to expel residual gas from the encapsulation cavity between the display functional layer and the cover plate.

To provide a semiconductor device that can suppress the degradation of its characteristics. [Solution] The semiconductor device comprises a semiconductor substrate, a source region and a drain region arranged with a gap between them on the upper surface of the semiconductor substrate, a body region arranged between the source region and the drain region, a drift region arranged between the body region and the drain region, a gate insulating film provided on the body region, a gate electrode provided on the gate insulating film, an insulating film provided on the drift region, a silicon oxynitride film provided on the insulating film, and a silicon nitride film provided on the silicon oxynitride film.

A method for manufacturing a semiconductor device comprising the following steps: forming a first oxide semiconductor film (108) over a substrate (102); forming a gate insulating layer (110) comprising at least one silicon oxynitride film over the first oxide semiconductor film (108) using a plasma CVD apparatus; performing an oxygen plasma treatment using the plasma CVD apparatus after forming the gate insulating layer (110) to supply oxygen to the gate insulating layer (110), wherein no N2O or NO2 is used in the oxygen plasma treatment; and forming a gate electrode (112) on the gate insulating layer (110) after performing the plasma treatment.

The present application provides an LED chip based on an alumina-silica composite substrate and a fabrication method thereof. The LED chip comprises an alumina-silica composite PSS substrate, a composite buffer layer and an LED structural layer, wherein the composite buffer layer is epitaxially grown on the alumina-silica composite PSS substrate, and the LED structural layer is epitaxially grown on the composite buffer layer. The composite buffer layer comprises: an aluminium oxynitride / aluminium nitride layer and a silicon oxynitride layer, wherein the alumina in the alumina-silica composite PSS substrate is covered with the aluminium oxynitride / aluminium nitride layer, and the silica in the alumina-silica composite PSS substrate is covered with the aluminium oxynitride / aluminium nitride layer and the silicon oxynitride layer in a staggered manner.

The present disclosure relates to a shaped composite ceramic product specifically designed for armor applications. This product comprises a formulation of alpha silicon carbide, alumina, silicon nitride, and silicon oxynitride. The alpha silicon carbide is present in amounts ranging from 55 to 75 wt% and is characterized by two distinct mean grain sizes: 80 to 180 microns and 0.1 to 10 microns. Additionally, a manufacturing process for producing the shaped composite ceramic product is also provided. The in-situ formation of silicon nitride and silicon oxynitride during processing further enhances the mechanical properties of the final product, contributing to improved performance in protective applications.

The present application relates to a double pattern etching method and a manufacturing method of DRAM, and belongs to the technical field of semiconductor, which solves the problem of increasing manufacturing cost caused by implementing all etching processes in a process chamber in prior art. The method comprises: providing a semiconductor substrate in the process chamber; sequentially forming a first hard mask layer, a second hard mask layer, a bottom mask layer and a top mask layer above the semiconductor substrate; patterning the top mask layer through a photolithography process; depositing a sidewall material layer above the patterned top mask layer; etching the sidewall material layer and the top silicon oxynitride mask layer to expose the top surface of the spin-on carbon mask layer; and transferring the semiconductor substrate from the process chamber to a photoresist stripping chamber, and removing the spin-on carbon mask layer through a stripping process. The sidewall oxide and SiON etching processes are implemented in the process chamber, and the spin-on carbon etching process is implemented in the photoresist stripping chamber, so as to reduce the use time of the process chamber.

The application relates to a preparation method of a gate dielectric layer and a semiconductor structure, which comprises the following steps: providing a substrate; forming a first interval layer on the substrate; forming a silicon nitride layer on the side of the first interval layer away from the substrate; forming a second interval layer on the side of the silicon nitride layer away from the first interval layer; heating the silicon nitride layer to oxidize the silicon nitride layer and diffuse the nitrogen element in the silicon nitride layer in the thickness direction of the silicon nitride layer, so as to form a silicon oxynitride layer, wherein the concentration distribution of the nitrogen element in the silicon oxynitride layer is gradient distribution in the thickness direction of the silicon oxynitride layer; and removing at least the second interval layer, so that the first interval layer and at least part of the silicon oxynitride layer form the gate dielectric layer. According to the application, the concentration distribution of the nitrogen element in the gate dielectric layer is uniform, and the probability of the nitrogen element penetrating into the substrate is greatly reduced.

This disclosure relates to a lens. The lens includes a lens portion, an anti-reflective (AR) coating disposed on a surface of the lens portion, and a waterproof layer disposed on a surface of the AR coating. The waterproof layer includes an inorganic layer having multiple pores and an organic layer at least partially disposed within the multiple pores. The inorganic layer includes silicon oxynitride (SiO2). x N y ).

The use of selective deposition of silicon nitride can eliminate conventional patterning steps by allowing silicon nitride to be deposited only in selected and desired areas. Using a silicon iodide precursor alternately with a thermal nitrogen source in an ALD or pulsed CVD mode, silicon nitride can be deposited preferentially on a surface such as silicon nitride, silicon dioxide, germanium oxide, SiCO, SiOF, silicon carbide, silicon oxynitride, and low k substrates, while exhibiting very little deposition on exposed surfaces such as titanium nitride, tantalum nitride, aluminum nitride, hafnium oxide, zirconium oxide, aluminum oxide, titanium oxide, tantalum oxide, niobium oxide, lanthanum oxide, yttrium oxide, magnesium oxide, calcium oxide, and strontium oxide.

A memory device includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, anda memory opening fill structure located in the memory opening and including, from outside to inside, a silicon oxide blocking dielectric layer, a silicon oxynitride blocking dielectric layer, an inner dielectric metal oxide blocking dielectric layer, a memory material layer, a tunneling dielectric layer, and a vertical semiconductor channel.

The application relates to the technical field of solar cells, in particular to a front anti-reflection film of a PERC solar cell, a preparation method and the solar cell. The front anti-reflection film comprises a first silicon nitride layer, a first silicon oxynitride layer, a second silicon nitride layer and a second silicon oxynitride layer which are sequentially deposited on the front of the cell. The refractive indexes of the first silicon nitride layer, the first silicon oxynitride layer, the second silicon nitride layer and the second silicon oxynitride layer are sequentially reduced, the difference between the refractive indexes of two adjacent layers is not more than 0.22, the refractive index is 2.30-2.35, and the thicknesses of the first silicon oxynitride layer, the second silicon nitride layer and the second silicon oxynitride layer are all greater than the thickness of the first silicon nitride layer. In the application, the refractive indexes of the film layers are sequentially reduced from bottom to top, the difference between the refractive indexes of two adjacent layers is not more than 0.22, a laminated film with a refractive index gradient of different refractive indexes can be formed, light passes through different refractive index gradients from air to a silicon wafer, and therefore, solar light can be maximally absorbed.

This utility model relates to the field of solar cell technology, specifically disclosing a back-contact solar cell, a cell module, and a photovoltaic system. The back-contact solar cell includes: a silicon substrate having a first surface, a second surface, and a side surface, wherein the first surface and the second surface are disposed opposite to each other, and the side surface is connected to the first surface and the second surface respectively; an anti-reflection passivation composite layer including a first portion disposed on the first surface and a second portion extending from the edge of the first portion to the side surface; the anti-reflection passivation composite layer includes an ultrathin silicon oxide layer, an aluminum oxide layer, a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer sequentially disposed along a direction away from the silicon substrate, wherein the refractive index of the silicon nitride layer, the silicon oxynitride layer, and the silicon oxide layer decreases sequentially. This utility model can effectively solve the influence of defects on the side surface of the silicon substrate, reduce parasitic absorption at the edge of the cell, and effectively improve the anti-reflection and passivation effect of the anti-reflection passivation composite layer through the interaction of multiple material layers, and improve stress problems, thereby effectively improving the overall conversion efficiency of the cell and ensuring the long-term reliability of the cell.

A display device includes a light emitting element including a pixel electrode, a light emitting layer, and a common electrode. A capping layer is disposed on the common electrode. An auxiliary layer is disposed on the capping layer. A thin film encapsulation layer includes a first encapsulation layer, a second encapsulation layer, and a third encapsulation layer. The first encapsulation layer includes a first inorganic insulating layer including silicon nitride; a second inorganic insulating layer including silicon oxide; and a third inorganic insulating layer including silicon oxynitride. The auxiliary layer has a thickness of 200 Å to 1400 Å, the first inorganic insulating layer has a thickness of 400 Å to 3500 Å, the second inorganic insulating layer has a thickness of 200 Å to 2400 Å, and the third inorganic insulating layer has a thickness of 4000 Å or more.

An image sensor package may include an optically transmissive cover including a layer of silicon oxynitride thereon; an image sensor semiconductor die coupled to the optically transmissive cover through an adhesive; and at least one electrical connector included in the image sensor semiconductor die.

A color conversion substrate includes a base substrate, a color filter layer on the base substrate, a low refractive index layer on the color filter layer, a capping layer on the low refractive index layer, where the capping layer includes a first capping film including silicon oxynitride (SiOxNy) having a nitrogen content in a range of about 10 at % to about 35 at %, a bank on the capping layer, where an opening defining a plurality of pixels is defined in the bank, and a color conversion layer on the capping layer in the opening.

This invention provides a passivation process for the isolation region of a crystalline silicon solar cell based on atomic layer deposition (ALD), comprising the following steps: S1, pre-activating the silicon wafer surface with water in an ALD chamber; S2, depositing a first alumina layer with a thickness of d1 nm (3≤d1≤5) using a cycle where the water exposure time is longer than the trimethylaluminum exposure time; S3, depositing a second alumina layer with a thickness of d2 nm (4≤d2≤7) on the surface of the first alumina layer using a cycle where the trimethylaluminum exposure time is longer than the water exposure time; S4, performing hydroxylation modification on the surface of the second alumina layer to form a hydroxyl termination layer; S5, depositing a silicon nitride layer, a silicon oxynitride layer, or a silicon nitride and silicon oxynitride stack using PECVD. This invention achieves high-stability passivation of the isolation region of a crystalline silicon solar cell through pre-activation of the silicon wafer surface, combined with ALD layered alumina deposition, and further PECVD generation of a cover film, demonstrating synergistic layering functions from the interface to the film layer.

The embodiment of the present application relates to the photovoltaic field, and provides a back contact solar cell, a preparation method, equipment, a laminated cell and a module. The back contact solar cell comprises a substrate, the substrate has opposite first and second surfaces, the first surface comprises alternately arranged first and second regions; a first functional layer, a first passivation layer and a first electrode are located in the first region; a second functional layer, a second passivation layer and a second electrode are located in the second region; the first functional layer comprises silicon oxynitride containing a first doping element, the second functional layer comprises silicon oxynitride containing a second doping element, the silicon oxynitride is an amorphous-nanocrystalline dual-phase structure, and the first doping element is different from the second doping element. The solar cell provided by the embodiment of the present application can at least reduce the process complexity of the preparation of the back contact solar cell.

The utility model relates to the field of cell -phone glass cover plate discloses a wear -resisting high temperature -resistant cell -phone glass cover plate, including glass cover plate body, the button hole is passed in and is opened to glass cover plate body upper end right side, the camera hole is passed in and is opened to glass cover plate body upper end left side, glass cover plate body left side edge is equipped with the earphone hole, glass cover plate body includes wear -resisting layer, buffer layer and glass substrate, wear -resisting layer surface is equipped with micro -groove, buffer layer sets up in wear -resisting layer lower extreme, glass substrate sets up in buffer layer lower extreme, glass substrate inside evenly dispersed has ceramic particle, glass substrate lower extreme is adhered with the inside screen through the back glue. In the utility model, through the multilayer structure of silicon nitride oxide wear -resisting layer, flexible high molecule buffer layer and high alumina silica glass substrate containing ceramic particle, promote cell -phone damage resistance and thermal stability, prolong the life, and enhance the extreme environment applicability.

The application provides a manufacturing method of an inner spacer of a ring gate transistor, comprising the following steps: forming a ring gate transistor structure, wherein the ring gate transistor structure comprises a substrate, a plurality of fin structures arranged along a first direction and a plurality of dummy gate stacks formed on the substrate; the plurality of dummy gate stacks cross each fin structure and are arranged along a second direction; the fin structure comprises a spacer stacked sacrificial layer and a channel layer; etching the fin structure between the dummy gate stacks to form a source-drain cavity; etching both ends of the sacrificial layer along the first direction to form an inner spacer cavity; depositing silicon oxide and silicon nitride in the inner spacer cavity; etching away the silicon oxide and the silicon nitride outside the inner spacer cavity to form an inner spacer in the inner spacer cavity, wherein the inner spacer is composed of silicon oxynitride. The application solves the problems that the material dielectric constant of the inner spacer of the ring gate transistor is relatively large and is not conducive to reducing the parasitic capacitance, and the etching process of the inner spacer has poor compatibility with other processes.

An optical structure, a semiconductor structure, and a method for forming the optical structure are disclosed. The optical structure is provided by the following steps: forming a silicon grating structure on a dielectric material layer; depositing at least one dielectric material layer on the silicon grating structure; and depositing a layer stack including a first dielectric etch stop layer and a second dielectric etch stop layer on the at least one dielectric material layer. The first and second dielectric etch stop layers include a dielectric material selected from silicon nitride and silicon oxynitride, and the second dielectric etch stop layer includes a dielectric material different from that of the first dielectric etch stop layer. A passivation dielectric layer may be formed on the layer stack, and a patterned etch mask layer may be formed on the passivation dielectric layer. An opening may be formed through an unmasked portion of the passivation dielectric layer by performing an anisotropic etching process, which etches a dielectric material selective to silicon nitride or silicon oxynitride by using the patterned etch mask layer as a mask structure. At least one etch mask layer minimizes over-etching.

A TSV structure includes a substrate. A through via penetrates the substrate. A copper layer fills the through via. A trench is embedded in the substrate and surrounds the copper layer, and a material layer fills the trench. The material layer includes W, Cr, Ir, Re, Zr, SiOC glass, hydrogen-containing silicon oxynitride, silicon oxide or spin-on glass.

This invention discloses a method for preparing silicon nitride and silicon oxynitride thin films by hot-wire assisted atomic layer deposition (ALD). A pretreated substrate is placed in a reaction chamber, and a SiH4 / H2 mixture and NH3 or NH3 / N2O mixture are alternately introduced according to the ALD sequence. Two independent hot wires are sequentially adjusted to achieve a surface temperature of 1600-2150°C for the silane-specific hot wire and 700-1200°C for the ammonia or nitrogen-oxygen mixture-specific hot wire. Silicon active groups, pyrolyzed by the high-temperature hot wire, are alternately deposited onto the substrate surface with nitrogen or nitrogen-oxygen active groups, and a reaction occurs. A moving carriage carrying the substrate reciprocates to obtain a highly dense monolayer thin film. By controlling the number and sequence of ALD cycles, a predetermined Si thickness can be obtained. x N y or SiO x N y and Si composite structure x N y / SiO x N y Thin films. This method significantly improves the overall passivation effect of the thin film surface and interface, has strong process adaptability, and produces stable film quality.

Silicon Photonics is a candidate technology for adding integrated optics functionality, either passive or active optical waveguides) to integrated circuits by leveraging the economies of scale of the CMOS microelectronics industry and using materials for the waveguide core such as silicon nitride (SiXNY) and silicon oxynitride (SiOXN1-X) for example. Microelectromechanical systems (MEMS) provide for movable platforms relative to the substrate allowing additional functionality to be added to a silicon circuit but also Silicon Photonics. Accordingly, by combining “fixed” waveguides formed upon the substrate with “movable” waveguides formed upon one or more movable platforms the inventors have established a series of Integrated Optics MEMS (IO-MEMS) based on Silicon Photonics. Such IO-MEMS include optical switches, optical attenuators, optical gates, optical switch matrices, configurable wavelength division multiplexer / demultiplexer devices, etc. exploiting both platforms and deformable beams.