2280 results about "Dopant" patented technology

The invention provides a high-stability lithium-rich manganese-based positive electrode material and a preparation method thereof, and relates to the technical field of lithium-rich manganese-based positive electrode materials, and the method comprises three steps of preparation of a homogeneous precursor, solid-state mechanical fusion doping and coating, and high-temperature sintering; a lithium-rich manganese-based precursor is prepared by adopting a homogeneous coprecipitation process, uniform distribution of metal ions is ensured, then an aluminum source, a zirconium source and a fluorine source are introduced as doping agents, phosphate and a titanate coating agent are combined, doping and coating integrated treatment is realized through mechanical ball milling, and the lithium-rich manganese-based composite material is obtained. And finally, mixing with a lithium source in an argon atmosphere, and carrying out high-temperature sintering of temperature programming and staged heat preservation to form a stable composite coating layer in situ. Therefore, manganese ion migration is effectively inhibited through lattice doping, a layered structure is prevented from being converted into spinel or rock salt phase, meanwhile, a nanoscale ion / electron transmission channel is constructed, interface impedance is reduced, and the charging and discharging efficiency under high voltage is improved.

Dipole engineering techniques for devices of stacked device structures are disclosed herein. An exemplary method for forming a gate stack of a transistor (e.g., a top transistor) of a transistor stack includes forming a high-k dielectric layer, forming a p-dipole dopant source layer over the high-k dielectric layer, performing a thermal drive-in process that drives a p-dipole dopant from the p-dipole dopant source layer into the high-k dielectric layer, and forming at least one electrically conductive gate layer over the high-k dielectric layer after removing the p-dipole dopant source layer. A drive-in temperature of the thermal drive-in process is less than 600° C. (e.g., about 300° C. to about 500° C.). The p-dipole dopant can be titanium. The method can further include tuning thermal drive-in process parameters to provide the gate dielectric with a p-dipole dopant profile having a peak located at a high-k / interfacial interface ±0.5 nm.

A kind of preparation method of high compaction lithium iron phosphate of multistage gradation, including step one: iron source, phosphorus source, lithium source, carbon source, dispersing agent, element dopant and solvent are dispersed according to proportion, slurry after dispersion is divided into A, B, C three slurry according to proportion, three slurry are grinded respectively, and then are respectively carried out spray drying;Step two: three spray materials are respectively pre-sintered at different temperatures, and pre-sintered material is respectively crushed;Step three: the material after pre-sintering is mixed to realize multistage particle gradation.Certain mass ratio of carbon source and pre-crushed material are dry mixed;Step four: after secondary sintering, crushing and magnetic removal process, the multistage gradation high compaction lithium iron phosphate positive material is obtained.The present application realizes particle gradation of once sintered material, secondary carbon coating and sintering strengthening by grading particle size design, and realizes the collaborative improvement of compaction density and specific capacity of lithium iron phosphate positive material.

Memory cell structures, semiconductor memory devices, and their fabrication methods are disclosed. In an embodiment, method for fabricating a semiconductor device includes: forming a lower interconnect over a base layer; forming a memory cell structure over the lower interconnect; and forming an upper interconnect over the memory cell structure, wherein the forming of the memory cell structure includes: forming an initial selection element material layer; performing a first doping process that provides first dopants into the initial selection element material layer to reform the initial selection element material layer into a first doped selection element material layer; performing a second doping process that provides second dopants into the first doped selection element material layer to reform the first doped selection element material layer into a second doped selection element material layer; and forming a selection element layer by patterning the second doped selection element material layer.

A semiconductor structure includes a substrate; a first column of active regions over the substrate; a second column of active regions over the substrate; and a dummy padding disposed between the first and the second columns from a top view. The dummy padding includes multiple dummy regions. A first dummy region of the multiple dummy regions is disposed between a first active region in the first column of active regions and a second active region in the second column of active regions. An outer boundary line tracing an edge of the first active region, an edge of the first dummy region, and an edge of the second active region includes at least two substantially 90-degree bends from a top view. The first and the second active regions include a semiconductor material doped with a same dopant.

Method to selectively diffuse dipole dopants into the high-k gate dielectric layer is provided. A method of the present disclosure includes an etching back process controlling DC and bias power, a periodical switching of the bias power is synchronized with a periodical switching of the DC power, leading to a balanced etching rate and uniform depth of recesses in dummy materials within the gate trenches for the subsequent selective diffusion process across different devices. Additionally, during the etching back process, a protective passivation layer can be formed as a barrier on the sidewall of the recess and / or at the bottom of the recess.

A semiconductor device includes a foundation layer and a transistor layer. The foundation layer is based on single-crystalline silicon carbide and includes a current propagation region of a first conductivity type and a non-depletable shielding structure of a second conductivity type. The transistor layer is based on epitaxially grown single-crystalline silicon carbide and includes a transistor cell (TC) configured to control a current through the current propagation region. The transistor layer is formed on the foundation layer after formation of the shielding structure in the foundation layer such that an epitaxial interface forms between the transistor foundation layer and the layer. The current propagation region extends from the epitaxial interface between neighboring partial regions of the shielding structure. Along a vertical line orthogonal to the epitaxial interface and through a pn junction between the shielding structure and a region of the first conductivity type in the transistor layer, a net dopant concentration changes by at least 1e17 1 / cm3 per 0.1 μm at the position of the pn junction.

This application provides a crystal growth method and crystalline silicon, relating to the field of solar photovoltaic technology. The method comprises: performing a leak test on a single crystal furnace under a first furnace pressure; adding a dopant to the single crystal furnace under a second furnace pressure; wherein the second furnace pressure is greater than the first furnace pressure; and performing a crystal pulling process after adding the dopant. This application can reduce axial concentration distribution differences of doping elements in doped single crystal silicon, improve axial resistivity uniformity of the single crystal silicon, and enhance production efficiency.

The invention provides a composition for an organic optoelectronic device, an organic optoelectronic device, and a display device. The composition includes a first host represented by Chemical Formula 1, a second host represented by a combination of Chemical Formula 2 and Chemical Formula 3, and a dopant represented by Chemical Formula 4. The contents of Chemical Formulae 1 to 4 are as defined in the specification.

A display device includes a first electrode on a substrate and a second electrode spaced from the first electrode, a first insulating layer on the first electrode and the second electrode, a plurality of light emitting elements on the first insulating layer and on the first electrode and the second electrode, a first connection electrode on the first electrode and contacting a first end of each of the plurality of light emitting elements, and a second connection electrode on the second electrode and contacting a second end of each of the plurality of light emitting elements, wherein each of the plurality of light emitting elements includes a first semiconductor layer doped with an n-type dopant, a second semiconductor layer doped with a p-type dopant, a light emitting layer between the first semiconductor layer and the second semiconductor layer, and an insulating film surrounding at least the light emitting layer.

Aspects of this disclosure relate to an acoustic wave device with a plurality of piezoelectric layers positioned laterally relative to each other between two electrodes. One of the piezoelectric layers has a different property than another of the piezoelectric layers. Examples of the different property include c-axis orientation, doping concentration, dopant material, and piezoelectric material. At least part of each of the piezoelectric layers can be in a main acoustically active region of the acoustic wave device.

The present disclosure provides for an organic electroluminescent device (OLED) including an anode; a cathode; and an emissive layer, disposed between the anode and the cathode. The emissive layer includes a phosphorescent dopant, a first host, and a second host, wherein the first host transports holes, the second host transports electrons, and the first host is fully or partially deuterated. Consumer products that include the OLED are also provided.

A method and an apparatus for conformal boron doping of a three-dimensional structure. The method comprises: removing an oxide layer from a surface of a silicon-based three-dimensional (3D) substrate; forming, after removing the oxide layer, a first group of stacked films on a surface of the silicon-based three-dimensional substrate; forming a second group of stacked films on a surface of the first group of stacked films away from the silicon-based 3D substrate; depositing an aluminum oxide passivation layer on a surface of the second group of stacked films away from the first group of stacked films; and boron-doping the silicon-based 3D substrate through laser annealing or rapid thermal annealing, where the laser annealing or the rapid thermal annealing drives boron dopants, which comprises boron oxide, into the silicon-based 3D substrate via an auxiliary layer.

The invention discloses a group III chloride ex-situ doped cadmium telluride thin film solar cell and a preparation method thereof, and the cadmium telluride thin film solar cell comprises a substrate layer, a transparent conductive oxide thin film layer, a high-resistance buffer layer, a cell window layer, a cell layer, a back contact layer and a back electrode layer which are sequentially arranged from bottom to top. The cell layer comprises an absorption layer and a IIICl3 layer coated on the upper surface of the cell window layer, and IIICl3 is chloride of the III main group element. According to the III-group chloride ex-situ doping method provided by the invention, the III-group chloride can be dissolved in an organic solution, room-temperature solution deposition is allowed, III-group cations are easy to diffuse at a relatively low annealing temperature, and a complex annealing process is not needed to activate a dopant; through a simple solution process and low-temperature activation, efficient doping of the CdTe absorption layer is effectively realized, and the open-circuit voltage and the overall photoelectric conversion efficiency of the cell are remarkably improved.

The invention relates to the technical field of electroluminescence, and discloses a laminated organic light-emitting device and application thereof, and the laminated organic light-emitting device comprises an anode layer, a first light-emitting unit, an electron transport layer, an interface modification layer, a connection layer, a second light-emitting unit and a cathode layer which are sequentially arranged from bottom to top; the electron transport layer comprises a hole blocking layer and an n-type electron transport layer; wherein the n-type electron transport layer is composed of an n-type dopant and an organic electron transport material, has the functions of electron transport, charge separation and injection and regulation and control of the optical microcavity effect of the laminated device, can simplify the electron transport and connection layer structure of the laminated device, and effectively improves the conductivity of the laminated device; according to the laminated organic light-emitting device, the voltage drop of the body is obviously reduced, and the interface electron injection barrier is reduced, so that the laminated organic light-emitting device has the advantages of low driving voltage, high efficiency and long service life, and the effect of adjusting the optical microcavity of the device can be achieved by utilizing the n-type electron transport layer.

A hybrid inductively coupled plasma mass spectrometer (ICP-MS) system is disclosed for simultaneous elemental and molecular analysis in positive and negative polarities. It includes an ICP torch that generates plasma with a buffer gas, producing both positively and negatively charged ions from a sample. Positioned between the sampler and skimmer, an insert with a defined geometry forms a reaction chamber. Various embodiments feature multiple apertures for pressure control, a rotatable disk for aperture regulation, a slider gate for pressure adjustment, a circular gate with adjustable radial apertures, and an inlet for introducing gases, reagents, dopants, or analytes. These components enable precise pressure modulation, optimizing performance for dual-polarity mass spectrometry. The system enhances analytical flexibility by facilitating controlled ion reactions, improving sensitivity and specificity for both elemental and molecular applications. This innovation expands ICP-MS functionality, supporting diverse scientific and industrial applications requiring high-precision mass analysis.

A semiconductor device includes a substrate, a buffer layer over the substrate, an n-type electrode overlapping the buffer layer, and an electron injection layer in contact with the n-type electrode over the buffer layer. The electron injection layer includes an n-type dopant and a first nitride semiconductor containing gallium. The first nitride semiconductor further contains at least one element of aluminum and indium.

Methods and wafers for vertical gradient freeze 8 inch gallium arsenide (GaAs) substrates. In disclosed examples, vertical gradient freeze systems for forming gallium arsenide (GaAs) substrates having silicon as a dopant, the system includes a crucible to contain a GaAs liquid melt and seed material during a formation process; one or more heating coils arranged in a plurality of heating zones; and a pedestal to move relative to the crucible, the system operable to control heating of the plurality of heating zones and movement of the pedestal to form a single crystal GaAs substrate.

An optical component includes a substrate and an anti-reflective film. The substrate has an aspherical surface through which light passes. The anti-reflective film is disposed at least on the aspherical surface and includes a nanostructure layer and an intermediate layer. The nanostructure layer includes ridge-like protrusions that are non-directionally extended. A bottom of the ridge-like protrusions is closer to the substrate than a top of the ridge-like protrusions. The ridge-like protrusions gradually taper from the bottom toward the top. An average structural height of the ridge-like protrusions ranges from 108 to 368 nm. The intermediate layer is between the nanostructure layer and the substrate. A main component of the nanostructure layer is aluminum oxide. The nanostructure layer includes a metallic doping agent at least partially distributed inside the ridge-like protrusions. The metallic doping agent includes at least one of titanium, vanadium, chromium, titanium oxide, vanadium oxide, and chromium oxide.

The invention belongs to the field of photocatalytic material preparation, and particularly relates to a ZnFe2O4 / TiO2 / BC composite material as well as a preparation method and application thereof. The novel photocatalytic material ZnFe2O4 / TiO2 / BC composite material is prepared through a sol-gel method and a coprecipitation method, the photocatalytic performance of titanium dioxide and zinc ferrite is improved, and the application field of titanium dioxide and zinc ferrite is widened. The dopant provided by the invention is relatively low in price, the process is relatively simple, and the photocatalyst with a wider light absorption range can be prepared and can be used for degrading sulfamethoxazole.

Techniques for dielectric isolation in bulk nanosheet devices are provided. In one aspect, a method of forming a nanosheet device structure with dielectric isolation includes the steps of: optionally implanting at least one dopant into a top portion of a bulk semiconductor wafer, wherein the at least one dopant is configured to increase an oxidation rate of the top portion of the bulk semiconductor wafer; forming a plurality of nanosheets as a stack on the bulk semiconductor wafer; patterning the nanosheets to form one or more nanowire stacks and one or more trenches between the nanowire stacks; forming spacers covering sidewalls of the nanowire stacks; and oxidizing the top portion of the bulk semiconductor wafer through the trenches, wherein the oxidizing step forms a dielectric isolation region in the top portion of the bulk semiconductor wafer. A nanowire FET and method for formation thereof are also provided.

A light-emitting device includes a first electrode, a second electrode facing the first electrode, and an interlayer including an emission layer between the first electrode and the second electrode and a hole transport region between the first electrode and the emission layer, wherein the emission layer may include a dopant, the hole transport region may include a first hole transport layer, a second hole transport layer between the first hole transport layer and the emission layer, and a third hole transport layer between the second hole transport layer and the emission layer, the first hole transport layer may include a first compound, the second hole transport layer may include a second compound, the third hole transport layer may include a third compound, and the first to third compounds may each independently be an amine-based compound, but may be different from each other.

Provides a type of gold(III) complex supported by tetradentate ligand having a structure of formula (I). The light-emitting device prepared by using the complex as a light-emitting layer material or dopant in the light-emitting device has a high external quantum efficiency, and a low efficiency roll-off. In addition, the preparation process of the tetradentate ligand provided in the present disclosure is simple and the yield is satisfactory. More importantly, the preparation reaction of the material is controllable and stable, and has a good reproducibility, and is suitable for industrial application.

The invention relates to a lithium ion battery positive electrode material regeneration method based on the synergistic effect of Nb < 5 + > / Ta < 5 + > / Mo < 6 + > doping and molten salt reconstruction, and belongs to the technical field of lithium battery material recovery and regeneration, a high-temperature molten salt system represented by LiOH-NaCl / Na2SO4 is adopted, NbCl5 / TaCl5 / MoCl6 is introduced as a dopant, and synchronous implementation of structure repair and Nb < 5 + > / Ta < 5 + > / Mo < 6 + > doping is realized in the lithium supplement reconstruction process, so that the lithium supplement reconstruction process is simplified, and the lithium ion battery positive electrode material regeneration method is suitable for large-scale popularization and application. Meanwhile, various structural defects such as lithium vacancies, cation mixing, lattice oxygen loss and particle cracks in the retired high-nickel positive electrode material are repaired, doped elements enter lattices at high temperature to form high-bond-energy O-TM bonds, surface lattice oxygen can be effectively anchored, oxygen vacancy generation and oxygen separation are inhibited, and the service life of the positive electrode material is prolonged. Therefore, the structural stability of the regenerative positive electrode under high voltage is remarkably improved. Meanwhile, a lithium ion diffusion channel is widened by doping Nb < 5 + > / Ta < 5 + > / Mo < 6 + >, the material has more excellent rate capability and long cycle stability in combination with a grain boundary elimination effect brought by crystal reconstruction, and the material has wide adaptability and good industrial popularization prospects.

An alternating stack of insulating layers and spacer material layers is formed over a substrate. The spacer material layer is formed as a conductive layer or subsequently replaced by a conductive layer. Memory openings are formed through the alternating stack. A memory material layer, a semiconductor source structure, a vertical semiconductor channel, a dielectric core, and a drain region are formed in the memory opening. The dopant in the semiconductor source structure is activated after the drain region is formed. Subsequently, the substrate and a bottom portion of the memory film are removed, and a metal source layer is formed on the semiconductor source structure.

The present invention relates to an organic light-emitting device employing, as a host of a light emission layer, an anthracene derivative compound having a characteristic structure by introduction of a benzofuran structure into the anthracene backbone, and as a dopant of the light emission layer, a polycyclic compound having a characteristic structure. The organic light-emitting device according to the present invention is an organic light-emitting device with significantly improved external quantum efficiency and can be advantageously utilized not only for lighting devices but also for various display devices, such as flat, flexible, and wearable displays.

Exemplary semiconductor processing methods may include depositing a metal-doped boron-containing material on a substrate disposed within a processing region of a semiconductor processing chamber. The metal-doped boron-containing material may include a metal dopant comprising tungsten. The substrate may include a silicon-containing material. The methods may include depositing one or more additional materials over the metal-doped boron-containing material. The one or more additional materials may include a patterned photoresist material. The methods may include transferring a pattern from the patterned photoresist material to the metal-doped boron-containing material. The methods may include etching the metal-doped boron-containing material with a chlorine-containing precursor. The methods may include etching the silicon-containing material with a fluorine-containing precursor. The metal dopant may enhance an etch rate of the silicon-containing material. The methods may include removing the metal-doped boron-containing material from the substrate with a halogen-containing precursor.

A two-dimensional semiconductor transistor includes a gate electrode, a gate insulating layer disposed on the gate electrode, an organic dopant layer disposed on the gate insulating layer and comprising an organic material including electrons, a two-dimensional semiconductor layer disposed on the organic dopant layer, a source electrode disposed on the two-dimensional semiconductor layer, and a drain electrode disposed on the two-dimensional semiconductor layer and spaced apart from the source electrode. A hysteresis of the two-dimensional semiconductor transistor is reduced due to the two-dimensional semiconductor transistor including the organic dopant layer.

Dipole engineering techniques for stacked device structures are disclosed herein. According to various aspects of the present disclosure, an exemplary dipole engineering technique includes (1) forming at least two patterned dipole dopant source layers having different patterns and covering gate dielectric layers of some transistors, but not other transistors, (2) performing a thermal drive-in process (e.g., a dipole drive-in anneal), and (3) after removing the dipole dopant source layer, forming gate electrodes for the transistors, where a same gate electrode material is used for the transistors. Thickness(es) and / or material characteristics (e.g., dipole dopant) of the patterned dipole dopant source layers and / or parameters of the thermal drive-in process may be configured to achieve desired threshold voltages. Such technique may provide 2N threshold voltages (Vt), where N is a number of patterned dipole dopant source layers formed on the gate dielectric layers of the transistors to tune their threshold voltages.