3529 results about "Dopant" patented technology

A photo-detecting apparatus is provided. The photo-detecting apparatus includes a carrier conducting layer having a first surface; an absorption region is doped with a first dopant having a first conductivity type and a first peak doping concentration, wherein the carrier conducting layer is doped with a second dopant having a second conductivity type and a second peak doping concentration, wherein the carrier conducting layer comprises a material different from a material of the absorption region, wherein the carrier conducting layer is in contact with the absorption region to form at least one heterointerface, wherein a ratio between the first peak doping concentration of the absorption region and the second peak doping concentration of the carrier conducting layer is equal to or greater than 10; and a first electrode and a second electrode both formed over the first surface of the carrier conducting layer.

A method includes bonding a device die onto a package component. The device die includes a semiconductor substrate, and a through-via extending into the semiconductor substrate. The method further includes depositing a dielectric liner lining sidewalls of the device die, depositing a dielectric layer on the dielectric liner, and planarizing the dielectric layer and the device die. Remaining portions of the dielectric liner and the dielectric layer form a gap-filling region, and a top end of the through-via is revealed. An implantation process is performed to introduce a stress modulation dopant into at least one of the dielectric liner and the dielectric layer. A redistribution line is formed over and electrically connecting to the through-via.

The invention provides a liquid crystal dopant with thermal-photoelectric triple response and an application of the liquid crystal dopant on intelligent glass. The molecular formula of the liquid crystal dopant is shown as a formula (1). The liquid crystal dopant is doped in a liquid crystal material, can respond to temperature, illumination and an electric field at the same time by combining the unique optical and electrical characteristics of the liquid crystal material, and adapts to various environment requirements; a plurality of optical states can be provided to meet energy-saving requirements in different scenes; the light modulation rate is high, the haze is large, and the privacy protection function is strong; the material is simple in preparation process, few in synthesis steps, good in stability and low in raw material cost, can be applied to the fields of residences, commercial buildings, automobiles, airplane windows and the like, and has a wide application prospect.

The invention belongs to the technical field of lithium ion battery materials, and particularly relates to cobalt carbonate and a preparation method thereof, cobaltosic oxide and a lithium ion battery. The crystal grain size of the cobalt carbonate (104) crystal face is 200-250, and the median particle size Dv50 is 16-20 [mu] m. The preparation method of the cobalt carbonate comprises the following steps: adding a precipitant solution and a cobalt salt solution into a reaction kettle in a parallel flow manner, carrying out a co-precipitation reaction, controlling the reaction pH value, starting a thickener when the volume of a material in the reaction kettle reaches a target value, continuing the reaction until large-particle cobalt carbonate slurry is obtained, and carrying out solid-liquid separation and washing to obtain the cobalt carbonate. Cobalt carbonate is subjected to first sintering, mixed with a doping agent and then subjected to second sintering, and cobaltosic oxide with the (311) crystal face grain size being 660-700 and the median particle size Dv50 being 14-18 microns is prepared. The cobaltosic oxide is high in mechanical strength and good in reaction activity with a lithium source, and the prepared lithium cobalt oxide positive electrode material is relatively excellent in electrochemical performance.

A power semiconductor device includes a semiconductor layer structure comprising a drift region of a first conductivity type, and a gate trench extending into the drift region. The gate trench includes sidewalls and a bottom surface therebetween. A bottom shielding structure of a second conductivity type is provided under the bottom surface of the gate trench. First and second support shielding structures of the second conductivity type extend into the drift region on opposing sides of the gate trench and are spaced apart from the sidewalls thereof. A material composition, distance of extension into the drift region relative to a surface of the semiconductor layer structure, and / or dopant concentration of the bottom shielding structure may be different from that of the first and second support shielding structures. Related devices and fabrication methods are also discussed.

The invention provides a high-stability lithium-rich manganese-based positive electrode material and a preparation method thereof, and relates to the technical field of lithium-rich manganese-based positive electrode materials, and the method comprises three steps of preparation of a homogeneous precursor, solid-state mechanical fusion doping and coating, and high-temperature sintering; a lithium-rich manganese-based precursor is prepared by adopting a homogeneous coprecipitation process, uniform distribution of metal ions is ensured, then an aluminum source, a zirconium source and a fluorine source are introduced as doping agents, phosphate and a titanate coating agent are combined, doping and coating integrated treatment is realized through mechanical ball milling, and the lithium-rich manganese-based composite material is obtained. And finally, mixing with a lithium source in an argon atmosphere, and carrying out high-temperature sintering of temperature programming and staged heat preservation to form a stable composite coating layer in situ. Therefore, manganese ion migration is effectively inhibited through lattice doping, a layered structure is prevented from being converted into spinel or rock salt phase, meanwhile, a nanoscale ion / electron transmission channel is constructed, interface impedance is reduced, and the charging and discharging efficiency under high voltage is improved.

Dipole engineering techniques for devices of stacked device structures are disclosed herein. An exemplary method for forming a gate stack of a transistor (e.g., a top transistor) of a transistor stack includes forming a high-k dielectric layer, forming a p-dipole dopant source layer over the high-k dielectric layer, performing a thermal drive-in process that drives a p-dipole dopant from the p-dipole dopant source layer into the high-k dielectric layer, and forming at least one electrically conductive gate layer over the high-k dielectric layer after removing the p-dipole dopant source layer. A drive-in temperature of the thermal drive-in process is less than 600° C. (e.g., about 300° C. to about 500° C.). The p-dipole dopant can be titanium. The method can further include tuning thermal drive-in process parameters to provide the gate dielectric with a p-dipole dopant profile having a peak located at a high-k / interfacial interface ±0.5 nm.

A modified nickel-based positive electrode material comprises a nickel-based positive electrode material matrix and a doping element doped in the nickel-based positive electrode material matrix, the electronegativity of the doping element is higher than that of lithium and transition metal elements in the nickel-based positive electrode material matrix, and the porosity of the material is 10%-20%. The preparation method comprises the following steps: mixing and sintering a positive electrode material precursor, a lithium source and a doping agent to obtain a sintered product; washing and drying the sintered product to obtain a washed product; and mixing the washed product with a coating agent, and sintering to obtain the modified nickel-based positive electrode material. The invention also discloses a lithium ion battery. In the modified nickel-based positive electrode material, a part of doped elements enter a lattice body of a nickel-based positive electrode material matrix, the electronegativity of the doped elements is larger than that of lithium and transition metal elements, the doped elements have higher covalence, higher bond strength and higher oxidation potential, lattice oxygen in the structure is stabilized, precipitation of the lattice oxygen is reduced, and therefore the structural stability of the material is improved.

The invention is applicable to the field of solid-state electrolyte and solid-state lithium ion batteries, and provides a preparation method of cubic-phase lithium lanthanum zirconium oxide solid-state electrolyte, which comprises the control of phase, grain size and element doping, and comprises the following steps: firstly, synthesizing a metal oxide precursor by using a coprecipitation method; carrying out surface modification on the metal oxide precursor through a rotary evaporation process, and simultaneously completing drying treatment; calcining the modified precursor powder under certain temperature and atmosphere conditions to obtain a corresponding metal oxide; and adding a lithium source and a doping agent into the metal oxide, and sintering at a certain temperature, atmosphere and pressure environment to obtain the LLZO solid electrolyte material with the cubic phase structure. According to the invention, the target of preparing the cubic phase LLZO solid electrolyte at a relatively low sintering temperature is achieved by regulating and controlling the particle size of the powder and introducing the doping element.

The invention provides a lithium-rich manganese-based material for an all-solid-state battery as well as a preparation method and application thereof, the preparation method comprises the following steps: mixing and drying a lithium-rich manganese-based carbonate precursor, a dopant and a first solvent to obtain a doped lithium-rich manganese-based carbonate precursor, and then sintering and washing to obtain a pretreated precursor; and carrying out ball milling on the pretreated precursor, mixing with a lithium source, and calcining to obtain the submicron single crystal type lithium-rich manganese-based positive electrode material, and mixing the single crystal type lithium-rich manganese-based positive electrode material, a metal source coating agent and a second solvent, then removing the second solvent, and roasting to obtain the lithium-rich manganese-based material for the all-solid-state battery. According to the preparation method disclosed by the invention, through internal doping of rare earth ions, design of a submicron single crystal structure and surface in-situ coating, the migration speed of lithium ions and the stability of the crystal structure can be improved, side reactions of an interface are reduced, and the stability of the interface is improved.

The invention provides a process for preparing a silicon single crystal rod by a multi-feeding and multi-pulling method. The invention provides a process for preparing monocrystalline silicon by a multi-feeding and multi-pulling method for quantitatively compensating volatile doping elements in a re-feeding stage, which is a method for measuring and calculating the concentration of a volatile doping agent in a residual silicon melt in the re-feeding stage of the multi-feeding and multi-pulling method. Therefore, the purposes of accurately compensating the concentration of the volatile dopant and guaranteeing the quality consistency between crystal bars are achieved. According to the method, the concentration of the volatile dopant in the residual silicon melt in the re-feeding stage can be accurately measured under the condition that a crystal pulling furnace platform is not changed at all; the compensation amount of the volatile dopant in the re-feeding stage can be accurately obtained, and the stable quality of the crystal bar is ensured; meanwhile, auxiliary equipment is not needed, the method is low in cost, good in economical efficiency, suitable for various volatile dopants, wide in application range and suitable for an existing technology for preparing monocrystalline silicon through a multiple-feeding and multiple-pulling method, the technology does not need to be changed, and the production efficiency is high.

The invention provides an epitaxial growth process for improving doping uniformity of n-type doped silicon carbide, and relates to the technical field of semiconductors. The method is based on a chemical vapor deposition growth technology; 11 to 20 gt; the silicon carbide epitaxial growth is carried out by taking silicon carbide with a 4-degree silicon surface in the direction as a substrate, taking trichlorosilane (TCS) and ethylene (C2H4) as growth sources and taking ammonia gas (NH3) as a doping source. Ammonia gas is adopted as an n-type dopant, the decomposition efficiency of the n-type dopant is close to 100% at the temperature of 700 DEG C or above, and the energy of N-H bond breakage of ammonia gas molecules is 390 KJ / mo which is far lower than 946 KJ / mo needed by N-N bond breakage of nitrogen molecules. Therefore, compared with a traditional doping source such as nitrogen, the ammonia gas has higher doping efficiency, residues of excessive nitrogen-containing precursors in the reaction chamber can be reduced, the memory effect is reduced, and thus more excellent in-chip uniformity and stable inter-chip repeatability of the epitaxial wafer are obtained. The selection range of the doping source is widened, the accurate control of the doping concentration is realized, and the stability of the doping concentration in the continuous growth process is improved.

The invention discloses a high-performance potassium-doped tungsten rod and a preparation method and application thereof, and belongs to the technical field of powder metallurgy, and the method relates to the steps of material selection, pre-reduction, vacuum spray doping, reduction, batch pickling, mixing, hard film cold isostatic pressing forming, low-temperature impurity removal, vertical melting pre-sintering, medium-frequency sintering and the like. By accurately controlling the rare earth element doping process and optimizing doping agent preparation, uniform distribution of rare earth elements in the tungsten rod is achieved, and compared with the prior art, the grain refinement effect and the mechanical performance of the high-performance potassium-doped tungsten rod are remarkably improved. The prepared potassium-doped tungsten rod has the advantages of small average grain size and high bending resistance, is suitable for the fields of cathode materials of electronic devices, heating elements of high-temperature furnaces, filaments in the lighting industry, high-temperature furnaces in the semiconductor industry and the like, and meets the requirements of the modern industry for high-performance tungsten materials.

A power semiconductor device includes a semiconductor layer structure including a drift region of a first conductivity type and a gate trench extending into the drift region. The gate trench includes sidewalls and a bottom surface between the sidewalls. And a bottom shielding structure of a second conduction type is arranged below the bottom surface of the gate trench. First and second support shielding structures of a second conductivity type extend into the drift region on opposite sides of the gate trench and are spaced apart from sidewalls of the gate trench. A material composition of the bottom shielding structure, a distance extending into the drift region relative to a surface of the semiconductor layer structure, and / or a dopant concentration may be different from those of the first and second support shielding structures. Related devices and methods of manufacture are also discussed.

The preparation method comprises the following steps: 1, dispersing an iron source, a phosphorus source, a lithium source, a carbon source, a dispersing agent, an element doping agent and a solvent in proportion, dividing the dispersed slurry into three parts of slurry A, B and C in proportion, respectively grinding the three parts of slurry, and respectively carrying out spray drying; 2, pre-sintering the three parts of spray materials at different temperatures, and crushing the pre-sintered materials; and step 3, mixing the crushed pre-sintered materials so as to realize multi-stage grain composition. Carrying out dry mixing on a carbon source and the pre-crushed material according to a certain mass ratio; and 4, carrying out secondary sintering, crushing and demagnetizing on the mixed material to obtain the multi-stage grading high-compaction lithium iron phosphate positive electrode material. According to the invention, primary sintering material grain grading and secondary carbon coating and sintering strengthening are realized through graded particle size design, and the compaction density and the specific capacity of the lithium iron phosphate positive electrode material are synergistically improved.

A semiconductor device structure and methods of forming the same are described. The structure includes a first semiconductor material disposed over a substrate and a dielectric layer disposed on the first semiconductor material. The dielectric layer includes a dopant. The structure further includes a second semiconductor material disposed on the dielectric layer, a first semiconductor layer in contact with the second semiconductor material, and a first dielectric spacer in contact with the first semiconductor layer, wherein the first dielectric spacer includes the dopant.

Lithium-aluminum-silicon glass ceramic and a preparation method therefor. The addition of a V2O5 and Ta2O5 composite nucleating agent reduces the crystallization temperature of glass and improves the stability of the glass; a doping agent, such as CeO2, significantly accelerates the growth speed of crystals, thereby nucleating and crystallizing the glass at relatively low temperatures and improving the transmittance of the glass; a co-solvent, such as B2O3, reduces the high-temperature viscosity of the glass, thereby reducing the activation free energy during the glass crystallization process and facilitating the crystallization and processing molding; a 3D hot bending process comprises the stages of preheating, pressurizing, annealing and cooling, a copper mold transfers heat to the glass by means of heat conduction, such that the glass is evenly heated during the heating process, and natural cooling can prevent the problem of glass being broken or having an inaccurate dimensional accuracy caused by excessive fast cooling; and the graft modification on the surface of the glass significantly improves the hydrophobic property of the glass, such that the comprehensive performance of the glass is good.

A kind of preparation method of high compaction lithium iron phosphate of multistage gradation, including step one: iron source, phosphorus source, lithium source, carbon source, dispersing agent, element dopant and solvent are dispersed according to proportion, slurry after dispersion is divided into A, B, C three slurry according to proportion, three slurry are grinded respectively, and then are respectively carried out spray drying;Step two: three spray materials are respectively pre-sintered at different temperatures, and pre-sintered material is respectively crushed;Step three: the material after pre-sintering is mixed to realize multistage particle gradation.Certain mass ratio of carbon source and pre-crushed material are dry mixed;Step four: after secondary sintering, crushing and magnetic removal process, the multistage gradation high compaction lithium iron phosphate positive material is obtained.The present application realizes particle gradation of once sintered material, secondary carbon coating and sintering strengthening by grading particle size design, and realizes the collaborative improvement of compaction density and specific capacity of lithium iron phosphate positive material.

Memory cell structures, semiconductor memory devices, and their fabrication methods are disclosed. In an embodiment, method for fabricating a semiconductor device includes: forming a lower interconnect over a base layer; forming a memory cell structure over the lower interconnect; and forming an upper interconnect over the memory cell structure, wherein the forming of the memory cell structure includes: forming an initial selection element material layer; performing a first doping process that provides first dopants into the initial selection element material layer to reform the initial selection element material layer into a first doped selection element material layer; performing a second doping process that provides second dopants into the first doped selection element material layer to reform the first doped selection element material layer into a second doped selection element material layer; and forming a selection element layer by patterning the second doped selection element material layer.

A semiconductor structure includes a substrate; a first column of active regions over the substrate; a second column of active regions over the substrate; and a dummy padding disposed between the first and the second columns from a top view. The dummy padding includes multiple dummy regions. A first dummy region of the multiple dummy regions is disposed between a first active region in the first column of active regions and a second active region in the second column of active regions. An outer boundary line tracing an edge of the first active region, an edge of the first dummy region, and an edge of the second active region includes at least two substantially 90-degree bends from a top view. The first and the second active regions include a semiconductor material doped with a same dopant.

The invention provides an oxide solid electrolyte material and a preparation method and application thereof, and relates to the technical field of electrolyte material preparation, the preparation method comprises the following steps: 1) preparing pure-phase lithium borate from BLiO2, Li2O and B4Li2O7 according to a certain proportion under a certain condition; 2) mixing lithium borate with a zirconium source, a lithium source and a doping agent according to a certain proportion, and carrying out ball milling or wet ball milling / drying; 3) then tabletting, carrying out primary high-temperature solid-phase sintering, crushing and the like; and 4) finally, mixing and ball-milling the doped and modified LZBO and a coating agent, tabletting, and then carrying out secondary high-temperature solid-phase sintering, crushing and the like to obtain the LZBO material. Aiming at the defects of the traditional high-temperature solid-phase synthesis method, by innovating raw material combination and process steps, the reaction temperature is reduced, the product purity and the production efficiency are improved, and energy conservation and emission reduction are realized. According to the invention, the ionic conductivity, the compaction density, the battery rate, the cycle performance and the like are improved, and the application range is widened.

Method to selectively diffuse dipole dopants into the high-k gate dielectric layer is provided. A method of the present disclosure includes an etching back process controlling DC and bias power, a periodical switching of the bias power is synchronized with a periodical switching of the DC power, leading to a balanced etching rate and uniform depth of recesses in dummy materials within the gate trenches for the subsequent selective diffusion process across different devices. Additionally, during the etching back process, a protective passivation layer can be formed as a barrier on the sidewall of the recess and / or at the bottom of the recess.

A semiconductor device includes a foundation layer and a transistor layer. The foundation layer is based on single-crystalline silicon carbide and includes a current propagation region of a first conductivity type and a non-depletable shielding structure of a second conductivity type. The transistor layer is based on epitaxially grown single-crystalline silicon carbide and includes a transistor cell (TC) configured to control a current through the current propagation region. The transistor layer is formed on the foundation layer after formation of the shielding structure in the foundation layer such that an epitaxial interface forms between the transistor foundation layer and the layer. The current propagation region extends from the epitaxial interface between neighboring partial regions of the shielding structure. Along a vertical line orthogonal to the epitaxial interface and through a pn junction between the shielding structure and a region of the first conductivity type in the transistor layer, a net dopant concentration changes by at least 1e17 1 / cm3 per 0.1 μm at the position of the pn junction.

A semiconductor integrated circuit (IC) device includes both a transistor and a vertical diode. In some examples, the transistor includes a backside source / drain (S / D) contact and the vertical diode includes a backside bottom contact. The backside S / D contact and the backside bottom contact may be electrically connected to a backside BEOL network. The transistor may further include a S / D region that includes an upper S / D portion and a trench S / D portion that has a higher dopant concentration relative to the upper portion. The backside S / D contact may be connected to the trench S / D portion of the S / D region. The vertical diode may include a bottom doped region which may be simultaneously formed along with the trench S / D portion and may be composed of substantially the same materials. The backside bottom contact may be directly connected to the bottom doped region of the vertical diode.

A solid electrolytic capacitor according to one aspect of the present disclosure includes: an anode body made of a valve metal; a dielectric layer formed on the anode body; and a solid electrolyte layer formed on the dielectric layer. The solid electrolyte layer includes: a first conductive polymer layer formed on the dielectric layer and heterogeneously doped with a monomolecular dopant; a block layer formed on the first conductive polymer layer; and a second conductive polymer layer formed on the block layer and composed of a self-doped-type conductive polymer containing a plurality of side chains containing a functional group that can be doped. The block layer blocks a migration of the self-doped-type conductive polymer from the second conductive polymer layer into the first conductive polymer layer and / or a migration of the self-doped-type conductive polymer from the second conductive polymer layer into pores of the porous anode body.

Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.

This application provides a crystal growth method and crystalline silicon, relating to the field of solar photovoltaic technology. The method comprises: performing a leak test on a single crystal furnace under a first furnace pressure; adding a dopant to the single crystal furnace under a second furnace pressure; wherein the second furnace pressure is greater than the first furnace pressure; and performing a crystal pulling process after adding the dopant. This application can reduce axial concentration distribution differences of doping elements in doped single crystal silicon, improve axial resistivity uniformity of the single crystal silicon, and enhance production efficiency.

In general, the disclosure describes sensor including an intermediate band layer including a plurality of dopant particles, wherein the intermediate band layer is configured to absorb a portion of incident electromagnetic radiation comprising a first range of wavelengths greater than 1100 nm and form optically induced minority carriers. The sensor also includes a photo-sensitive silicon substrate configured to detect the electromagnetic radiation comprising a second range of wavelengths less than or equal to 1100 nm.

The invention provides a composition for an organic optoelectronic device, an organic optoelectronic device, and a display device. The composition includes a first host represented by Chemical Formula 1, a second host represented by a combination of Chemical Formula 2 and Chemical Formula 3, and a dopant represented by Chemical Formula 4. The contents of Chemical Formulae 1 to 4 are as defined in the specification.

Doped layered cathode materials for an electrochemical device are disclosed, which comprises a layered cathode material and a dopant, wherein the dopant is selected and added so that the electrochemical device delivers a capacity retention of about 78% to about 88% after 500 cycles at 1 C.