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6691 results about "Aspect ratio" patented technology

The aspect ratio of a geometric shape is the ratio of its sizes in different dimensions. For example, the aspect ratio of a rectangle is the ratio of its longer side to its shorter side – the ratio of width to height, when the rectangle is oriented as a "landscape".

Copper conductor annealing process employing high speed optical annealing with a low temperature-deposited optical absorber layer

A method of forming a conductor in a thin film structure on a semiconductor substrate includes forming high aspect ratio openings in a base layer having vertical side walls, depositing a dielectric barrier layer comprising a dielectric compound of a barrier metal on the surfaces of the high aspect ratio openings including the vertical side walls, depositing a metal barrier layer comprising the barrier metal on the first barrier layer, depositing a main conductor species seed layer on the metal barrier layer and depositing a main conductor layer. The method further includes annealing the main conductor layer by (a) directing light from an array of continuous wave lasers into a line of light extending at least partially across the thin film structure, and (b) translating the line of light relative to the thin film structure in a direction transverse to the line of light. The method of Claim 1 further comprising, prior to the annealing step, depositing an amorphous carbon optical absorber layer on the main conductor layer. The step of depositing an amorphous carbon optical absorber layer includes introducing a carbon-containing process gas into a reactor chamber containing the substrate in a process zone of the reactor, applying RF source power to an external reentrant conduit of the reactor to generate a reentrant toroidal RF plasma current passing through the process zone and applying a bias voltage to the substrate.
Owner:APPLIED MATERIALS INC

Planarizing etch hardmask to increase pattern density and aspect ratio

Methods for manufacturing a semiconductor device in a processing chamber are provided. In one embodiment, a method includes depositing over a substrate a first base material having a first set of interconnect features, filling an upper portion of the first set of interconnect features with an ashable material to an extent capable of protecting the first set of interconnect features from subsequent processes while being easily removable when desired, planarizing an upper surface of the first base material such that an upper surface of the ashable material filled in the first set of interconnect features is at the same level with the upper surface of the first base material, providing a substantial planar outer surface of the first base material, depositing a first film stack comprising a second base material on the substantial planar outer surface of the first base material, forming a second set of interconnect features in the second base material, wherein the second set of interconnect features are aligned with the first set of interconnect features, and removing the ashable material from the first base material, thereby extending a feature depth of the semiconductor device by connecting the second set of interconnect features to the first set of interconnect features. In another embodiment, a method includes providing a base material having a first film stack deposited thereon, wherein the base material is formed over the substrate and having a first set of interconnect features filled with an amorphous carbon material, the first film stack comprising a first amorphous carbon layer deposited on a surface of the base material, a first anti-reflective coating layer deposited on the first amorphous carbon layer, and a first photoresist layer deposited on the first anti-reflective coating layer, and patterning a portion of the first photoresist layer by shifting laterally a projection of a mask on the first photoresist layer relative to the substrate a desired distance, thereby introducing into the first photoresist layer a first feature pattern to be transferred to the underlying base material, wherein the first feature pattern is not aligned with the first set of interconnect features.
Owner:APPLIED MATERIALS INC

Virtual desktop manager system and method

The present invention comprises a method and computer implemented system for presenting multiple virtual desktops on a display of a computer system. A “pager” window is displayed on a desktop (either real or virtual) which comprises multiple subpanes, each of which contains a scaled virtual desktop having dimensions that are proportional to, but less than the dimensions of a corresponding virtual desktop. Each scaled virtual desktop provides a representation of the corresponding full-size virtual desktop that would display one or more application windows whose content may optionally be replaced by the icon designating the application program or data file displayed therein, for sake of visual clarity. The present invention also provides a mechanism for varying the background image of virtual desktop, and thus, of each scaled virtual desktop pane, in addition to a number of enhancements to the user interface for controlling the virtual desktop environment including transparency hiding of the pager window, constant aspect ratio scaling of the pager window, mouse desktop changing with corner exclusion, display and interaction with window lists, individual pop up menus for windows, starting desktop selection, a method for moving windows between virtual desktops, a method to override virtual desktop behaviors, a method for placing child windows on the same desktop as the parent window, notification of desktop changes, tracking topmost application on other desktops, sticky monitors, and API remote control.
Owner:THOMPSON JEFFREY W +4
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