22286 results about "Fluorine" patented technology

A first embodiment of the present invention pertains to a method of patterning a semiconductor device conductive feature while permitting easy removal of any residual masking layer which remains after completion of the etching process. A multi-layered masking structure is used which includes a layer of high-temperature organic-based masking material overlaid by either a patterned layer of inorganic masking material or by a layer of patterned high-temperature imageable organic masking material. The inorganic masking material is used to transfer a pattern to the high-temperature organic-based masking material and is then removed. The high-temperature organic-based masking material is used to transfer the pattern and then may be removed if desired. This method is also useful in the pattern etching of aluminum, even though aluminum can be etched at lower temperatures. A second embodiment of the present invention pertains to a specialized etch chemistry useful in the patterning of organic polymeric layers such as low k dielectrics, or other organic polymeric interfacial layers. This etch chemistry is useful for mask opening during the etch of a conductive layer or is useful in etching damascene structures where a metal fill layer is applied over the surface of a patterned organic-based dielectric layer. The etch chemistry provides for the use of etchant plasma species which minimize oxygen, fluorine, chlorine, and bromine content.

A method of manufacturing a semiconductor device is disclosed which comprises forming a gate structure on a major surface of a semiconductor substrate with a gate insulating film interposed therebetween, forming a first insulating film to cover top and side surfaces of the gate structure and the major surface of the semiconductor substrate, reforming portions of the first insulating film which cover the top surface of the gate structure and the major surface of the semiconductor substrate by an anisotropic plasma process using a gas not containing fluorine, and removing the reformed portions of the first insulating film.

A red phosphorescent compound, includes a host material being capable of transporting an electron or a hole; and a dopant material represented by following Formula 1:

wherein each of R1 to R4 is selected from the group consisting of hydrogen atom (H), C1 to C6 alkyl and C1 to C6 alkoxy, and at least one of R1 to R4 is C1 to C6 alkyl, and wherein each of R5 to R7 is selected from the group consisting of hydrogen, C1 to C6 alkyl and halogen atom, and at least one of R5 to R7 is halogen atom, and wherein each of X and Y is selected from the group consisting of H, non-substituted C1 to C6 alkyl and C1 to C6 alkyl substituted by fluorine.

A method for preparing 2,3,3,3-tetrafluoroprop-1-ene comprising (a) providing a starting composition comprising at least one compound having a structure selected from Formulae I, II and III:

CX₂═CCl—CH₂X  (Formula I)

CX₃—CCl═CH₂  (Formula II)

CX₃—CHCl—CH₂X  (Formula III)

• • wherein X is independently selected from F, Cl, Br, and I, provided that at least one X is not fluorine;

(b) contacting said starting composition with a first fluorinating agent to produce a first intermediate composition comprising 2-chloro-3,3,3-trifluoropropene and a first chlorine-containing byproduct; (c) contacting said first intermediate composition with a second fluorinating agent to produce a second intermediate composition comprising 2-chloro-1,1,1,2-tetrafluoropropane and a second chlorine-containing byproduct; and (d) catalytically dehydrochlorinating at least a portion of said 2-chloro-1,1,1,2-tetrafluoropropane to produce a reaction product comprising 2,3,3,3-tetrafluoroprop-1-ene.

A method of cleaning a substrate processing chamber that enables formation of an oxide film on a surface of a processing chamber inside component to be prevented. A substrate processing chamber 11 has therein a processing space S into which a wafer W is transferred and carries out reactive ion etching on the wafer W in the processing space S. The substrate processing chamber 11 has an upper electrode plate 38 that comprises silicon and a lower surface of which is exposed to the processing space S. A dry cleaning is carried out on the upper electrode plate 38 using oxygen radicals produced from oxygen gas introduced into the processing space S. An oxide removal processing is carried out on the upper electrode plate 38 using fluorine ions and fluorine radicals produced from carbon tetrafluoride gas introduced into the processing space S.

The invention provides a fluorinated surfactant having the general formula:

[R_f—(O)_t—CHF—(CF₂)_n—COO—]_iXⁱ⁺  (I)

wherein R_f represents a partially or fully fluorinated aliphatic group optionally interrupted with one or more oxygen atoms, t is 0 or 1 and n is 0 or 1, Xⁱ⁺ represents a cation having a valence i and i is 1, 2 or 3. The surfactant can be used in emulsion polymerization of fluoromonomers to prepare fluoropolymers.

An alkali aluminosilicate glass article, said alkali aluminosilicate glass having a surface compressive stress of at least about 200 MPa, a surface compressive layer having a depth of at least about 30 μm, a thickness of at least about 0.3 mm and an amphiphobic fluorine-based surface layer chemically bonded to the surface of the glass. In one embodiment the glass has an anti-reflective coating applied to one surface of the glass between the chemically strengthened surface of the glass and the amphiphobic coating. In another embodiment the surface of the chemically strengthened glass is acid treated using a selected acid (e.g., HCL, H₂SO₄, HClO₄, acetic acid and other acids as described) prior to placement of the amphiphobic coating or the anti-reflective coating.

A plasma processing apparatus used in semiconductor device manufacturing includes a process kit formed of insulating materials such as quartz and coated with a Y₂O₃ coating. The Y₂O₃ coating is a thin film formed using suitable CVD or PVD operations. The Y₂O₃ coating is resistant to degradation in fluorine etching chemistries commonly used to etch silicon in semiconductor manufacturing. The plasma processing apparatus may be used in etching, stripping and cleaning operations. Also provided in another embodiment is a plasma processing apparatus having a quartz process kit coated with a sapphire-like film.

The present invention provides an aqueous emulsion polymerization of fluorinated monomers including gaseous fluorinated monomers using a perfluoro ether surfactant as an emulsifier. The perfluoro ether surfactants correspond to formula (I)

R_f—O—CF₂CF₂—X   (I)

wherein R_f represents a linear or branched perfluoroalkyl group having 1, 2, 3 or 4 carbon atoms and X represents a carboxylic acid group or salt thereof. In a further aspect, the invention also provides an aqueous fluoropolymer dispersion comprising the perfluoro ether surfactant and the use of such dispersion in the coating or impregnation of substrates.

Methods for controlled isotropic etching of layers of silicon oxide and germanium oxide with atomic scale fidelity are provided. The methods make use of NO activation of an oxide surface. Once activated, a fluorine-containing gas or vapor etches the activated surface. Etching is self-limiting as once the activated surface is removed, etching stops since the fluorine species does not spontaneously react with the un-activated oxide surface. These methods may be used in interconnect pre-clean applications, gate dielectric processing, manufacturing of memory devices, or any other applications where accurate removal of one or multiple atomic layers of material is desired.

A method of etching silicon-containing material is described and includes a SiConi™ etch having a greater or lesser flow ratio of hydrogen compared to fluorine than that found in the prior art. Modifying the flow rate ratios in this way has been found to reduce roughness of the post-etch surface and to reduce the difference in etch-rate between densely and sparsely patterned areas. Alternative means of reducing post-etch surface roughness include pulsing the flows of the precursors and/or the plasma power, maintaining a relatively high substrate temperature and performing the SiConi™ in multiple steps. Each of these approaches, either alone or in combination, serve to reduce the roughness of the etched surface by limiting solid residue grain size.

Embodiments of the invention generally provide methods for depositing metal-containing materials and compositions thereof. The methods include deposition processes that form metal, metal carbide, metal silicide, metal nitride, and metal carbide derivatives by a vapor deposition process, including thermal decomposition, CVD, pulsed-CVD, or ALD. In one embodiment, a method for processing a substrate is provided which includes depositing a dielectric material having a dielectric constant greater than 10, forming a feature definition in the dielectric material, depositing a work function material conformally on the sidewalls and bottom of the feature definition, and depositing a metal gate fill material on the work function material to fill the feature definition, wherein the work function material is deposited by reacting at least one metal-halide precursor having the formula MX_Y, wherein M is tantalum, hafnium, titanium, and lanthanum, X is a halide selected from the group of fluorine, chlorine, bromine, or iodine, and y is from 3 to 5.

The present invention provides straight forward methods for plasma etching a trench having rounded top corners, or rounded bottom corners, or both in a silicon substrate. A first method for creating a rounded top corner on the etched silicon trench comprises etching both an overlying silicon oxide layer and an upper portion of the silicon substrate during a "break-through" step which immediately precedes the step in which the silicon trench is etched. The plasma feed gas for the break-through step comprises carbon and fluorine. In this method, the photoresist layer used to pattern the etch stack is preferably not removed prior to the break-through etching step. Subsequent to the break-through step, a trench is etched to a desired depth in the silicon substrate using a different plasma feed gas composition. A second method for creating a rounded top corner on the etched silicon trench comprises formation of a built-up extension on the sidewall of an overlying patterned silicon nitride hard mask during etch (break-through) of a silicon oxide adhesion layer which lies between the hard mask and a silicone substrate. The built-up extension upon the silicon nitride sidewall acts as a sacrificial masking material during etch of the silicon trench, delaying etching of the silicon at the outer edges of the top of the trench. This permits completion of trench etching with delayed etching of the top corner of the trench and provides a more gentle rounding (increased radius) at the top corners of the trench. During the etching of the silicon trench to its final dimensions, it is desirable to round the bottom corners of the finished silicon trench. We have discovered that a more rounded bottom trench corner is obtained using a two-step silicon etch process where the second step of the process is carried out at a higher process chamber pressure than the first step.

An organic thin film forming apparatus that can easily remove an organic thin film adhered to a surface of a deposition preventive plate. The apparatus forms an organic thin film on a substrate disposed on a surface of a substrate stage from an organic gas. An electroless nickel film containing fluorine resin is formed on the surface of a deposition preventive plate. The electroless nickel film containing fluorine resin has mold release characteristics for an organic thin film. Even if the organic thin film adheres, the organic thin film can be easily removed by a method (such as, high pressure cleaning).

Chemical vapor deposition processes are employed to fill high aspect ratio (typically at least 3:1), narrow width (typically 1.5 microns or less and even sub 0.15 micron) gaps with significantly reduced incidence of voids or weak spots. This deposition process involves the use of both hydrogen and fluorine as process gases in the reactive mixture of a plasma-containing CVD reactor. The process gas also includes dielectric forming precursors such as silicon and oxygen-containing molecules.

The present invention includes a process for selectively etching a low-k dielectric material formed on a substrate using a plasma of a gas mixture in a plasma etch chamber. The gas mixture comprises a fluorine-rich fluorocarbon or hydrofluorocarbon gas, a nitrogen-containing gas, and one or more additive gases, such as a hydrogen-rich hydrofluorocarbon gas, an inert gas and/or a carbon-oxygen gas. The process provides a low-k dielectric to a photoresist mask etching selectivity ratio greater than about 5:1, a low-k dielectric to a barrier/liner layer etching selectivity ratio greater about 10:1, and a low-k dielectric etch rate higher than about 4000 Å/min.

The invention discloses a compound flocculant taking natural minerals as main components. The compound flocculant is mainly prepared from the following components by weight percent: 60%-85% of natural minerals, 8%-38% traditional inorganic flocculant and 3%-10% of organic polymer flocculant. According to the invention, key points are as follows: in the compound flocculant taking natural minerals as main components, the weight of the natural minerals, the inorganic flocculant and the organic polymer flocculant is dry weight; and the compound flocculant is implemented to purification of civil engineering wastewater, natural water, industrial wastewater, oily wastewater, fluoride wastewater, food processing wastewater, auto parts processing wastewater, colored wastewater, clean wastewater, semiconductor processing wastewater, restaurant waste water, mine water, slaughter wastewater, grinding wastewater, sewage effluent and the like.

A method for fabricating a semiconductor device including surface cleaning includes forming a gate stack on a semiconductor substrate, cleaning contaminants present on the surface of the semiconductor substrate exposed through a contact hole using an etchant including a fluorine (F)-containing species dispersed in an alcohol, and filling a contact hole with a conductive layer to form a connection contact. The etchant preferably has a low selectivity of 1 or less.

The present invention is a method for removing deposited etch byproducts from surfaces of a semiconductor processing chamber after a copper etch process. The method of the invention comprises the following general steps: (a) an oxidation step, in which interior surfaces of the processing chamber are contacted with an oxidizing plasma; (b) a first non-plasma cleaning step, in which interior surfaces of the processing chamber are contacted with an H+hfac-comprising gas; and (c) a second cleaning step, in which interior surfaces of the processing chamber are contacted with a plasma containing reactive fluorine species, whereby at least a portion of the copper etch byproducts remaining after step (b) are volatilized into gaseous species, which are removed from the processing chamber. The method of the invention is preferably performed at a chamber wall temperature of at least 150° C. in order to achieve optimum cleaning of the chamber at the chamber operating pressures typically used during the cleaning process. The dry cleaning method of the invention can be performed between wafer processing runs without opening the processing chamber, thereby minimizing potential contamination to the chamber as well as chamber downtime.

The present invention develops a process for plasma treatment using a gas having no greenhouse effect in order to realize global environmental preservation and sophistication of plasma process performance and provides a process for plasma etching with high accuracy which process can depress damage to devices. The process for plasma treatment according to the present invention comprises the steps of feeding a treatment gas containing fluorine gas (F₂) into a plasma generating chamber, alternately repeating application of high frequency electric field and stop of the application thereof to generate plasma, and carrying out substrate treatment by irradiating the plasma to a substrate. Furthermore, the substrate treatment may be carried out by individually or alternately extracting negative ions or positive ions from the plasma, or selectively extracting only negative ions, neutralizing them, to generate a neutral beam and irradiating the neutral beam to the substrate.

Optical waveguide fiber that has large effective area and low loss characteristics, such as low attenuation and low bend loss. The optical waveguide fiber includes a dual trench design wherein an annular region closer to the core is preferably doped with at least one downdopant such as fluorine, which annular region is surrounded by another annular region that preferably includes closed, randomly dispersed voids.

A metal coordination compound suitable as an organic material for a luminescent device is represented by the following formula (1): wherein M denotes Ir, Pt, Rh or Pd; n is 2 or 3; Y denotes an alkylene group having 2-6 carbon atoms capable of including one or at least two non-neighboring methylene groups which can be replaced with -O-, -S- or -CO- and capable of including hydrogen atom which can be replaced with a linear or branched alkyl group which has 1-10 carbon atoms and is capable of including hydrogen atom which can be replaced with fluorine atom; and CyN denotes a cyclic group containing nitrogen atom connected to M and capable of having a substituent selected from the group consisting of halogen atom; nitro group; phenyl group; trialkylsilyl group having 1-8 carbon atoms; and a linear or branched alkyl group having 1-20 carbon atoms capable of including one or at least two non-neighboring methylene groups which can be replaced with -O-, -S-, -CO-, -CO-O-, -O-CO-, -CH=CH- or -C=C- and capable of including hydrogen atom which can be replaced with fluorine atom.