1316 results about "Anti-reflective coating" patented technology

An alkali aluminosilicate glass article, said alkali aluminosilicate glass having a surface compressive stress of at least about 200 MPa, a surface compressive layer having a depth of at least about 30 μm, a thickness of at least about 0.3 mm and an amphiphobic fluorine-based surface layer chemically bonded to the surface of the glass. In one embodiment the glass has an anti-reflective coating applied to one surface of the glass between the chemically strengthened surface of the glass and the amphiphobic coating. In another embodiment the surface of the chemically strengthened glass is acid treated using a selected acid (e.g., HCL, H₂SO₄, HClO₄, acetic acid and other acids as described) prior to placement of the amphiphobic coating or the anti-reflective coating.

Methods for manufacturing a semiconductor device in a processing chamber are provided. In one embodiment, a method includes depositing over a substrate a first base material having a first set of interconnect features, filling an upper portion of the first set of interconnect features with an ashable material to an extent capable of protecting the first set of interconnect features from subsequent processes while being easily removable when desired, planarizing an upper surface of the first base material such that an upper surface of the ashable material filled in the first set of interconnect features is at the same level with the upper surface of the first base material, providing a substantial planar outer surface of the first base material, depositing a first film stack comprising a second base material on the substantial planar outer surface of the first base material, forming a second set of interconnect features in the second base material, wherein the second set of interconnect features are aligned with the first set of interconnect features, and removing the ashable material from the first base material, thereby extending a feature depth of the semiconductor device by connecting the second set of interconnect features to the first set of interconnect features. In another embodiment, a method includes providing a base material having a first film stack deposited thereon, wherein the base material is formed over the substrate and having a first set of interconnect features filled with an amorphous carbon material, the first film stack comprising a first amorphous carbon layer deposited on a surface of the base material, a first anti-reflective coating layer deposited on the first amorphous carbon layer, and a first photoresist layer deposited on the first anti-reflective coating layer, and patterning a portion of the first photoresist layer by shifting laterally a projection of a mask on the first photoresist layer relative to the substrate a desired distance, thereby introducing into the first photoresist layer a first feature pattern to be transferred to the underlying base material, wherein the first feature pattern is not aligned with the first set of interconnect features.

Matrixes doped with semiconductor nanocrystals are provided. In certain embodiments, the semiconductor nanocrystals have a size and composition such that they absorb or emit light at particular wavelengths. The nanocrystals can comprise ligands that allow for mixing with various matrix materials, including polymers, such that a minimal portion of light is scattered by the matrixes. The matrixes of the present invention can also be utilized in refractive index matching applications. In other embodiments, semiconductor nanocrystals are embedded within matrixes to form a nanocrystal density gradient, thereby creating an effective refractive index gradient. The matrixes of the present invention can also be used as filters and antireflective coatings on optical devices and as down-converting layers. Processes for producing matrixes comprising semiconductor nanocrystals are also provided. Nanostructures having high quantum efficiency, small size, and/or a narrow size distribution are also described, as are methods of producing indium phosphide nanostructures and core-shell nanostructures with Group II-VI shells.

A method for forming a damascene with improved electrical properties and resulting structure thereof including providing at least one dielectric insulating layer overlying a first etch stop layer; forming an anti-reflectance coating (ARC) layer prior to a photolithographic patterning process; forming at least one opening extending through a thickness portion of the at least one dielectric insulating layer and first etch stop layer according to said photolithographic patterning and an etching process; blanket depositing a barrier layer including material selected from the group consisting of silicon carbide and silicon oxycarbide to line the at least one opening; blanket depositing a refractory metal liner over the barrier layer; blanket depositing at least one metal layer to fill the at least one opening; and, removing at least the at least one metal layer overlying the at least one opening level according to a chemical mechanical polish (CMP) process.

Matrixes doped with semiconductor nanocrystals are provided. In certain embodiments, the semiconductor nanocrystals have a size and composition such that they absorb or emit light at particular wavelengths. The nanocrystals can comprise ligands that allow for mixing with various matrix materials, including polymers, such that a minimal portion of light is scattered by the matrixes. The matrixes are optionally formed from the ligands. The matrixes of the present invention can also be utilized in refractive index matching applications. In other embodiments, semiconductor nanocrystals are embedded within matrixes to form a nanocrystal density gradient, thereby creating an effective refractive index gradient. The matrixes of the present invention can also be used as filters and antireflective coatings on optical devices and as down-converting layers. Processes for producing matrixes comprising semiconductor nanocrystals are also provided. Nanostructures having high quantum efficiency, small size, and/or a narrow size distribution are also described, as are methods of producing indium phosphide nanostructures and core-shell nanostructures with Group II-VI shells.

Manufacturing semiconductor device by steps of:

• • a) providing substrate with antireflective coating or underlayer,
  • b) applying first photosensitive composition over substrate,
  • c) exposing first composition to radiation to produce first pattern,
  • d) developing exposed first composition to produce an imaged bilayer stack,
  • e) rinsing the stack,
  • f) applying fixer to the stack,
  • g) applying optional bake,
  • h) rinsing the stack,
  • i) applying second optional bake,
  • j) applying second photosensitive composition onto the stack to produce multilayer stack,
  • k) exposing second composition to produce second pattern offset from first pattern,
  • l) developing exposed second composition to produce multilayer stack, and
  • m) rinsing multilayer stack;

the photosensitive compositions have photoacid generator and substantially aqueous base insoluble polymer whose solubility increases upon treatment with acid and further comprises an anchor group, and the fixer is a polyfunctional compound reactive with anchor group, but does not contain silicon and the substrate stays within a lithographic cell from at least first coating step until at least after final exposure.

In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.

Anti-reflective coating compositions having improved etch rate, inter alia, are prepared from certain acrylic polymers and copolymers, such as, glycidyl methacrylate reacted with non-polycyclic carboxylic acid dyes and non-polycyclic phenolic dyes, all light absorbing at a wavelength of 193 nm.

Described herein are methods and systems for forming lenses. In one embodiment, systems for use in forming eyeglass lenses are described that include one or more LED lights. The LED lights may be used to cure lens forming compositions and coating compositions. In other embodiments, methods of determining an appropriate spacing for mold members are described. In other embodiments, methods of forming anti-reflective coatings, photochromic coatings, hardcoat coatings, and combinations thereof, on eyeglass lenses, are described.

A pattern in a surface is defined by providing on the surface a hard mask material; depositing an anti-reflective coating on the hard mask material; applying a photoresist layer on the anti-reflective coating; patterning the photoresist layer, anti-reflective layer and hard mask material; and removing the remaining portions of the photoresist layer and anti-reflective layer; and then patterning the substrate using the hard mask as the mask. Also provided is a structure for defining a pattern in a surface which comprises a surface having a hard mask material thereon; an anti-reflective coating located on the hard mask material; and a photoresist located on the anti-reflective coating. Also provided is an etchant composition for removing the hard mask material which comprises an aqueous composition of HF and chlorine.

A solar cell device and method of making are provided. The device includes a silicon substrate including a preexisting dopant. A homogeneous lightly doped region is formed on a surface of the silicon substrate to form a junction between the preexisting dopant and the lightly doped region. A heavily doped region is selectively implanted on the surface of the silicon substrate. A seed layer is formed over the heavily doped region. A metal contact is formed over the seed layer. The device can include an anti-reflective coating. In one embodiment, the heavily doped region forms a parabolic shape. The heavily doped regions can each be a width on the silicon substrate a distance in the range 50 to 200 microns. Also, the heavily doped regions can be laterally spaced on the silicon substrate a distance in the range 1 to 3 mm from each other. The seed layer can be a silicide. The silicon substrate can include fiducial markers configured for aligning the placement of the heavily doped regions during an ion implantation process.

A composition and process for removing photoresist and/or sacrificial anti-reflective coating (SARC) materials from a substrate having such material(s) thereon. The composition includes a base component, such as a quaternary ammonium base in combination with an alkali or alkaline earth base, or alternatively a strong base in combination with an oxidant. The composition may be utilized in aqueous medium, e.g., with chelator, surfactant, and/or co-solvent species, to achieve high-efficiency removal of photoresist and/or SARC materials in the manufacture of integrated circuitry, without adverse effect on metal species on the substrate, such as copper, aluminum and/or cobalt alloys, and without damage to SiOC-based dielectric materials employed in the semiconductor architecture.

The present invention makes use of geometry of grooves formed in a substrate, to allow a dielectric layer to be deposited with some regions of the grooves having a substantially thinner layer deposited than top surfaces of the substrate. These regions of reduced thickness dielectric within the grooves are then prematurely etched by an appropriate chemical, or other, etchant capable of controllably etching away the dielectric layer, with the result that in these regions the silicon surface can be exposed and plated by a metallization while the top surface remains protected by the dielectric material. The remaining dielectric material can optionally be required to act as an anti-reflective coating. The invention is applicable in making buried contact solar cells.

A multilayer antireflective hard mask structure is disclosed. The structure comprises: (a) a CVD organic layer, wherein the CVD organic layer comprises carbon and hydrogen; and (b) a dielectric layer over the CVD organic layer. The dielectric layer is preferably a silicon oxynitride layer, while the CVD organic layer preferably comprises 70-80% carbon, 10-20% hydrogen and 5-15% nitrogen. Also disclosed are methods of forming and trimming such a multilayer antireflective hard mask structure. Further disclosed are methods of etching a substrate structure using a mask structure that contains a CVD organic layer and optionally has a dielectric layer over the CVD organic layer.

A solar cell includes an improved anti-reflection (AR) coating provided on an incident glass substrate. In certain example embodiments, the AR coating includes a layer comprising porous silica. The porous nature of the silica inclusive layer permits the refractive index (n) of the silica inclusive layer to be reduced, thereby decreasing reflection and permitting more radiation to make its way to the active layer(s) of the solar cell. In certain example embodiments, a coating solution may be formed by mixing a colloidal silica solution and a polymeric silica solution, then applying the coating solution to a substrate and curing the same in order to form an AR coating.

A design and manufacturing method for a photovoltaic (PV) solar cell less than 100 μm thick are disclosed. A porous silicon layer is formed on a wafer substrate. Portions of the PV cell are then formed using diffusion, epitaxy and autodoping from the substrate. All front side processing of the solar cell (junctions, passivation layer, anti-reflective coating, contacts to the N⁺-type layer) is performed while the thin epitaxial layer is attached to the porous layer and substrate. The wafer is then clamped and exfoliated. The back side of the PV cell is completed from the region of the wafer near the exfoliation fracture layer, with subsequent removal of the porous layer, passivation, patterning of contacts, deposition of a conductive coating, and contacts to the P⁺-type layer. During manufacturing, the cell is always supported by either the bulk wafer or a wafer chuck, with no processing of bare thin PV cell

There is provided a coated article (e.g., solar cell) that includes an improved anti-reflection (AR) coating. This AR coating functions to reduce reflection of light from a glass substrate, thereby allowing more light within the solar spectrum to pass through the incident glass substrate. In certain example embodiments, the AR coating is at least partially formed by flame pyrolysis.

Methods are provided for depositing amorphous carbon materials. In one aspect, the invention provides a method for processing a substrate including forming a dielectric material layer on a surface of the substrate, depositing an amorphous carbon layer on the dielectric material layer by introducing a processing gas comprises one or more hydrocarbon compounds and an argon carrier gas, and generating a plasma of the processing gas by applying power from a dual-frequency RF source, etching the amorphous carbon layer to form a patterned amorphous carbon layer, and etching feature definitions in the dielectric material layer corresponding to the patterned amorphous carbon layer. The amorphous carbon layer may act as an etch stop, an anti-reflective coating, or both.

Device structures and methods for fabricating device structures are provided herein. Magnetic random access memory (MRAM) devices described herein may include a film stack comprising a magnetic tunneling junction layer, a dielectric capping layer, an etch stop layer, a conductive hard mask layer, a dielectric hard mask layer, a spin on carbon layer, and an anti-reflective coating layer. The film stack may be etched by one or more selected chemistries to achieve improved film stack sidewall verticality. Memory cells having increasingly uniform and reduced critical dimensions may be fabricated utilizing the methods and devices described herein.

Formation of a solar cell device from upgraded metallurgical grade silicon which has received at least one defect engineering process and including a low contact resistance electrical path. An anti-reflective coating is formed on an emitter layer and back contacts are formed on a back surface of the bulk silicon substrate. This photovoltaic device may be fired to form a back surface field at a temperature sufficiently low to avoid reversal of previous defect engineering processes. The process further forms openings in the anti-reflective coating and a low contact resistance metal layer, such as nickel layer, over the openings in the anti-reflective coating. The process may anneal the low contact resistance metal layer to form n-doped portion and complete an electrically conduct path to the n-doped layer. This low temperature metallization (e.g., <700° C.) supports the use of UMG silicon for the solar device formation without the risk of reversing earlier defect engineering processes.