9619 results about "Indium" patented technology

In electronic displays or imaging units, the control of pixels is achieved by an array of transistors. These transistors are in a thin film form and arranged in a two-dimensional configuration to form switching circuits, driving circuits or even read-out circuits. In this invention, thin film transistors and circuits with indium oxide-based channel layers are provided. These thin film transistors and circuits may be fabricated at low temperatures on various substrates and with high charge carrier mobilities. In addition to conventional rigid substrates, the present thin film transistors and circuits are particularly suited for the fabrication on flexible and transparent substrates for electronic display and imaging applications. Methods for the fabrication of the thin film transistors with indium oxide-based channels are provided.

A yellow Light Emitting Diode (LED) with a peak emission wavelength in the range 560-580 nm is disclosed. The LED is grown on one or more III-nitride-based semipolar planes and an active layer of the LED is composed of indium (In) containing single or multi-quantum well structures. The LED quantum wells have a thickness in the range 2-7 nm. A multi-color LED or white LED comprised of at least one semipolar yellow LED is also disclosed.

A III-V nitride homoepitaxial microelectronic device structure comprising a III-V nitride homoepitaxial epi layer on a III-V nitride material substrate, e.g., of freestanding character. Various processing techniques are described, including a method of forming a III-V nitride homoepitaxial layer on a corresponding III-V nitride material substrate, by depositing the III-V nitride homoepitaxial layer by a VPE process using Group III source material and nitrogen source material under process conditions including V/III ratio in a range of from about 1 to about 105, nitrogen source material partial pressure in a range of from about 1 to about 103 torr, growth temperature in a range of from about 500 to about 1250 degrees Celsius, and growth rate in a range of from about 0.1 to about 500 microns per hour. The III-V nitride homoepitaxial microelectronic device structures are usefully employed in device applications such as UV LEDs, high electron mobility transistors, and the like.

A method of manufacturing improved thin-film solar cells entirely by sputtering includes a high efficiency back contact/reflecting multi-layer containing at least one barrier layer consisting of a transition metal nitride. A copper indium gallium diselenide (Cu(In_XGa_1-x)Se₂) absorber layer (X ranging from 1 to approximately 0.7) is co-sputtered from specially prepared electrically conductive targets using dual cylindrical rotary magnetron technology. The band gap of the absorber layer can be graded by varying the gallium content, and by replacing the gallium partially or totally with aluminum. Alternately the absorber layer is reactively sputtered from metal alloy targets in the presence of hydrogen selenide gas. RF sputtering is used to deposit a non-cadmium containing window layer of ZnS. The top transparent electrode is reactively sputtered aluminum doped ZnO. A unique modular vacuum roll-to-roll sputtering machine is described. The machine is adapted to incorporate dual cylindrical rotary magnetron technology to manufacture the improved solar cell material in a single pass.

A multicolored LED device made of a semipolar material having different indium containing regions provided on different spatial features of GaN material. Other materials such as non-polar materials can also be used.

A semiconductor P-I-N detector including an intrinsic wafer, a P-doped layer, an N-doped layer, and a boundary layer for reducing the diffusion of dopants into the intrinsic wafer. The boundary layer is positioned between one of the doped regions and the intrinsic wafer. The intrinsic wafer can be composed of CdZnTe or CdTe, the P-doped layer can be composed of ZnTe doped with copper, and the N-doped layer can be composed of CdS doped with indium. The boundary layers is formed of an undoped semiconductor material. The boundary layer can be deposited onto the underlying intrinsic wafer. The doped regions are then typically formed by a deposition process or by doping a section of the deposited boundary layer.

A faceted structure is provided that includes a crystalline composition comprising a metal nitride. The metal comprises one or more of aluminum, boron, indium, or gallium. The crystalline composition has at least one exposed surface that is a grain boundary, an etched surface, or a naturally formed facet, and the surface has the same crystallographic orientation of a substrate on which the crystalline composition is grown. A sensor device is provided that includes a faceted structure. Associated methods of making and using the faceted structure in a sensor device are provided.

Described are apparatus and methods for forming films comprise indium and arsenic. In particular, these films may be formed in a configuration of two or more chambers under “load lock” conditions. These films may include additional components as dopants, such as aluminum and/or gallium. Such films can be used in metal/silicon contacts having low contact resistances. Also disclosed are devices including the films comprising indium arsenide.

One exemplary embodiment includes a semiconductor device. The semiconductor device can include a channel including one or more of a metal oxide including zinc-gallium, cadmium-gallium, cadmium-indium.

Disclosed is a semiconductor micro-emitter array for use in a full-color microdisplay. Each pixel includes three vertically-stacked red, green, and blue micro-emitters which minimizes pixel size. The microdisplay may be exclusively based on Group III-nitride semiconductors, with differing indium concentrations in three respective InGaN/GaN active regions for emitting the three RGB colors. Alternatively the microdisplay may be based on hybrid integration of InGaN based III-nitride semiconductors for blue and green emissions, and AlGaInP based (e.g., Group III-V) semiconductors for red emissions.

There is provided an amorphous oxide semiconductor including hydrogen and at least one element of indium (In) and zinc (Zn), the amorphous oxide semiconductor containing one of hydrogen atoms and deuterium atoms of 1×10²⁰ cm⁻³ or more to 1×10²² cm⁻³ or less, and a density of bonds between oxygen and hydrogen except bonds between excess oxygen (O_EX) and hydrogen in the amorphous oxide semiconductor being 1×10¹⁸ cm⁻³ or less.

This invention provides an amorphous oxide semiconductor thin film, which is insoluble in a phosphoric acid-based etching solution and is soluble in an oxalic acid-based etching solution by optimizing the amounts of indium, tin, and zinc, a method of producing the amorphous oxide semiconductor thin film, etc. An image display device (1) comprises a glass substrate (10), a liquid crystal (40) as a light control element, a bottom gate-type thin film transistor (1) for driving the liquid crystal (40), a pixel electrode (30), and an opposing electrode (50). The amorphous oxide semiconductor thin film (2) in the bottom gate-type thin film transistor (1) has a carrier density of less than 10⁺¹⁸ cm⁻³, is insoluble in a phosphoric acid-based etching liquid, and is soluble in an oxalic acid-based etching liquid.

A thin film transistor is provided. The thin film transistor includes an oxide semiconductor layer including a source region, a drain region, and a channel region wherein a portion of the source and drain regions has an oxygen concentration less than the channel region. Further provided is a thin film transistor that includes an oxide semiconductor layer including a source region, a drain region, and a channel region, wherein a portion of the source and drain regions includes a dopant selected from the group consisting of aluminum, boron, gallium, indium, titanium, silicon, germanium, tin, lead, and combinations thereof.

Thin film transistors including an oxide semiconductor containing indium, gallium, and zinc are easily arranged in a matrix over a large substrate and have small characteristic variations. With amplifier circuits and driver circuits of display elements which include the thin film transistors including an oxide semiconductor containing indium, gallium, and zinc with small characteristic variations, intensity distribution of light received by the photodiodes arranged in a matrix is converted into electrical signals with high reproducibility and output, and the display elements arranged in a matrix can be uniformly driven.

Copper indium diselenide, copper indium gallium diselenide, and other IB-IIIA-VIA compounds are produced by the liquid deposition on a substrate of a precursor-containing ink, followed by heating to produce the desired material. The precursor containing ink is a mixture of three parts. The first part is plurality of particulates of metal compounds of IB, IIIA. The second part is chalcogen source of selenium, sulfur, or organic chalcogen compounds dissolved in a liquid organic solvent. The third part solution function as viscosity adjustment, as introduction of dopant of sodium ion and/or as ink stabilizer. The precursor ink can be coated on substrate at room temperature and it can be transferred into copper indium (gallium) chalcogenide semiconductor thin film upon baking and a chalcogenization process. The resulting thin film semiconducting material can be incorporated into photovoltaic and other electronic devices.

A III-nitride optoelectronic device comprising a light emitting diode (LED) or laser diode with a peak emission wavelength longer than 500 nm. The III-nitride device has a dislocation density, originating from interfaces between an indium containing well layer and barrier layers, less than 9×10⁹ cm⁻². The III-nitride device is grown with an interruption time, between growth of the well layer and barrier layers, of more than 1 minute.

The metallic components of a IB-IIIA-VIA photovoltaic cell active layer may be directly coated onto a substrate by using relatively low melting point (e.g., less than about 500° C.) metals such as indium and gallium. Specifically, CI(G)S thin-film solar cells may be fabricated by blending molten group IIIA metals with solid nanoparticles of group IB and (optionally) group IIIA metals. The molten mixture may be coated onto a substrate in the molten state, e.g., using coating techniques such as hot-dipping, hot microgravure and/or air-knife coating. After coating, the substrate may be cooled and the film annealed, e.g., in a sulfur-containing or selenium-containing atmosphere.

In a thin film transistor which uses an oxide semiconductor, buffer layers containing indium, gallium, zinc, oxygen, and nitrogen are provided between the oxide semiconductor layer and the source and drain electrode layers.

The method of manufacturing a light absorbing layer for a solar cell by performing thermal treatment on a specimen configured to include thin films of one or more of copper, indium, and gallium on a substrate and element selenium, includes steps of: (a) heating a wall of a chamber up to a predefined thin film formation temperature in order to maintain a selenium vapor pressure; (b) mounting the specimen and the element selenium on the susceptor at the room temperature and loading the susceptor in the chamber; and (c) heating the specimen in the lower portion of the susceptor and, at the same time, heating the element selenium in the upper portion of the susceptor, wherein, in the step (c), in order for liquefied selenium not to be condensed on the specimen which is loaded at the room temperature and is not yet heated, the temperature of the element selenium and the specimen loaded in the chamber are individually controlled, so that the selenium vapor pressure of an inner space of the chamber does not exceed a saturation vapor pressure corresponding to the temperature of the specimen.