199results about How to "High on/off ratio" patented technology

A method for forming and the structure of a vertical channel of a field effect transistor, a field effect transistor and CMOS circuitry are described incorporating a drain, body and source region on a sidewall of a vertical single crystal semiconductor structure wherein a hetero-junction is formed between the source and body of the transistor, wherein the source region and channel are independently lattice strained with respect the body region and wherein the drain region contains a carbon doped region to prevent the diffusion of dopants (i.e., B and P) into the body. The invention reduces the problem of short channel effects such as drain induced barrier lowering and the leakage current from the source to drain regions via the hetero-junction and while independently permitting lattice strain in the channel region for increased mobility via choice of the semiconductor materials. The problem of scalability of the gate length below 100 nm is overcome by the heterojunction between the source and body regions.

A [1]benzothieno[3,2-b][1]benzothiophene compound expressed by General Formula (I): General Formula (I) where X and Y are each independently a hydrogen atom; a halogen atom; or a functional group having a straight or branched aliphatic alkyl group optionally having a halogen atom, a functional group having an alicyclic alkyl group optionally having a halogen atom, a functional group having a straight or branched aliphatic alkenyl group optionally having a halogen atom, a functional group having an alicyclic alkenyl group optionally having a halogen atom, a functional group having a carboxyl group, or a functional group having a thiol group, as a partial structure; and X and Y are the same or each independently different, provided that at least one of X and Y has a straight or branched aliphatic alkenyl group, an alicyclic alkenyl group, a carboxyl group or a thiol group, as a partial structure.

The invention provides a thin film transistor. The thin film transistor comprises a substrate, a patterned source electrode and a patterned common electrode are deposited on the substrate, and a liner layer covers the source electrode and the common electrode. The side, away from the common electrode, of the source electrode is exposed outside the liner layer to form an exposed part, a drain electrode is deposited on the liner layer and patterned to form a pixel electrode, and the pixel electrode is located on the side of the source electrode. A patterned semiconductor layer, a grid electrode insulation layer and a patterned grid electrode are sequentially deposited on the exposed part and on the side, located on the source electrode, of the substrate respectively so as to form a semiconductor channel with a section of a stepped structure, and the pixel electrode is connected with the source electrode through the semiconductor layer. The invention further provides a preparation method of the thin film transistor and a liquid crystal display panel. Compared with the prior art, the on-off ratio of the thin film transistor is improved, and the aperture opening ratio is also improved. The thin film transistor can be used on a high-resolution panel; the technology process is shortened, and the cost is saved.