Semiconductor device (10, 10b), comprising: a
semiconductor base body (100) having a first main surface (100a) and a second main surface (100b); a first
electrode (4); and a second
electrode (5), wherein the
semiconductor base body (100) comprises: a first
semiconductor layer (2) of a first
conductivity type, which is arranged on the side of the second main surface (100b) of the semiconductor base body (100); a second semiconductor layer (1) of the first
conductivity type, which has a concentration of impurities of the first
conductivity type that is lower than that of the first semiconductor layer (2) and is located closer to the first main surface (100a) than the first semiconductor layer (2); and a third semiconductor layer (3) of a second conductivity type, which is located closer to the first main surface (100a) than the second semiconductor layer (1), wherein the first semiconductor layer (2) is electrically connected to the second
electrode (5) in the second main surface (100b), wherein the third semiconductor layer (3) is electrically connected to the first electrode (4) in the first main surface (100a), wherein a defect concentration distribution of the third semiconductor layer (3) with respect to a thickness direction of the semiconductor base body (100) exhibits a plurality of peak values, wherein a thickness W of the third semiconductor layer (3), a thickness W N- the second semiconductor layer (1), the elementary charge q, a
relative permittivity ε s of the semiconductor material of the semiconductor base body (100), the vacuum
permittivity ε0, a nominal
voltage V r , a nominal
current density J r , a
charge carrier lifetime τ of a
charge carrier of the second conductivity type in the second semiconductor layer (1), a dosage amount D A the third semiconductor layer (3), a mean
charge carrier concentration n Avg , an
electric charge density N' D , and α(τ), which is given below as Formula 2 and which represents a ratio between an average charge carrier concentration of the second semiconductor layer (1) in a one-state of the
semiconductor device (10, 10b) and an electrical charge concentration in a depletion layer around a boundary of the second semiconductor layer (1) and the third semiconductor layer (3) in the middle of the second semiconductor layer (1) during a
recovery process of the
semiconductor device (10, 10b), where α(τ) is a factor of proportionality and is represented by the following Formula 1, N ' D = α ( τ ) n A vg fulfill the following formula 3: α ( τ ) = 4.15 ( I n ( 2.58 τ + 1 ) ) 4.77 + 225 W > 1.6 ε s ε 0 V rq DA − 2 q WN − DA 2.5 α ( τ ) J r τ