Semiconductor device and method for manufacturing the same

Inactive Publication Date: 2011-06-30
SEMICON ENERGY LAB CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0017]In order to achieve high-speed operation, low power consumption, cost redu

Problems solved by technology

In the case where a transistor is miniaturized, a short-channel effect becomes a major problem.
Therefore, a probl

Method used

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  • Semiconductor device and method for manufacturing the same
  • Semiconductor device and method for manufacturing the same
  • Semiconductor device and method for manufacturing the same

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embodiment 1

[0057]In this embodiment, a structure of a semiconductor device according to one embodiment of the disclosed invention will be described with reference to FIGS. 1A to 1D. Note that although a top-gate transistor is described as an example, the structure of a transistor is not limited to a top-gate structure.

[0058]FIG. 1A illustrates an example of a structure of a semiconductor device. A transistor 250 includes an oxide semiconductor layer 206a provided over a substrate 200; a source or drain electrode 208a and a source or drain electrode 208b electrically connected to the oxide semiconductor layer 206a; a gate insulating layer 212 provided so as to cover the oxide semiconductor layer 206a, the source or drain electrode 208a, and the source or drain electrode 208b; and a gate electrode 214 provided over the gate insulating layer 212 so as to overlap with the oxide semiconductor layer 206a. An interlayer insulating layer 216 and an interlayer insulating layer 218 are provided so as to...

embodiment 2

[0081]In this embodiment, a method for manufacturing a semiconductor device including an oxide semiconductor (especially, an amorphous structure) will be described. Specifically, a method for manufacturing the semiconductor device in FIG. 1A will be described with reference to FIGS. 2A to 2E. Note that although a top-gate transistor is described as an example, the structure of a transistor is not limited to a top-gate structure.

[0082]First, the insulating layer 202 is formed over the substrate 200. After that, an oxide semiconductor layer 206 is formed over the insulating layer 202 (see FIG. 2A).

[0083]As the substrate 200, for example, a glass substrate can be used. As the substrate 200, an insulating substrate formed using an insulator such as a ceramic substrate, a quartz substrate, or a sapphire substrate, a semiconductor substrate which is formed using a semiconductor material such as silicon and whose surface is covered with an insulating material, a conductive substrate which ...

embodiment 3

[0134]In this embodiment, a method for manufacturing a semiconductor device including an oxide semiconductor will be described with reference to FIGS. 3A to 3E. In this embodiment, a method for manufacturing a semiconductor device in which a first oxide semiconductor layer having a crystal region and a second oxide semiconductor layer which is formed by crystal growth from the crystal region of the first oxide semiconductor layer are used as an oxide semiconductor layer, that is, a method for manufacturing the semiconductor device illustrated in FIG. 1B will be described in detail. In the case where a required thickness can be ensured by only the first oxide semiconductor layer, the second oxide semiconductor layer is unnecessary. Note that although a top-gate transistor is described as an example, the structure of a transistor is not limited to a top-gate structure.

[0135]First, the insulating layer 302 is formed over the substrate 300. Then, a first oxide semiconductor layer is for...

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PUM

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Abstract

A semiconductor device which includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode, and the drain electrode, and a gate electrode over the gate insulating layer is provided. The thickness of the oxide semiconductor layer is greater than or equal to 1 nm and less than or equal to 10 nm. The gate insulating layer satisfies a relation where εr/d is greater than or equal to 0.08 (nm−1) and less than or equal to 7.9 (nm−1) when the relative permittivity of a material used for the gate insulating layer is εr and the thickness of the gate insulating layer is d. The distance between the source electrode and the drain electrode is greater than or equal to 10 nm and less than or equal to 1 μm.

Description

TECHNICAL FIELD[0001]The technical field of the present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. Note that semiconductor devices herein refer to general elements and devices which function by utilizing semiconductor characteristics.BACKGROUND ART[0002]There are a wide variety of metal oxides, which are used for various applications. Indium oxide is a well-known material and is used as a material for transparent electrodes which are needed for liquid crystal display devices or the like.[0003]Some metal oxides have semiconductor characteristics. Examples of such metal oxides having semiconductor characteristics include tungsten oxide, tin oxide, indium oxide, zinc oxide, and the like. A thin film transistor in which a channel formation region is formed using such a metal oxide is already known (for example, see Patent Documents 1 to 4, Non-Patent Document 1, and the like).[0004]Not only single-component oxides but also multi-...

Claims

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Application Information

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IPC IPC(8): H01L29/12H01L21/336
CPCH01L29/42384H01L29/4908H01L29/66477H01L29/78696H01L29/7869H01L29/66742H01L29/45H01L29/1033
Inventor YAMAZAKI, SHUNPEIGODO, HIROMICHIKAWAE, DAISUKE
Owner SEMICON ENERGY LAB CO LTD
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