Semiconductor device and method for manufacturing the same

Abstract

A semiconductor device which includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode, and the drain electrode, and a gate electrode over the gate insulating layer is provided. The thickness of the oxide semiconductor layer is greater than or equal to 1 nm and less than or equal to 10 nm. The gate insulating layer satisfies a relation where εr / d is greater than or equal to 0.08 (nm−1) and less than or equal to 7.9 (nm−1) when the relative permittivity of a material used for the gate insulating layer is εr and the thickness of the gate insulating layer is d. The distance between the source electrode and the drain electrode is greater than or equal to 10 nm and less than or equal to 1 μm.

Description

TECHNICAL FIELD[0001]The technical field of the present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. Note that semiconductor devices herein refer to general elements and devices which function by utilizing semiconductor characteristics.BACKGROUND ART[0002]There are a wide variety of metal oxides, which are used for various applications. Indium oxide is a well-known material and is used as a material for transparent electrodes which are needed for liquid crystal display devices or the like.[0003]Some metal oxides have semiconductor characteristics. Examples of such metal oxides having semiconductor characteristics include tungsten oxide, tin oxide, indium oxide, zinc oxide, and the like. A thin film transistor in which a channel formation region is formed using such a metal oxide is already known (for example, see Patent Documents 1 to 4, Non-Patent Document 1, and the like).[0004]Not only single-component oxides but also multi-...

AI Technical Summary

Benefits of technology

[0059]In the transistor 250, the oxide semiconductor layer 206a has an amorphous structure. The channel length (L) of the transistor 250 is set to greater than or equal to 10 nm and less than or equal to 1000 nm, preferably greater than or equal to 10 nm and less than or equal to 70 nm. This is because advantageous effects such as high-speed operation and low power consumption can be obtained when the channel length of the transistor is shortened. The thickness (tos) of the oxide semiconductor layer 206a is set to greater than or equal to 1 nm and less than or equal to 50 nm, preferably greater than or equal to 1 nm and less than or equal to 30 nm, more preferably greater than or equal to 1 nm and less than or equal to 10 nm (for example, greater than or equal to 3 nm and less than or equal to 10 nm). This is because a short-channel effect due to miniaturization can be suppressed when the oxide semiconductor layer 206a having such a thickness is used.

[0060]The thickness (tox) of the gate insulating layer 212 may be set to such a thickness as satisfies a relation where εr / d is greater than or equal to 0.08 (nm−1) and less than or equal to 7.9 (nm−1), preferably greater than or equal to 0.26 (nm−1) and less than or equal to 7.9 (nm−1), more preferably greater than or equal to 1.3 (nm−1) and less than or equal to 7.9 (nm−1) when the relative permittivity of a material used for the gate insulating layer 212 is εr and the thickness of the gate insulating layer 212 is d. When the above relation is satisfied, operation of the transistor can be sufficiently ensured.

[0061]For example, in the case where the gate insulating layer 212 is formed using silicon oxide (the relative permittivity is assumed to be about 3.9), the thickness of the gate insulating layer 212 can be set to greater than or equal to 0.5 nm and less than or equal to 50 nm, preferably greater than or equal to 0.5 nm and less than or equal to 15 nm, more preferably greater than or equal to 0.5 nm and less than or equal to 3 nm.

[0062]Note that as the material for the gate insulating layer 212, a material with a high dielectric constant (a high-k material) such as hafnium oxide or tantalum oxide is preferably used. With the use of such a material, the above relation can be satisfied even when the thickness of the gate insulating layer 212 is sufficiently ensured, and gate leakage can be suppressed without sacrificing the operation of the transistor.

[0063]FIG. 1B illustrates a modification example of the semiconductor device in FIG. 1A. A transistor 350 includes a first oxide semiconductor layer 304a and a second oxide semiconductor layer 306a provided over a substrate 300; a source or drain electrode 308a and a source or drain electrode 308b electrically connected to the first oxide semiconductor layer 304a and the second oxide semiconductor layer 306a; a gate insulating layer 312 provided so as to cover the second oxide semiconductor layer 306a, the source or drain electrode 308a, and the source or drain electrode 308b; and a gate electrode 314 provided over the gate insulating layer 312 so as to overlap with the second oxide semiconductor layer 306a. An interlayer insulating layer 316 and an interlayer insulating layer 318 are provided so as to cover the transistor 350. Note that an insulating layer 302 serving as a base may be provided between the substrate 300 and the first oxide semiconductor layer 304a.

[0064]The structure illustrated in FIG. 1B and the structure illustrated in FIG. 1A are different from each other in crystallinity of the oxide semiconductor layer. The crystallinity of the oxide semiconductor layer 206a in FIG. 1A is amorphous, whereas the first oxide semiconductor layer 304a and the second oxide semiconductor layer 306a in FIG. 1B each have a structure in which a crystal region is provided. The crystal region has an a-b plane which is substantially parallel to a surface of the oxide semiconductor layer, and includes a crystal which is c-axis-aligned in a direction substantially perpendicular to the surface in some cases. Here, a “substantially parallel direction” means a direction within ±10° from a parallel direction, and a “substantially perpendicular direction” means a direction within ±10° from a perpendicular direction.

Problems solved by technology

In the case where a transistor is miniaturized, a short-channel effect becomes a major problem.

Therefore, a problem which has not been so far caused in the case of a transistor including a material such as silicon might arise.

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