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High-voltage mos device and testing method thereof

The application discloses a high-voltage MOS device, and relates to the technical field of semiconductors, comprising a substrate layer, a first epitaxial layer is stacked on the top of the substrate layer, a second epitaxial layer is stacked on the top of the first epitaxial layer, a gate metal is arranged on the second epitaxial layer, the gate metal is wrapped with a contact metal layer outside, the contact metal layer comprises a contact section in contact with the second epitaxial layer, a source metal is arranged on the top of the contact section, and a drain metal is arranged on the bottom of the substrate layer; wherein a first insulating silicon section is arranged between the first epitaxial layer and the substrate layer and located on the left side, a second insulating silicon section is arranged between the first epitaxial layer and the substrate layer and located on the right side, and a gap section is formed between the first insulating silicon section and the second insulating silicon section; a third insulating silicon section is arranged between the second epitaxial layer and the first epitaxial layer and opposite to the gap section; and a testing method of the high-voltage MOS device is also disclosed. The application has the advantages of safety and stability, high reliability and strong anti-single-particle radiation capacity.
Owner:SOLOW SEMICON (SHENZHEN) CO LTD