370 results about "Contact formation" patented technology

A semiconductor device includes a stacked transistor structure having field effect transistors on two levels. The two levels include a top side and a bottom side. Active regions are disposed on the bottom side including a leveled surface facing the top side and a faceted backside surface opposite the leveled surface. The leveled surface includes two different semiconductor materials. A backside contact in contact with the faceted backside surface forms a wraparound contact to reduce contact resistance.

Provided are metal silicide contact forming processes including providing a substrate having a bottom crystalline silicon and di-electric sidewalls. This may be followed by metal layer deposition to form metal layer selectively on the bottom crystalline silicon using a metal halide precursor and a reducing agent. A ratio of a reducing agent flow rate to a metal halide precursor flow rate is at least 10:1, or 10:1-10,000:1. After the metal layer deposition, the substrate is annealed to convert the metal layer to a metal silicide layer without any substrate contamination.

Embodiments of present invention provide a semiconductor structure. The semiconductor structure includes a trench isolation between a first source / drain region of a first transistor and a second source / drain region of a second transistor, wherein the trench isolation includes an upper portion and a lower portion; the lower portion has a first lower sidewall and a second lower sidewall that intersects with the first lower sidewall to form a pointy bottom of the trench isolation; a first lower conformal liner at the first lower sidewall and a second lower conformal liner at the second lower sidewall; and the first and second lower conformal liners pinch off at the pointy bottom. A method of forming the same is also provided.

The invention discloses a high-quality alloy welding wire preparation device, and belongs to the technical field of alloy welding wires, the high-quality alloy welding wire preparation device comprises a base, a moving structure is arranged at the center of the upper end face of the base, an operation table is arranged at the center of the upper end face of a connecting block, and a connecting structure is arranged at the center of the upper end face of the operation table; three auxiliary structures are transversely arranged at the center of the upper end face of the operation table, cutting structures are arranged at the positions, close to the front portions, of the centers of the two side walls of the operation table, and positioning structures are arranged at the centers of the upper end faces of the two first sliding blocks. The clamping device is simple in structure and convenient to operate, prevents deviation from affecting machining precision, achieves reliable fixing of the alloy welding wire, makes contact with the surface of the welding wire to form an upper-layer guide structure and a lower-layer guide structure, ensures that the welding wire keeps linear motion in the clamping and machining process, effectively avoids the problems of cutting errors and the like caused by deviation, and improves welding wire machining precision and stability.

The utility model relates to a bidirectional pressure-bearing low-temperature sealing structure. The sealing structure comprises a sealing ring, an upper coating layer, a lower coating layer, an upper flange and a lower flange. The sealing ring main body is annular, the cross section of the sealing ring main body is H-shaped, the upper coating layer and the lower coating layer are sleeved on the outer surface of the sealing ring, and the sealing ring, the upper coating layer and the lower coating layer are arranged between the upper flange and the lower flange. According to the two-way pressure-bearing low-temperature sealing structure, the upper wrapping layer and the lower wrapping layer are pressed through elastic deformation of the sealing ring after installation and pressure bearing, the wrapping layers make contact with the flange to form an inner sealing face and an outer sealing face, the two-way pressure-bearing low-temperature sealing structure is suitable for two-way pressure-bearing sealing in a low-temperature medium, the sealing effect is ensured, and the good engineering application prospect is achieved.

The invention provides an LDMOS (Laterally Diffused Metal Oxide Semiconductor) device and a preparation method thereof. The LDMOS device comprises a semiconductor substrate; the first well region and the second well region are arranged in the semiconductor substrate, and the first well region and the second well region are arranged adjacently; the body region is arranged in the second well region; the source region is arranged in the body region; the body extraction region and the Schottky region are arranged in the body region and are adjacent to the source region, a metal layer is formed on the Schottky region, and the Schottky region is in contact with the metal layer to form a Schottky diode; the drain region is arranged in the first well region; and the gate structure is formed on the surface of the semiconductor substrate. According to the invention, the device has a lower ESD trigger voltage in an ESD event, and the ESD protection capability of the device is greatly improved.

The invention provides a red copper connector and a diffusion welding method thereof, and relates to the technical field of metal welding, the diffusion welding method of the red copper connector comprises the following steps: taking a red copper base material, and performing nanocrystallization treatment on one side surface of the red copper base material through an ion impact method to form a welding surface; the annealed copper middle layer is placed between the two pieces of red copper base metal, the annealed copper middle layer makes contact with the welding face, and a connector to be welded is formed; and the connector to be welded is welded through a pulse current auxiliary diffusion welding method, the red copper connector is obtained, the welding temperature of the pulse current auxiliary diffusion welding method is 300 + / -5 DEG C, the pressure is 18-22 MPa, and the heat preservation time is 25-35 min. And low-temperature, rapid and small-deformation reliable connection of the red copper base metal is achieved.

A preparation method of an SOFC or SOEC with a long-life sealing interface is formed by allowing a sealing layer, a cell and a metal interconnector to be mutually contacted. In the present disclosure, with spinel as a coating material of the metal interconnector, staged thermal treatment is employed to form a high-density and strong-adhesion spinel coating to improve the endurance and entire performance of the metal interconnector. The present disclosure also optimizes the material system of the sealing layer, namely, uses the SiO2—MgO—Al2O3—SrO—V2O5 system to prepare the sealing layer, which not only improves the resistivity of the sealing layer but also increases its hardness and fracture strength. Further, under the condition of ensuring the airtightness, the coefficient of thermal expansion of the sealing layer is matched with the coefficients of thermal expansion of the metal interconnector and the cell, improving the endurance of the sealing interface.

Methods for fabricating a transistor arrangement of an IC structure by using a placeholder for backside contact formation, as well as related semiconductor devices, are disclosed. An example method includes forming, in a support structure (e.g., a substrate, a chip, or a wafer), a dielectric placeholder for a backside contact as the first step in the method. A nanosheet superlattice is then grown laterally over the dielectric placeholder, and a stack of nanoribbons is formed based on the superlattice. The nanoribbons are processed to form S / D regions and gate stacks for future transistors. The dielectric placeholder remains in place until the support structure is transferred to a carrier wafer, at which point the dielectric placeholder is replaced with the backside contact. Use of a placeholder for backside contact formation allows alignment of contact from the backside to appropriate device ports of a transistor arrangement.

A semiconductor IC structure includes an upper transistor and lower transistor each with respective source / drain (S / D) regions. The upper S / D region includes a S / D cut sidewall. A first frontside contact is in contact with the upper S / D region and includes a first conductive portion with a first cut sidewall that is substantially coplanar with the S / D cut sidewall. A second frontside contact is in contact with the lower S / D region and includes a second conductive portion with a second cut sidewall. A contact cut region may be between the first and second frontside contacts. This structure may be fabricated at least in part by forming a monolithic frontside contact against the lower S / D region and against the upper S / D region and simultaneously separating the monolithic frontside contact into the first frontside contact and the second frontside contact while removing a portion of the upper S / D region.

Described are safer coin cells and materials having improved cold formability for making a contact for the coin cell. A titanium-based material can be used that has ≥ 95 wt.% titanium, ≤0.5 wt.% iron, ≤0.5 wt.% oxygen, ≤0.5 wt.% carbon, ≤0.5 wt.% nitrogen, and ≤0.5 wt.% hydrogen. A contact made from such material is resistant to reactions that form hydroxides in contact with bodily fluids, such as after ingestion. The titanium-based material has improved cold formability at room temperature, which reduces or eliminates microcracking during formation of the contact. Reduced or eliminated microcracking reduced or eliminated alkalizing reactions that would otherwise occur with conventional coin cells when in contact with bodily fluids.

The present invention provides a display device and a method for manufacturing a display device, which prevent the adhesive layer from overflowing at the outer periphery of the display cell by controlling the amount of transparent optical adhesive that constitutes the adhesive layer formed between the cover plate and the display cell. [Solution] A glass cover plate 20 and an elastomer frame member 10 are formed in close contact using a glass insert in-mold method. A weir portion 14 is formed protruding from the inner surface 14 of the frame member 10, and a weir end surface 14a is formed at the boundary with the inner surface 23 of the cover plate 20. The transparent optical adhesive applied to the inner surface 23 of the cover plate 20 can be blocked by the weir end surface 14a, preventing the adhesive layer 60a from overflowing into area (ii) in order to bond the display cell 30.

A semiconductor device is provided. The semiconductor device includes first transistors positioned over a substrate and arranged along a first row in a first direction substantially parallel to a working surface of the substrate. Second transistors are positioned over the substrate and arranged along a second row in the first direction. Each first transistor is aligned with a respective second transistor in a second direction substantially parallel to the working surface of the substrate. An isolation wall structure is positioned between the first transistors and the second transistors.

Backside and frontside contact structures wrapping around source / drain regions provide increased contact areas for electrical connections and allow increased silicide areas. Sidewall metallization of epitaxially grown source / drain regions provides source / drain sidewall contacts that enable wrap-around contact formation on both the front side and the back side of a semiconductor device layer. Front side and back side contact metallization over the source / drain sidewall contacts allows wrap-around contact structures on both sides of the device layer.

A semiconductor rectifier device includes: an epitaxial layer, having a top surface and a bottom surface; a first doped region having a first conductivity type, located in the epitaxial layer; a first trench structure, located in the first doped region; a second trench structure adjacent to the first trench structure, located in the first doped region; a second doped region having a second conductivity type, located in the epitaxial layer between the first trench structure and the second trench structure, wherein a depth of the second doped region is less than a depth of the first trench structure; and a metal layer, located on the top surface of the epitaxial layer, covering the first trench structure, the second trench structure, and the second doped region, wherein the metal layer is in contact with the top surface, forming a Schottky interface.

The utility model provides a photovoltaic module ground -connection frame with puncture function relates to photovoltaic support technical field, including frame and puncture subassembly. This photovoltaic module ground -connection frame with puncture function fixes puncture subassembly in the side of frame, makes the sharp of moving plate aim at the contact area of photovoltaic support, ensures that the sharp and support surface preliminary contact. Spring exerts the thrust along the spring axis direction to moving plate because of precompression state, and the sharp punctures the oxide film on the surface of support and contacts with aluminium alloy base material along the vertical groove of outer frame and is pushed to the support direction sliding, and forms the conductive path. With the lapse of time, the aluminium alloy base material of support contact point reacts with air, and when the oxide film is regenerated, the moving plate is manually pushed to slide, the sharp cuts the newly generated oxide film again, maintains the conductive state of contact point, avoids the contact interruption, realizes the continuous puncture of oxide film, ensures that the ground -connection path is long -term stable.

The invention relates to the field of connectors, in particular to a high-speed transmission I / O connector which comprises U-shaped conductive terminals arranged in an array mode, a holder and a packaging shell, the U-shaped conductive terminals are packaged on the inner side of the holder, the two ends of each U-shaped conductive terminal are each provided with a V-shaped elastic contact part, the two V-shaped elastic contact parts correspond to each other, and the U-shaped conductive terminals are arranged in the packaging shell. The high-speed transmission I / O connector is characterized in that a U-shaped conductive terminal is arranged in the holding frame, a wiring part is arranged at the bent position of the U-shaped conductive terminal, the packaging shell comprises a front insertion part and a rear main body part, the rear main body part is packaged on the outer side of the holding frame, and according to the high-speed transmission I / O connector, on one hand, a rubber block on the inner side of a V-shaped elastic contact part is tightly attached to the connecting position of an insertion groove and a containing groove to form a first plug; and on the other hand, the first arc-shaped surface of the V-shaped elastic contact part is in close contact with the second arc-shaped surface of the accommodating groove to form second blocking, so that dust and impurities can be effectively prevented from entering the accommodating groove through double protection, poor contact of the V-shaped elastic contact part caused by accumulation of foreign matters is avoided, and stable contact performance in long-term use is guaranteed.

The present invention relates to the field of electronic manufacturing production, specifically a device for taking and placing integrated circuit chips, including a workbench, on which a placement table and a take and place table are respectively arranged from back to front, and a movable seat is arranged at the rear end of the workbench. The present invention sets a cleaning component, and the cleaning disk, dust extraction ring, high-pressure exhaust pipe and other structures in the cleaning component work together to quickly clean up impurities on the surface of the chip before the suction nozzle rod adsorbs the chip. The high-pressure exhaust pipe in the annular array cooperates with the dust extraction groove at the bottom to fully cover the chip surface, ensuring that as many impurities as possible are sucked away, and the sealing gasket under the cleaning disk contacts the surface of the chip table to form a sealed space. When the total exhaust disk generates negative pressure, a local negative pressure environment is formed, which enhances the concentration of airflow and makes impurities on the chip surface more quickly sucked into the dust extraction groove, further improving the efficiency of cleaning impurities and reducing the risk of impurities clogging the suction nozzle pores.

Disclosed herein are approaches for forming a dynamic random-access memory device (DRAM). One DRAM device may include plurality of pillars extending from a base layer, and a spacer layer formed along just a lower portion of each of the plurality of pillars. The DRAM further includes a body contact and a cap between the plurality of pillars, wherein the body contact is formed over the spacer layer, and a gate formed around the plurality of pillars. The DRAM further includes a bottom source / drain formed in the base layer and a top source / drain formed in each pillar of the plurality of pillars, wherein the top source / drain extends above the gate.

Methods, systems, and devices for divider and contact formation for memory cells are described. In some examples, a protective mask (e.g., a photoresist layer) may be formed over existing circuit structures above a substrate. Contact structures may be exposed when the protective mask is removed. In some examples, the protective mask may be removed using a dry etching operation. In some examples, one or more additional etching operations may be performed to expose (and subsequently fabricate) additional circuit structures.

The invention relates to a gelatin polymer molecular brush, a surface treatment liquid and an application of the surface treatment liquid in a semiconductor device. The gelatin polymer molecular brush has a structure as shown in a structural formula (I) or (II) or a product obtained after oxidation, coordination and crosslinking of a catechol group of the gelatin polymer molecular brush. The method for processing the surface treatment liquid in the semiconductor device comprises the following specific steps: contacting the surface treatment liquid with the surface of a first material to form a thin film, and bonding the thin film with a second material; wherein the contact method is spraying or dipping, and the first material and the second material are respectively selected from an inorganic material and / or a resin material. The gelatin polymer molecular brush provided by the invention can be used as a main component of a surface treatment liquid for bonding materials, so that the peeling strength between the materials can be ensured and the bonding force and the heat resistance can be improved under the condition of not carrying out browning treatment on the materials, and the gelatin polymer molecular brush can be applied to manufacturing of semiconductor devices, especially multilayer PCBs (Printed Circuit Boards).

Methods, systems, and apparatuses for one step formation of ohmic contacts and Schottky contacts for SiC power devices by using laser annealing are provided. An SiC power device may include a back-side ohmic contact, a n+ substrate, a n- epitaxial layer, one or more p+ regions, one or more carbon layers, one or more ohmic contacts, and a Schottky contact. The one or more ohmic contacts and Schottky contact may be formed in a one step operation that may include laser annealing. During manufacturing, a metallization layer applied above the carbon layers and n-epitaxial layer may form the ohmic contacts and Schottky contacts when the annealing is performed.

Methods of forming an integrated circuit devices may include providing first and second active regions, an isolation layer, and first and second sacrificial stack structures. The first and second sacrificial stack structures may contact the first and second active regions, and the first and second sacrificial stack structures may each include a channel layer and a sacrificial layer. The methods may also include forming an etch stop layer on the isolation layer, replacing portions of the first and second sacrificial stack structures with first and second source / drain regions, forming a front contact including a front contact plug, forming a back-side insulator, and forming a back contact plug in the isolation layer and the back-side insulator. At least one of a portion of the front contact plug and a portion of the back contact plug may be in the etch stop layer.

This thermal fuse for high voltage direct currents comprises a small contact point forming member disposed between a contact part of a fixed terminal and a contact part of a movable terminal and having a plurality of small contact points formed on a contact portion of a contact part facing a contact part of a terminal requiring contact point formation, wherein the small contact point forming member is configured to, when the movable terminal enters in the direction of the fixed terminal, make divided contact with the contact portion of the facing terminal through the small contact points formed at the contact portion of the contact part, and conduct currents between the contact part of the fixed terminal and the contact part of the movable terminal through the small contact points in divided contact, and to, when the movable terminal moves in the opposite direction of the fixed terminal, make the contact part of the fixed terminal and the contact part of the movable terminal disconnected through individual disconnection of the small contact points in contact with the contact part.

The utility model relates to the field of pipe fitting processing equipment, in particular to an anti-chip chamfering cutter, which comprises a cutter handle, a cutter head and three blade groups detachably mounted on the cutter head, and further comprises an anti-chip component, and the blade groups comprise an inner angle chamfering cutter, an outer angle chamfering cutter and a flat end face cutter. The chip prevention assembly comprises a mounting frame coaxially mounted at the front end of the tool bit and a plurality of sets of cleaning mechanisms distributed in the mounting frame in a circumferential array mode and arranged in the radial direction of the tool bit in a sliding mode. The multiple sets of cleaning mechanisms move outwards under the action of centrifugal force and make contact with the inner wall of the pipe fitting to form a blocking layer for preventing flying chips from entering the pipe fitting, and the technical problem that in the prior art, during chamfering, waste chips splash into the pipe fitting is solved.

The invention discloses a die and equipment for window hole punching forming of a pipe material clamping bearing retainer. The die comprises a rigid outer ring and an elastic inner ring. A ring-width-adjustable clamping interval is formed between the rigid outer ring and the elastic inner ring, a first annular boss is arranged on the outer wall of the elastic inner ring, a limiting step is machined on the inner wall of the rigid outer ring, and the elastic inner ring has a first working state and a second working state. The ring width size of the clamping section is larger than the wall thickness of the tubular blank with the second annular boss on the inner wall, so that the tubular blank can be conveniently placed into the clamping section; in the second working state, the top face of the first annular boss and the side face of the limiting step abut against the inner surface and the outer surface of the tubular blank correspondingly, the bottom face of the second annular boss of the tubular blank is tightly attached to the bottom face of the first annular boss of the elastic inner ring, and meanwhile the end face of the tubular blank is tightly contacted with the step limiting end face of the rigid outer ring; axial double limiting on the tubular blank is formed, and clamping stability is guaranteed.

To stabilize binding processing to a recording material bundle compared with a case where a guide part for guiding an interlock part interlocked with a tooth is not provided.SOLUTION: A hole part 93 extending along a linear path 4Y is provided on an interlock part 600 side interlocked with a second binding tooth 72. Further, a rod-like member 640 inserted into the hole part 93 and extending along the linear path 4Y is provided on a lower support member 700 side. The rod-like member 640 is fixed to the lower support member 700. An outer peripheral surface of the rod-like member 640 serves as a guide part 90, and the interlock part 600 is guided by using the outer peripheral surface. A to-be-guided part is constituted by an inner surface of the hole part 93 extending along a movement direction of the interlock part 600. The guide part is constituted by the rod-like member 640 extending along the movement direction of the interlock part 600 and brought into contact with the inner surface of the hole part 93.SELECTED DRAWING: Figure 6

A semiconductor structure is presented including source / drain (S / D) epitaxial growth formed over a bottom dielectric isolation region, at least one first semiconductor layer disposed within the S / D ep

The present disclosure relates to an electroplating system including a first contact detection sensor and a second contact detection sensor disposed at a surface of a cone of the electroplating system. The first contact detection sensor detects a first resistance at a first contact between a substrate to be plated by the electroplating system and a first contact pin, the second contact detection sensor detects a second resistance at a second contact between the substrate and a second contact pin. A controller receives the first resistance and the second resistance, and determines the first contact and the second contact are not properly formed when a difference between the first resistance and the second resistance is not within a first predetermined resistance range, or the first resistance or the second resistance is not within a second predetermined resistance range.