781 results about "Contact formation" patented technology

Methods of wiring to a transistor and a related transistor are disclosed. In one embodiment, the method includes a method of forming wiring to a transistor, the method comprising: forming a transistor on a semiconductor-on-insulator (SOI) substrate using masks that are mirror images of an intended layout, the forming including forming a gate and a source / drain region for each and a channel, the SOI substrate including a semiconductor-on-insulator (SOI) layer, a buried insulator layer and a silicon substrate; forming a dielectric layer over the transistor; bonding the dielectric layer to another substrate; removing the silicon substrate from the SOI substrate to the buried insulator layer; forming a contact to each of the source / drain region and the gate from a channel side of the gate; and forming at least one wiring to the contacts on the channel side of the gate.

A storage device is provided with a sliding lid slidably contacting guide rails formed at both side ends of an opening of the storage device, and when the sliding lid is stored in an accommodating section formed continuously to a rear end of the opening, the sliding lid opens at the storage device. In the storage device, in sliding sections where the guide rails and sliding lid slidably contact each other, there are formed buffer sections for allowing the sliding lid to be displaced toward a direction orthogonal to a sliding direction. Therefore, the buffer sections are deformed during the opening and covering movements, so a play can be eliminated.

The present invention provides a low-resistance magnetoresistive element of a spin-injection write type. A crystallization promoting layer that promotes crystallization is formed in contact with an interfacial magnetic layer having an amorphous structure, so that crystallization is promoted from the side of a tunnel barrier layer, and the interface between the tunnel barrier layer and the interfacial magnetic layer is adjusted. With this arrangement, it is possible to form a magnetoresistive element that has a low resistance so as to obtain a desired current value, and has a high TMR ratio.

A pressure regulating reservoir is structured such that a major diameter portion of a shaft contacts a bottom surface of a valve seat, whereas a top surface of a piston does not contact an upper end surface of a wall forming a reservoir chamber in a housing. Therefore, a lift amount of a ball valve can be set using a portion above the major diameter portion of the shaft that contacts the bottom surface of the valve seat. That is, the lift amount can be set using only a dimension in the axial direction of a minor diameter portion of the shaft.

A method for forming a CMOS device in a manner so as to avoid dielectric layer undercut during a pre-silicide cleaning step is described. During formation of CMOS device comprising a gate stack on a semiconductor substrate surface, the patterned gate stack including gate dielectric below a conductor with vertical sidewalls, a dielectric layer is formed thereover and over the substrate surfaces. Respective nitride spacer elements overlying the dielectric layer are formed at each vertical sidewall. The dielectric layer on the substrate surface is removed using an etch process such that a portion of the dielectric layer underlying each spacer remains. Then, a nitride layer is deposited over the entire sample (the gate stack, the spacer elements at each gate sidewall, and substrate surfaces) and subsequently removed by an etch process such that only a portion of said nitride film (the “plug”) remains. The plug seals and encapsulates the dielectric layer underlying each said spacer, thus preventing the dielectric material from being undercut during the subsequent pre-silicide clean process. By preventing undercut, this invention also prevents the etch-stop film (deposited prior to contact formation) from coming into contact with the gate oxide. Thus, the integration of thin-spacer transistor geometries, which are required for improving transistor drive current, is enabled.