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706 results about "Active devices" patented technology

Integration of stacked logic device with passive device

Embodiments of present invention provide a semiconductor structure. The structure includes an active device region and a passive device region, the active device region and the passive device region being separated by a single diffusion break, where the passive device region includes a first passive device. The first passive device includes a first diffusion region and a second diffusion region, the first and the second diffusion region being vertically connected by a lightly doped region, where the first diffusion region is connected to a backside power distribution network through a first direct backside contact (BSCA) and the second diffusion region is connected to a back-end-of-line (BEOL) structure through a first middle-of-line contact. A method of forming the same is also provided.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

Systems and methods for providing dynamic security fabric interposers in heterogeneously integrated systems

A system may include an integrated circuit (IC) package. The IC package may include one or more IC die hosting one or more circuits, and an interposer. The interposer may be coupled to the one or more IC die via an interconnection layer. The interposer may include one or more electrically active devices configured to provide one or more security functions to secure the one or more circuits. The interposer may be coupled to a backside power of the IC package. In some embodiments, the backside power of the IC package may include one or more backside power delivery networks.
Owner:THE CHARLES STARK DRAPER LABORATORY INC

Packaging antenna based on three-dimensional stacking technology and antenna array

The invention discloses a packaged antenna and an antenna array based on a three-dimensional stacking technology, belongs to the technical field of packaged antennas, and solves the problem that an existing antenna process is difficult to realize integrated packaging. The active device receives and sends radio frequency signals in an electrical connection mode, the interval height of the rewiring layers is limited within 50 micrometers, and the packaging requirement of the three-dimensional stacking technology is met. The microstrip feeder feeds signals to the antenna radiation patches in a coupled feeding mode, electrical connection is not needed, occupied space is reduced, the bandwidth of the antenna can be increased in a mode of overlapping a plurality of radiation patches, the performance of the antenna is further optimized, the space size of overall active packaging is fully utilized, the antenna and an active device are integrally packaged, and the antenna and the active device are integrally packaged. The packaging cost is reduced, the low-cost design of the packaged antenna is realized, and the packaging antenna has good application prospect and economic value.
Owner:HEFEI RHOSOON INTELLIGENT TECH CO LTD

Configuring waveform transmissions for passive device activation

Methods, systems, and devices for wireless communications are described. An active wireless device, such as a user equipment (UE), a network entity, or both, may receive or otherwise determine a resource allocation for communication with a passive device. The active device may select one or more parameters of a waveform transmission (e.g., a transmission power, duration, or both) for activating the passive device while accounting for a time gap between resources. In some cases, a network entity may configure a list of parameters including the one or more parameters via control signaling. The active device may transmit the waveform transmission to the passive device in accordance with the one or more parameters, which may activate the passive device.
Owner:QUALCOMM INC

Bonding a wafer with a substrate to a wafer with backside interconnect wiring

Aspects of the disclosed invention provide a semiconductor structure for a semiconductor chip with two layers of semiconductor devices, where the first layer of semiconductor devices directly contacts a semiconductor substrate and connects to a first frontside interconnect wiring. The first layer of semiconductor devices includes at least one trench semiconductor device such as a deep trench capacitor. The first frontside interconnect wiring is electrically connected to the second frontside interconnect wiring by one or more joined metal plugs. The second layer of active devices connects to a backside power delivery network and the second frontside interconnect wiring. The semiconductor chip with two layers of semiconductor devices that are bonded together provides one layer of semiconductor devices capable of being in a portion of the semiconductor substrate and a second layer of semiconductor devices with a backside power delivery network.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

Nonlinearity management in LNA bypass mode

Methods and devices to improve nonlinearity performance of low noise amplifiers (LNAs) are disclosed. The described methods and devices reduce the capacitive loading of the LNA amplifying devices on the bypass path of the LNAs when operating in the bypass mode. This is performed by decoupling the active devices from ground to put the amplifying devices in a floating state, thus minimizing the impact of the gate-source capacitances of the amplifying devices on the overall linear performance of the LNA operating in the bypass mode.
Owner:PSEMI CORP

Smart campus Internet of Things multi-service collaborative scheduling control system based on all-optical network

The invention discloses a smart campus Internet of Things multi-service collaborative scheduling control system based on an all-optical network, and relates to the technical field of Internet of Things, and the system comprises an Internet of Things digital platform which is in communication connection with the following modules: an all-optical network infrastructure module which is used for constructing an optical fiber backbone network in a campus, and each subsystem in the campus is accessed. The reliability and stability of the campus Internet of Things are enhanced by constructing all-optical network infrastructure, the subsystems are directly connected through optical fibers by adopting the passive optical network technology, and the use of active equipment is reduced, so that the equipment failure rate and the maintenance cost are reduced, optical wavelength resources are dynamically allocated by utilizing a software defined network controller, and the reliability and the stability of the campus Internet of Things are improved. The transmission path is adjusted according to the service priority, efficient operation of key services is ensured, network stability is improved, high speed and safety of data transmission are guaranteed, and solid network support is provided for various intelligent applications in the campus.
Owner:CHINA SHANXI SIJIAN GRP

Machine tool milling cutter performance test equipment

The invention relates to the technical field of milling cutter performance detection, in particular to machine tool milling cutter performance test equipment which comprises a base, a clamping device used for clamping and fixing a test piece is installed in the middle of the upper end of the base, a top plate is fixedly installed at the upper end of the base through a plurality of side links, and a driving device is installed at the lower end of the top plate. A cleaning device is mounted on the driving device, a detection device is mounted on the cleaning device, and the detection device is used for detecting the flatness of the bottom wall of a groove formed in a test piece by the milling cutter; the milling cutter performance detection device is used for detecting the performance of a milling cutter, can clean residual cuttings on the milling cutter so as to prevent the cuttings from being left on the milling cutter to influence the performance detection result of the milling cutter, ensures the accuracy of the detection result, can also clean the cuttings in a groove formed in a test piece of the milling cutter, and improves the detection accuracy of the milling cutter. And the flatness of the groove bottom wall is detected, so that the performance detection efficiency of the milling cutter is improved.
Owner:JIANGSU TESA DIAMOND CUTTING TOOLS CO LTD

Multifunctional hybrid emergency supporting device for online ice melting and electric energy management

The invention provides a multifunctional hybrid emergency supporting device for online ice melting and electric energy management, which comprises a multifunctional active device connected to the head end of a line and a grounding transformer connected to the tail end of the line, the multifunctional active device comprises a first cascade H-bridge module K1, a first midpoint clamping module D1, a second cascade H-bridge module K2, a second midpoint clamping module D2, a third cascade H-bridge module K3, a third midpoint clamping module D3, a fourth cascade H-bridge module K4, a fourth midpoint clamping module D4, a first direct current split capacitor C1, a second direct current split capacitor C2, a first filter inductor L1 and a second filter inductor L2. The device is matched with the grounding transformer through the multifunctional active device to form a zero-sequence ice melting loop, and has the advantages of no influence on normal power utilization of a user, high equipment utilization rate and low cost.
Owner:HUNAN UNIV

Sequential Complementary FETs Bonding Backside Power Distribution Networks by Wafer Bonding Before Formation Of Active Devices

A semiconductor device includes a backside power rail over a bulk semiconductor material, a first bonding dielectric layer over the backside power rail, a first transistor level over the first bonding dielectric layer, a second bonding dielectric layer over the first transistor level, and a second transistor level over the second bonding dielectric layer. The first transistor level includes first channel structures having a first epitaxially grown semiconductor material. The second transistor level includes second channel structures having a second epitaxially grown semiconductor material. The backside power rail is spaced apart from the first transistor level by a first bonding dielectric layer. The first transistor level is spaced apart from the second transistor level by the second bonding dielectric layer.
Owner:TOKYO ELECTRON LTD

Broadband wide-angle scanning array antenna based on metasurface lens

The invention discloses a broadband wide-angle scanning array antenna based on a metasurface lens, belongs to the technical field of phased-array antennas, solves the problem of how to improve the scanning range and gain of the phased-array antennae, and is characterized in that the metasurface lens with phase gradient is loaded above the phased-array antenna on the basis of not changing the structure of the original phased-array antenna. The beam scanning range of the phased-array antenna is expanded, and the performance such as gain is improved; according to the invention, an original phased-array antenna does not need to be modified and redesigned, additional active devices do not need to be added, new components do not need to be introduced into an original system, the system cost is effectively reduced, the system size is reduced, and the antenna is suitable for scenes, such as unmanned aerial vehicles and low-altitude aircrafts, which have strict requirements on the size and the weight.
Owner:CHINA ELECTRONIC TECH GRP CORP NO 38 RES INST

Method of manufacturing integrated circuit having through-substrate via

A method includes generating an integrated circuit (IC) layout design and manufacturing an IC based on the IC layout design. Generating the IC layout design includes generating a pattern of a first shallow trench isolation (STI) region and a pattern of a through substrate via (TSV) region within the first STI region; a pattern of a second STI region surrounding the first STI region, the second STI region includes a first and second layout region, the second layout region being separated from the first STI region by the first layout region, first active regions of a group of dummy devices being defined within the first layout region, and second active regions of a group of active devices being defined within the second layout region; and patterns of first gates of the group of dummy devices in the first layout region, each of the first active regions having substantially identical dimension in a first direction.
Owner:TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

Language model transformer for cross-platform configuration and script conversion

A computing system and method are disclosed for converting network configurations across different platforms using a language model. This system preprocesses a source network configuration from a first network platform, generates a prompt based on the preprocessed source network configuration and additional network data for input to the language model. In response to the prompt, the language model converts the source network configuration into a target network configuration for a second platform, ensuring that common configuration elements are preserved while unsupported protocols are adapted to supported alternatives on the second network platform. The system outputs the converted configuration, facilitating seamless network migration with minimal, or no, manual intervention. Additional features include the ability to receive and process active device states and network diagrams, suggesting alternative solutions for unsupported protocols, validating the target configuration against the second platform's specifications, and interacting with users to refine the conversion based on their input.
Owner:CDW LLC

Memory chip, memory assembly, memory and electronic equipment

The invention discloses a storage chip, a storage component, a memory and electronic equipment, which are used for reducing metal resources occupied by power supply wiring. Wherein the memory chip comprises a wafer and an active layer embedded in the wafer, the active layer comprises an active device, the active device is a device in a peripheral circuit of the memory chip, and a first electrode of the active device is in contact with a power supply on the back surface of the wafer or is grounded to realize power supply; and a storage array in the storage chip performs signal routing through metal resources on one side of the active surface of the wafer. Because the peripheral circuit and the storage array are distributed at different positions of the storage chip, the scheme of back power supply in the peripheral circuit can not influence the storage device in the storage array, thereby saving the metal resource which is originally used as the power supply wire at one side of the active surface of the wafer on the basis of keeping the read-write function of the storage chip, and reducing the cost. And the input and output line channels of the storage array in the storage chip are expanded, so that the bandwidth of the storage chip is increased.
Owner:HUAWEI TECH CO LTD

Bridge structure for different threshold-voltage devices

A chip includes a first active device having a first threshold voltage, and a second active device having a second threshold voltage, wherein the first threshold voltage is higher than the second threshold voltage. The chip also includes a bridge structure between the first active device and the second active device. The bridge structure includes a first single diffusion break (SDB), a second SDB, and a first diffusion region extending in a first direction between the first SDB and the second SDB.
Owner:QUALCOMM INC

Top with photon chip integrated on whole chip

The invention belongs to the technical field of integrated optics and inertial sensing, and particularly relates to a full-on-chip integrated photon chip gyroscope. The active devices integrated on the silicon-based heterogeneous integrated chip comprise an SLD light source, a thin film lithium niobate modulator and a detector; the passive device integrated on the silicon-based heterogeneous integrated chip comprises an isolator, a one-to-two coupler, a polarizer, a one-to-two coupler and an on-chip waveguide ring; the silicon-based heterogeneous integrated chip is also integrated with a spot size converter, a bending waveguide, a bending waveguide and a spot size converter.
Owner:XIAN FLIGHT SELF CONTROL INST OF AVIC

Vehicle interaction control method and device, electronic equipment and storage medium

The invention provides a vehicle interaction control method and device, electronic equipment and a storage medium, and relates to the technical field of vehicle interaction control, the vehicle interaction control method and device are applied to a vehicle-mounted terminal, the vehicle-mounted terminal comprises at least two terminal equipment, and the method comprises the steps that in response to a steering wheel control signal, the number of active equipment in all the terminal equipment is judged; when the number of the active devices is larger than or equal to 2, at least one active device is determined to serve as a target response device according to a preset interaction signal, the preset interaction signal occurs before the steering wheel control signal is triggered, and when the preset interaction signal is a touch interaction signal, at least one active device is determined to serve as a target response device. The active device where the touch interaction signal closest to the triggering time of the steering wheel control signal is located serves as the target response device; and changing the state of the target response equipment according to the steering wheel control signal, so that a driver can conveniently control the terminal equipment to be controlled from a plurality of terminal equipment.
Owner:ZHEJIANG GEELY HLDG GRP CO LTD +1

Reflective display panel and sputtering target

A reflective display panel including a pixel structure is provided. The pixel structure has a reflective area and includes an active device, an insulation layer, and a reflective layer. The insulation layer is located above the active device. The reflective layer is disposed on the insulation layer and located in the reflective area. The reflective layer includes a silver alloy layer. A material of the silver alloy layer include silver with an atomic percentage greater than 96.5%, zinc with an atomic percentage greater than or equal to 0.1% and less than or equal to 2.0%, and antimony with an atomic percentage greater than or equal to 0.1% and less than or equal to 1.5%. A sputtering target adapted to deposit the silver alloy layer is further provided. A material of the sputtering target include silver with the atomic percentage greater than 96.5%, zinc with the atomic percentage greater than or equal to 0.1% and less than or equal to 2.0%, and antimony with the atomic percentage greater than or equal to 0.1% and less than or equal to 1.5%.
Owner:HANNSTAR DISPLAY CORP

Laboratory sample distribution system and laboratory automation system

A laboratory sample distribution system is provided comprising: a number of container carriers, wherein the container carriers each comprise a magnetically active device and are adapted to carry a sample container; at least one fan being adapted to cause an airflow; and a number of transport modules, the transport modules being arrangeable adjacent to one another and respectively comprising: a transport surface being adapted to carry the container carriers; a number of heat dissipating electromagnetic actuators being stationary arranged below the transport surface, the electromagnetic actuators being adapted to move container carriers placed on top of the transport surface by applying magnetic forces to the container carriers; and an air guiding element being adapted to guide the airflow first towards an underside of the transport surface and afterwards towards the electromagnetic actuators.
Owner:ROCHE DIAGNOSTICS OPERATIONS INC

Compact stripe monocular three-dimensional measurement system and method based on mechanical grating

The invention discloses a compact stripe monocular three-dimensional measurement system and method based on a mechanical grating, and belongs to the technical field of measurement sensing. The invention aims to solve the problems that the existing three-dimensional measurement technology depends on expensive active devices, the structure is complex, and single-frame high-density fringe projection and dynamic measurement are difficult to realize. The system comprises a dense fringe projection device, a monocular acquisition module and a processing unit. The compact stripe projection device is composed of an active light source, a mechanical grating and an optical lens, and is used for projecting a single-frame compact stripe formed by the mechanical grating to the surface of an object to be measured. And the monocular acquisition module is used for acquiring a deformed stripe image which is subjected to height modulation by the surface of an object. And the processing unit is used for synchronously controlling projection and acquisition and resolving the acquired single-frame deformed stripe image based on a pre-established system calibration model so as to reconstruct a three-dimensional point cloud coordinate of the object. The passive mechanical grating is adopted to replace traditional digital projection elements such as DLP, MEMS and DOE, and monocular vision and a single-frame reconstruction algorithm are combined, so that the system has the advantages of low cost, small size, single camera and the like, and has wide application prospects in the fields of miniaturized 3D imaging modules, extremely small endoscopes, portable 3D imaging equipment, dynamic 3D imaging and the like.
Owner:CHONGQING UNIV

Chiplet, chip module, electronic device, and manufacturing method for chiplet

The present application provides a chiplet, a chip module, an electronic device, and a manufacturing method for a chiplet. The chiplet comprises a substrate, an active device, and a passive device. The active device is arranged on a first side of the substrate, the passive device is arranged on a second side of the substrate, and the orthographic projection of the active device on the substrate at least partially overlaps with the orthographic projection of the passive device on the substrate, thereby reducing the sum of the projection areas occupied by the two devices. The chiplet further comprises conductive holes, and the conductive holes include a first conductive hole. The active device comprises a first connecting piece, and the first connecting piece covers one end surface of the first conductive hole and is electrically connected to the first conductive hole; the passive device comprises a second connecting piece, and the second connecting piece covers the other end surface of the first conductive hole and is electrically connected to the first conductive hole. In this way, the first conductive hole is connected to the active device and the passive device. The miniaturization of the chiplet is improved, and thus, the mounting area of the chip module is reduced, the integration level of the electronic device is improved, and the reliability of the connections between the conductive holes and the devices is high.
Owner:HUAWEI TECH CO LTD

Display panel and method of fabricating the same

A display panel includes a substrate, multiple scan lines, multiple data lines, and multiple pixel structures. The scan lines and the data lines are disposed on the substrate. The pixel structure is disposed on the substrate and electrically connected to the scan lines and the data lines, and includes an active device, a pixel electrode, a capacitor electrode, an overcoat layer, a first common electrode, a second common electrode, a first passivation layer, and a second passivation layer. The active device is electrically connected one scan line, one data line, and the pixel electrode. The capacitor electrode extends from a drain and is electrically connected to the pixel electrode. The overcoat layer is disposed between the pixel electrode and the capacitor electrode. The first common electrode overlaps the capacitor electrode, and is located between the overcoat layer and the capacitor electrode. The second common electrode overlaps the pixel electrode, and is located between the overcoat layer and the pixel electrode. The first passivation layer is disposed between the capacitor electrode and the first common electrode. The second passivation layer is disposed between the second common electrode and the pixel electrode.
Owner:HANNSTAR DISPLAY CORP

Equipment identification method and device, equipment and medium

The invention relates to the technical field of Internet of Things, and provides an equipment identification method and device, equipment and a medium, which can start a probe to asynchronously initiate an address resolution protocol broadcast request for a target authorized network segment in a sectional manner to generate an active equipment list, and can avoid congestion, thereby accurately detecting active equipment. Performing port detection on each device in the active device list, performing multi-protocol verification on an open port according to a port-protocol adaptive matching mechanism, and performing organization unique identifier analysis on a media access control address of each device in the active device list; the problem of missing detection caused by single protocol broadcasting and port change and the problem of false alarm caused by only organizing unique identifier analysis are solved; and calculating a confidence score of each device according to the fusion features to generate an identification result of each device, so that device identification can be accurately carried out step by step by integrating multi-dimensional factors, and the false alarm rate is effectively reduced.
Owner:PRIMFORCE TECHNOLOGIES LTD

Integrated electric connector

The invention provides an integrated electric connector, and the connector comprises an installation pedestal which is suitable for being installed at an external connection port of an active device corresponding to the integrated electric connector; a connector plugging shell is formed on the mounting base, and a terminal mounting cavity is formed in the connector plugging shell; the connecting assembly comprises a terminal shell and a terminal assembly, and the terminal assembly is arranged in the terminal shell; a pair of elastic connecting arms is fixed on the outer side of the terminal shell; a first limiting part is arranged on the terminal shell, a second limiting part is arranged on the elastic connecting arm, and a third limiting part and a fourth limiting part are correspondingly arranged on the connector plugging shell; when the connecting assembly is inserted into the terminal installation cavity in the first direction, the first limiting part abuts against the third limiting part so as to limit movement of the connecting assembly in the first direction, and the second limiting part abuts against the fourth limiting part so as to limit movement of the connecting assembly in the second direction. The second direction is opposite to the first direction. The electric connector provided by the invention is stable in structure and relatively low in cost.
Owner:JIAZHILIAN INTELLIGENT TECH (SUZHOU) CO LTD

PCIe network-based hardware communication method supporting path encryption and device authentication, switching device and switching system

The invention discloses a PCIe network-based hardware communication method supporting path encryption and device authentication, a switching device and a switching system. The hardware communication method comprises the following steps: setting a device authentication module, a path control module and a path execution module in the switching device of the PCIe network; the equipment authentication module is used for acquiring hardware information of all source equipment and target equipment and establishing a trust level table; the path control module is used for traversing all source equipment and target equipment according to the trust level table, and constructing a path strategy table by using a preset path rule; and the path execution module is used for judging each path between the source equipment and the target equipment according to the path strategy table and executing data processing. Dynamic path control based on the device identity and the trust level is achieved, a fine path strategy can be generated according to the trust state of the source device and the target device, and path control over the level by the device is achieved.
Owner:SHANGHAI XINLIJI SEMICON CO LTD

Design method and system for heterogeneous integrated circuit of microwave system

The invention provides a design method and system for a heterogeneous integrated circuit of a microwave system, and relates to the technical field of integrated circuits, and the method comprises the steps: building a multi-layer structure model of the heterogeneous integrated circuit of the microwave system, and the multi-layer structure model comprises a substrate layer, an active device layer, a passive device layer and an interconnection layer; based on the established multilayer structure model, constructing an electromagnetic simulation model of a heterogeneous integrated circuit of the microwave system; performing full-wave electromagnetic simulation on the whole heterogeneous integrated circuit by using a finite element method to obtain an electromagnetic coupling effect and a parasitic effect between devices; based on the optimized electromagnetic simulation model, performing performance evaluation and optimization on the heterogeneous integrated circuit of the microwave system; carrying out large-scale random simulation by utilizing a Monte Carlo method, and evaluating the performance stability of the microwave system under different working conditions; and dynamically adjusting key parameters of the heterogeneous integrated circuit by adopting a self-adaptive algorithm according to a simulation result.
Owner:ZKICME SUZHOU MICROELECTRONICS CO LTD

Integrated circuit packaging assembly, packaging method thereof, device and electronic equipment

The embodiment of the invention discloses an integrated circuit packaging assembly, a packaging method thereof, a device and electronic equipment, relates to the technical field of integrated circuits, and aims to save more winding resources for a signal line to use by at least one crystal grain in the integrated circuit packaging assembly. The packaging assembly comprises a first crystal grain and a second crystal grain stacked and connected on the first crystal grain; the first crystal grain comprises a device layer and a first interconnection layer which are sequentially stacked on the first side of the substrate, and a second interconnection layer connected with the second crystal grain is arranged on the second side of the substrate; the first power via hole penetrates through the substrate, the first end of the first power via hole extends to the first interconnection layer, is connected with the first interconnection layer and is connected with a power supply circuit on the substrate through the first interconnection layer, and the second end of the first power via hole is connected with the second interconnection layer; the second power via hole penetrates through the substrate, the first end is connected with the active device in the device layer, and the second end is connected with the first power via hole through the second interconnection layer. The method is suitable for power supply and signal network distribution in the overall three-dimensional form of the chip.
Owner:HYGON INFORMATION TECH CO LTD

Authorization-free access method for distributed energy equipment and related equipment

The invention discloses an unlicensed access method for distributed energy equipment and related equipment, and belongs to the technical field of wireless communication unlicensed random access, a central processing unit optimizes a non-orthogonal structure pilot frequency matrix by using a complex sequence convex optimization iterative decorrelation algorithm, and allocates obtained low-coherence pilot frequency to equipment; the active equipment sends a signal frame with pilot frequency and data to the wireless access point; the central processing unit estimates the active state of the equipment by using the pilot frequency in the signal frame received by the wireless access point, and performs channel estimation by using a linear minimum mean square error algorithm on the basis; the central processing unit decodes the equipment data by using the continuous interference cancellation technology according to the data in the signal frame received by the wireless access point; and the central processing unit adds a combined filter in each iteration process of continuous interference elimination, compares the signal to interference plus noise ratio of each iteration process with a threshold value, and checks whether decoding succeeds or not.
Owner:CHINA ELECTRIC POWER RESEARCH INSTITUTE CO LTD +4

Cooling for back side power distribution network

An electrical device that includes thermal cooling through silicon vias (TSVs) and micro-channels embedded in the carrier wafer for back side power distribution networks (BSPDN). The carrier wafer is at one end of a stacked structure providing the electrical device. At least one active device layer in the stacked structure that is present a level of the electrical device that is separate from a level containing the thermal cooling through silicon vias (TSVs) and micro-channels.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION