565 results about "Active devices" patented technology

Methods and devices to improve nonlinearity performance of low noise amplifiers (LNAs) are disclosed. The described methods and devices reduce the capacitive loading of the LNA amplifying devices on the bypass path of the LNAs when operating in the bypass mode. This is performed by decoupling the active devices from ground to put the amplifying devices in a floating state, thus minimizing the impact of the gate-source capacitances of the amplifying devices on the overall linear performance of the LNA operating in the bypass mode.

The invention discloses a smart campus Internet of Things multi-service collaborative scheduling control system based on an all-optical network, and relates to the technical field of Internet of Things, and the system comprises an Internet of Things digital platform which is in communication connection with the following modules: an all-optical network infrastructure module which is used for constructing an optical fiber backbone network in a campus, and each subsystem in the campus is accessed. The reliability and stability of the campus Internet of Things are enhanced by constructing all-optical network infrastructure, the subsystems are directly connected through optical fibers by adopting the passive optical network technology, and the use of active equipment is reduced, so that the equipment failure rate and the maintenance cost are reduced, optical wavelength resources are dynamically allocated by utilizing a software defined network controller, and the reliability and the stability of the campus Internet of Things are improved. The transmission path is adjusted according to the service priority, efficient operation of key services is ensured, network stability is improved, high speed and safety of data transmission are guaranteed, and solid network support is provided for various intelligent applications in the campus.

The invention provides a multifunctional hybrid emergency supporting device for online ice melting and electric energy management, which comprises a multifunctional active device connected to the head end of a line and a grounding transformer connected to the tail end of the line, the multifunctional active device comprises a first cascade H-bridge module K1, a first midpoint clamping module D1, a second cascade H-bridge module K2, a second midpoint clamping module D2, a third cascade H-bridge module K3, a third midpoint clamping module D3, a fourth cascade H-bridge module K4, a fourth midpoint clamping module D4, a first direct current split capacitor C1, a second direct current split capacitor C2, a first filter inductor L1 and a second filter inductor L2. The device is matched with the grounding transformer through the multifunctional active device to form a zero-sequence ice melting loop, and has the advantages of no influence on normal power utilization of a user, high equipment utilization rate and low cost.

The invention discloses a broadband wide-angle scanning array antenna based on a metasurface lens, belongs to the technical field of phased-array antennas, solves the problem of how to improve the scanning range and gain of the phased-array antennae, and is characterized in that the metasurface lens with phase gradient is loaded above the phased-array antenna on the basis of not changing the structure of the original phased-array antenna. The beam scanning range of the phased-array antenna is expanded, and the performance such as gain is improved; according to the invention, an original phased-array antenna does not need to be modified and redesigned, additional active devices do not need to be added, new components do not need to be introduced into an original system, the system cost is effectively reduced, the system size is reduced, and the antenna is suitable for scenes, such as unmanned aerial vehicles and low-altitude aircrafts, which have strict requirements on the size and the weight.

A computing system and method are disclosed for converting network configurations across different platforms using a language model. This system preprocesses a source network configuration from a first network platform, generates a prompt based on the preprocessed source network configuration and additional network data for input to the language model. In response to the prompt, the language model converts the source network configuration into a target network configuration for a second platform, ensuring that common configuration elements are preserved while unsupported protocols are adapted to supported alternatives on the second network platform. The system outputs the converted configuration, facilitating seamless network migration with minimal, or no, manual intervention. Additional features include the ability to receive and process active device states and network diagrams, suggesting alternative solutions for unsupported protocols, validating the target configuration against the second platform's specifications, and interacting with users to refine the conversion based on their input.

A laboratory sample distribution system is provided comprising: a number of container carriers, wherein the container carriers each comprise a magnetically active device and are adapted to carry a sample container; at least one fan being adapted to cause an airflow; and a number of transport modules, the transport modules being arrangeable adjacent to one another and respectively comprising: a transport surface being adapted to carry the container carriers; a number of heat dissipating electromagnetic actuators being stationary arranged below the transport surface, the electromagnetic actuators being adapted to move container carriers placed on top of the transport surface by applying magnetic forces to the container carriers; and an air guiding element being adapted to guide the airflow first towards an underside of the transport surface and afterwards towards the electromagnetic actuators.

The invention discloses a compact stripe monocular three-dimensional measurement system and method based on a mechanical grating, and belongs to the technical field of measurement sensing. The invention aims to solve the problems that the existing three-dimensional measurement technology depends on expensive active devices, the structure is complex, and single-frame high-density fringe projection and dynamic measurement are difficult to realize. The system comprises a dense fringe projection device, a monocular acquisition module and a processing unit. The compact stripe projection device is composed of an active light source, a mechanical grating and an optical lens, and is used for projecting a single-frame compact stripe formed by the mechanical grating to the surface of an object to be measured. And the monocular acquisition module is used for acquiring a deformed stripe image which is subjected to height modulation by the surface of an object. And the processing unit is used for synchronously controlling projection and acquisition and resolving the acquired single-frame deformed stripe image based on a pre-established system calibration model so as to reconstruct a three-dimensional point cloud coordinate of the object. The passive mechanical grating is adopted to replace traditional digital projection elements such as DLP, MEMS and DOE, and monocular vision and a single-frame reconstruction algorithm are combined, so that the system has the advantages of low cost, small size, single camera and the like, and has wide application prospects in the fields of miniaturized 3D imaging modules, extremely small endoscopes, portable 3D imaging equipment, dynamic 3D imaging and the like.

The present application provides a chiplet, a chip module, an electronic device, and a manufacturing method for a chiplet. The chiplet comprises a substrate, an active device, and a passive device. The active device is arranged on a first side of the substrate, the passive device is arranged on a second side of the substrate, and the orthographic projection of the active device on the substrate at least partially overlaps with the orthographic projection of the passive device on the substrate, thereby reducing the sum of the projection areas occupied by the two devices. The chiplet further comprises conductive holes, and the conductive holes include a first conductive hole. The active device comprises a first connecting piece, and the first connecting piece covers one end surface of the first conductive hole and is electrically connected to the first conductive hole; the passive device comprises a second connecting piece, and the second connecting piece covers the other end surface of the first conductive hole and is electrically connected to the first conductive hole. In this way, the first conductive hole is connected to the active device and the passive device. The miniaturization of the chiplet is improved, and thus, the mounting area of the chip module is reduced, the integration level of the electronic device is improved, and the reliability of the connections between the conductive holes and the devices is high.

The invention relates to the technical field of Internet of Things, and provides an equipment identification method and device, equipment and a medium, which can start a probe to asynchronously initiate an address resolution protocol broadcast request for a target authorized network segment in a sectional manner to generate an active equipment list, and can avoid congestion, thereby accurately detecting active equipment. Performing port detection on each device in the active device list, performing multi-protocol verification on an open port according to a port-protocol adaptive matching mechanism, and performing organization unique identifier analysis on a media access control address of each device in the active device list; the problem of missing detection caused by single protocol broadcasting and port change and the problem of false alarm caused by only organizing unique identifier analysis are solved; and calculating a confidence score of each device according to the fusion features to generate an identification result of each device, so that device identification can be accurately carried out step by step by integrating multi-dimensional factors, and the false alarm rate is effectively reduced.

The invention discloses a PCIe network-based hardware communication method supporting path encryption and device authentication, a switching device and a switching system. The hardware communication method comprises the following steps: setting a device authentication module, a path control module and a path execution module in the switching device of the PCIe network; the equipment authentication module is used for acquiring hardware information of all source equipment and target equipment and establishing a trust level table; the path control module is used for traversing all source equipment and target equipment according to the trust level table, and constructing a path strategy table by using a preset path rule; and the path execution module is used for judging each path between the source equipment and the target equipment according to the path strategy table and executing data processing. Dynamic path control based on the device identity and the trust level is achieved, a fine path strategy can be generated according to the trust state of the source device and the target device, and path control over the level by the device is achieved.

An electrical device that includes thermal cooling through silicon vias (TSVs) and micro-channels embedded in the carrier wafer for back side power distribution networks (BSPDN). The carrier wafer is at one end of a stacked structure providing the electrical device. At least one active device layer in the stacked structure that is present a level of the electrical device that is separate from a level containing the thermal cooling through silicon vias (TSVs) and micro-channels.

A reflective display panel having a pixel structure is provided. The pixel structure has a reflective area, and includes an active device, an insulation layer and a reflective layer. The insulation layer is disposed above the active device. The reflective layer is disposed on the insulation layer and located in the reflective area. The reflective layer includes a silver alloy layer. The material of the silver alloy layer includes silver with a weight percentage greater than 90% and indium with a weight percentage greater than or equal to 2% and less than or equal to 8%. A sputtering target suitable for depositing the silver alloy layer is also provided.

The invention discloses a fault diagnosis method and system for an active device of an active magnetic suspension bearing power amplifier, and belongs to the technical field of magnetic suspension bearings, and the method comprises the steps: controlling each winding to be in an upward follow current state and a downward follow current state at the initial moment and the end moment of a switching period under a normal working condition; respectively acquiring direct-current bus current ibus1 and ibus2 at a starting moment and an ending moment, and winding current at an intermediate moment, and predicting winding current of a next switching period according to the winding current; if ibus1 is equal to 0 and ibus2 is equal to 0 and the error between the winding current predicted value and the measured value in the next switching period is large, the corresponding winding is controlled to be in a charging state at the initial moment of the next switching period, the direct current bus current and the winding current are compared, and if the error between the direct current bus current and the winding current is large, it is judged that a corresponding phase current sensor breaks down; and if ibus1 = 0 and ibus2 = 0 are not satisfied, judging that a transistor fault occurs. According to the invention, effective and rapid diagnosis of the active device in the magnetic suspension bearing power amplifier can be realized.

A calibration circuit and an electronic device belong to the technical field of detection, the calibration circuit is connected with a differential probe, and a sampling circuit performs voltage sampling on an output signal to output a sampling signal; the control circuit outputs a first control signal according to the sampling signal; the direct current bias calibration circuit outputs a first adjusting voltage according to the first control signal; the signal conditioning circuit is further configured to perform direct current bias compensation on the single-ended signal based on the first adjusting voltage so as to output an output signal; therefore, the direct-current bias of the whole system returns to zero, the dependence of system errors on the precision of resistors, capacitors and active devices is reduced, and the accuracy of measurement results is improved.

A speaker-induced cooling system for a device aids in removing heat produced by a circuit system. A speaker box forms a speaker box opening having a speaker within it. A thermally conductive sheet extends contiguously from a first speaker box side around to a second speaker box side. Heat is transferred from the circuit system to the thermally conductive sheet at the first speaker box side and away from the device using a heat sink, which draws heat from a thermally conductive sheet at the second speaker box side. The heat sink includes sound openings between fins and is further cooled using air movement, created by the speaker, through the sound openings. The thermally conductive sheet further transfers heat into an enclosure of the speaker box. The heat is dissipated by a cool zone created by the speaker during use, which cools the overall device.

The invention provides a compensating circuit of a high-switching-frequency Buck converter and application of the compensating circuit, and belongs to the technical field of Buck converters. According to the compensating circuit, a high gain branch and a low gain branch are designed, wherein the branch including a first transconductance operational amplifier OTA1 has the characteristics of low gain and high bandwidth; the branches including the second transconductance operational amplifier OTA2 have the characteristics of high gain and low bandwidth, and the two branches are provided with corresponding active devices. A feedback voltage signal carrying switching noise is mainly introduced into a subsequent loop through two paths, the first loop passes through the first transconductance operational amplifier OTA1, the high-frequency gain of the path is extremely low, and the high-frequency gain of the switching noise can be effectively suppressed; and the second path passes through an advanced compensation module PD, a second transconductance operational amplifier OTA2 and a divider DIV to form current to charge a second capacitor C2, but the capacitor has an integral effect, so that the high-frequency gain of switching noise is effectively reduced. Compared with traditional three-type compensation, the method has higher noise suppression capability.

The invention discloses a wafer-level heat dissipation structure and a manufacturing method. The wafer-level heat dissipation structure comprises a heat dissipation substrate, a device wafer and a bonding layer, the heat dissipation substrate is a first silicon wafer with a diamond layer growing on the lower surface, and the upper surface of the heat dissipation substrate is plated with a first copper layer; the device wafer is a second silicon wafer of which the upper surface is integrated with an active device, and the lower surface is plated with a second copper layer; the bonding layer is composed of a Cu-Cu bonding interface formed by the first copper layer and the second copper layer through thermocompression bonding. The method comprises the following steps: growing a diamond layer on the lower surface of a first silicon wafer through MPCVD, and sputtering a Cu layer after the upper surface is thinned; sputtering a Cu layer on the back surface of the second silicon wafer of which the surface is integrated with the active device; and finally realizing interconnection of the Cu layers of the two wafers through thermocompression bonding. The problem of multi-interface thermal resistance caused by a traditional thermal interface material is avoided, an ultra-low thermal resistance path from a chip junction to a diamond heat dissipation surface is constructed, and the method is particularly suitable for thermal management of a high-power-density semiconductor device.

This invention provides an interlayer film for sandwich photoactive devices and a sandwich photoactive device. The interlayer film for sandwich photoactive devices has the following characteristics: after heat treatment at 90-140℃ for 30-240 minutes, the shear viscosity is 7000-12000 Pa·s at 90℃ and a shear rate of 20 / s, and 5000-9000 Pa·s at 110℃ and a shear rate of 20 / s. The interlayer film provided by this invention has good adhesion and can effectively solve the problem of delamination in sandwich photoactive devices.

The utility model provides a microwave receiving module, which relates to the technical field of signal processing, and comprises a VGC control temperature compensation circuit, the VGC control temperature compensation circuit comprises a voltage-controlled amplifier and a temperature sensor, and the input end and the output end of the voltage-controlled amplifier are respectively connected with an amplitude-limiting low-noise amplification filter circuit and a noise control circuit. The power supply end of the voltage-controlled amplifier is connected with the voltage conversion circuit, and the temperature sensor is connected with the control voltage input end of the voltage-controlled amplifier through the signal processing circuit. The problem of gain fluctuation caused by electrical characteristic change of active devices such as a transistor and an amplifier chip in the VGC amplification control circuit due to temperature change is effectively solved, the control voltage of the voltage-controlled amplifier is dynamically adjusted, and the voltage-controlled amplifier can stably work at different temperatures; therefore, the gain stability of the whole microwave receiving module is improved, and the signal amplification effect is improved.

The invention discloses an integrated analysis method and system for monitoring activity track abnormity of old people based on Internet of Things. The method comprises the following steps: determining a plurality of pieces of activity equipment in an activity area and an activity mode of each piece of activity equipment, and constructing a full-scene data model; predicting potential safety hazard parameters in the activity area through the full-scene data model, and determining a key monitoring area and a daily monitoring area; respectively deploying multi-point millimeter wave radars in the key monitoring area and the daily monitoring area to construct an Internet of Things monitoring network, and determining respective data attributes of the key monitoring area and the daily monitoring area; and collecting related activity data of the elderly according to the data attributes, collecting the real-time position of the elderly through an Internet of Things monitoring network, drawing an activity track, and carrying out abnormal and emergency analysis according to the activity track and the related activity data. The activity state of the elderly can be comprehensively mastered, the activity law and abnormal conditions of the elderly can be accurately and timely determined, manual monitoring is not needed, and the labor cost input is reduced.

The present disclosure relates to IC structures including a porous semiconductor layer located beneath a channel isolation proximate to a source / drain region. An integrated circuit (IC) structure includes an active device located above a bulk semiconductor substrate, and an isolation structure in the bulk semiconductor substrate surrounding the active device. The active device includes a semiconductor layer having a central region, a first end region laterally spaced apart from the central region by a first trench isolation, a second end region laterally spaced apart from the central region by a second trench, a gate located above the central region, and a source / drain region located in each of the first and second end regions. The isolation structure includes a polysilicon isolation layer located beneath the active device, a third trench isolation surrounding the active device, and a porous semiconductor layer located between the first trench isolation and the polysilicon isolation layer and between the second trench isolation and the polysilicon isolation layer.

The application relates to the technical field of switching power supply, and discloses a bridge type low-stress passive soft switching boost power factor correction circuit, which comprises a direct current input power supply, a main power switching tube, an output filter capacitor and a coupling inductor comprising a primary side and a secondary side; a passive soft switching buffer network is connected to a main circuit of the circuit, the network comprises a diode full-bridge structure and a buffer capacitor, and the leakage inductance of the secondary side of the coupling inductor is connected between the midpoints of two bridge arms of the full-bridge structure; the application utilizes the ratio difference of the coupling inductor to generate a forward potential difference, drives the buffer capacitor to reversely charge to establish a negative voltage, and further provides a discharge circuit for the parasitic junction capacitance of the main power switching tube, so that zero voltage turn-on is realized, and high-frequency switching loss is reduced; meanwhile, the highest voltage stress of the semiconductor device is clamped in the range of the direct current output voltage through the potential restriction of the full-bridge network. The application does not need auxiliary active devices, and improves conversion efficiency and reliability while simplifying the system structure.

Some implementations herein include a semiconductor die and methods of formation. The semiconductor die includes an array of interconnect pad structures, including interconnect pad structures having surfaces located within an overlay region of an active device area of the semiconductor die. As part of manufacturing the semiconductor die, temporary conductive structures are formed across the overlay region to support wafer acceptance testing and / or circuit probe testing process. Forming the temporary conductive structures includes using an anti-reflective coating layer having a composition that enables the temporary conductive structures to be formed using a single etch cycle. Relative to other semiconductor dies manufactured using temporary conductive structures formed using an anti-reflective coating layer having another composition (and that may require multiple etch cycles), the semiconductor die includes a reduced difference in step heights between interconnect pad structures in the overlay region and other regions of the active device area.

Packages and methods for fabricating a module with reduced area, including forming a resin-based substrate by forming a resin on a plurality of multilayer ceramic capacitors (MLCCs). Packages and methods for fabricating a module with reduced area include forming a MLCC-based substrate by forming a resin on a plurality of MLCCs, wherein each MLCC of the plurality of MLCCs directly contacts another MLCC.

The invention relates to a converter circuit and electronic equipment. The converter circuit comprises an active clamping circuit, a control circuit and a voltage stabilizing circuit, active devices in the active clamping circuit are controlled through the active clamping circuit to realize soft switching, that is, a first switching tube and a second switching tube are controlled to realize soft switching, so that the conduction loss of the first switching tube and the second switching tube is reduced, and the switching efficiency is improved. The problem that large loss is caused when the PFC converter works at high frequency due to the fact that an existing passive clamping circuit cannot achieve soft switching is solved.

The invention discloses a phase offset configuration method based on a device unique identifier RCA, and belongs to the technical field of storage device management. Comprising the following steps: S1, a host activates all connected eMMC equipment through a standard eMMC initialization command; s2, the host allocates a unique relative device address RCAi for each eMMC device; s3, the host counts the total number n of the currently active devices; s4, calculating a phase deviation angle delta phi i for each eMMC device based on the relative device address RCAi and the total number n of the devices; s5, the host writes the phase deviation angle delta phi i into an extension register of each eMMC device through an extension register configuration command; and S6, the host activates the phase deviation of the target device, and data transmission is carried out in a specified phase window, so that each eMMC device only drives the data bus in the exclusive time slot corresponding to the phase deviation angle delta phi i of the eMMC device. Through innovative combination of protocol layer dynamic configuration and physical layer time isolation, the problems of signal conflict, delay and power consumption in a multi-eMMC equipment system are thoroughly solved.

The application provides a precise simplification method and system of a passive parasitic parameter network. The method comprises the following steps: obtaining a passive parameter parasitic network of a to-be-processed circuit; obtaining device information of all parasitic parameters; labeling node names of active device ports according to an active device naming rule; if a current parasitic parameter crosses multiple active device ports, deleting the current parasitic parameter; if a branch where the current parasitic parameter is located is an open circuit, deleting the branch and the parasitic parameters thereon; after traversing all parasitic parameters, obtaining a precise passive parasitic parameter network; and performing order reduction processing on the precise passive parasitic parameter network to obtain a simplified passive parasitic parameter network. The method precisely processes the passive parasitic parameter network, excludes active device ports and invalid ports, so that the passive parasitic parameter network can be correctly processed during simplification and order reduction processing, and the efficiency and accuracy of the order reduction and simplification processing are improved due to the exclusion of invalid paths.

A communication method comprises the following steps: a microstrip line transmits a first radio frequency signal from an active device to an oscillator, and couples a second radio frequency signal and a third radio frequency signal transmitted by the oscillator to a waveguide; the second radio frequency signal is a part of radio frequency signal transmitted to the oscillator; the third radio-frequency signal is a radio-frequency signal reflected by a capacitor composed of the polar plate and the grounding plate; the communication method is used for the transmission band line waveguide connector. The transmission band line waveguide connector comprises a transmission band line, a dielectric substrate and a grounding plate. The transmission band line is located on the first surface of the dielectric substrate, and the grounding plate is located on the second surface of the dielectric substrate; the grounding plate is provided with a gap which is used for coupling with the waveguide. The transmission band line comprises a microstrip line, a pole plate and an array coupled with the gap; wherein one end of the microstrip line is connected with the polar plate, the other end is connected with an active device, and the oscillator is located between the two ends of the microstrip line and connected with the microstrip line; the pole plate is connected with the direct current feed end, and the pole plate is coupled with the grounding plate.

The present invention provides an electronic device and a manufacturing method thereof. The electronic device includes an active device substrate, an insulating film material, a vertical circuit, and an anisotropic conductive adhesive. The active device substrate includes a substrate, a first circuit, and a second circuit. The first circuit is disposed on a first surface of the substrate, the second circuit is disposed on a second surface of the substrate, and the first surface and the second surface face each other while a side surface of the substrate connects the first surface and the second surface. The insulating film material is disposed on the side surface of the substrate. The vertical circuit is disposed on the surface of the insulating film material and is located between the insulating film material and the side surface of the substrate. The anisotropic conductive adhesive is disposed between the vertical circuit and the side surface of the substrate, and electrically connects the vertical circuit to the first circuit and the second circuit.